From fc5c306bbdf30d84c9fffd5d283a9811b24dcbf6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 6 Mar 2013 11:28:32 -0700 Subject: ARM: tegra: device tree whitespace cleanup Remove white-space from empty line; triggers checkpatch. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/tegra20.dtsi') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 0dad7007bd49..7712411f73c4 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -209,7 +209,7 @@ compatible = "nvidia,tegra20-das"; reg = <0x70000c00 0x80>; }; - + tegra_ac97: ac97 { compatible = "nvidia,tegra20-ac97"; reg = <0x70002000 0x200>; -- cgit v1.2.1 From 5d324410d4de8dec7e9d8d9f66832ed7e0a947bc Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 6 Mar 2013 11:28:33 -0700 Subject: ARM: tegra: fix sort order of USB PHY nodes The USB PHY nodes are all grouped together rather than being sorted based on reg address like all other nodes fix this. I apologize for the churn; I should have noticed this during review of the patches that caused this. Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 50 +++++++++++++++++++++--------------------- 1 file changed, 25 insertions(+), 25 deletions(-) (limited to 'arch/arm/boot/dts/tegra20.dtsi') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 7712411f73c4..c9121337ed2c 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -442,31 +442,6 @@ #size-cells = <0>; }; - phy1: usb-phy@c5000400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5000400 0x3c00>; - phy_type = "utmi"; - nvidia,has-legacy-mode; - clocks = <&tegra_car 22>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - - phy2: usb-phy@c5004400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5004400 0x3c00>; - phy_type = "ulpi"; - clocks = <&tegra_car 94>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - - phy3: usb-phy@c5008400 { - compatible = "nvidia,tegra20-usb-phy"; - reg = <0xc5008400 0x3C00>; - phy_type = "utmi"; - clocks = <&tegra_car 22>, <&tegra_car 127>; - clock-names = "phy", "pll_u"; - }; - usb@c5000000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5000000 0x4000>; @@ -479,6 +454,15 @@ status = "disabled"; }; + phy1: usb-phy@c5000400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5000400 0x3c00>; + phy_type = "utmi"; + nvidia,has-legacy-mode; + clocks = <&tegra_car 22>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + usb@c5004000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5004000 0x4000>; @@ -489,6 +473,14 @@ status = "disabled"; }; + phy2: usb-phy@c5004400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5004400 0x3c00>; + phy_type = "ulpi"; + clocks = <&tegra_car 94>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + usb@c5008000 { compatible = "nvidia,tegra20-ehci", "usb-ehci"; reg = <0xc5008000 0x4000>; @@ -499,6 +491,14 @@ status = "disabled"; }; + phy3: usb-phy@c5008400 { + compatible = "nvidia,tegra20-usb-phy"; + reg = <0xc5008400 0x3c00>; + phy_type = "utmi"; + clocks = <&tegra_car 22>, <&tegra_car 127>; + clock-names = "phy", "pll_u"; + }; + sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; -- cgit v1.2.1 From b69cd984efba767788d18206a84ce37b7584fea8 Mon Sep 17 00:00:00 2001 From: Andrew Chew Date: Tue, 12 Mar 2013 16:40:51 -0700 Subject: ARM: tegra: fix the status of PWM DT nodes We should be defining the PWM nodes with status as "disabled" in the chip-specific dtsi file, since we don't know whether specific boards will use the PWM or not. This patch fixes the PWM node status for Tegra20 and Tegra30. Also fixed the one user of PWM, which is the Tegra20 medcom-wide board, so that PWM is set to "okay" in the board-specific dts file. Signed-off-by: Andrew Chew [swarren: in medcom-wide: fixed node sort order, removed duplicate pwm: label, fixed syntax error] Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/tegra20.dtsi') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index c9121337ed2c..1911432987ef 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -299,6 +299,7 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car 17>; + status = "disabled"; }; rtc { -- cgit v1.2.1 From 1071b2df22aa45ffeaf34dfccc889d92586ca645 Mon Sep 17 00:00:00 2001 From: Prashant Gaikwad Date: Thu, 4 Apr 2013 14:35:04 +0530 Subject: clk: tegra: Fix cdev1 and cdev2 IDs Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/tegra20.dtsi') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 1911432987ef..3e676a26c980 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -478,7 +478,7 @@ compatible = "nvidia,tegra20-usb-phy"; reg = <0xc5004400 0x3c00>; phy_type = "ulpi"; - clocks = <&tegra_car 94>, <&tegra_car 127>; + clocks = <&tegra_car 93>, <&tegra_car 127>; clock-names = "phy", "pll_u"; }; -- cgit v1.2.1