From 0da65870413630339399eb691162eef5c27272de Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Sat, 24 Jan 2015 13:16:15 +0900 Subject: ARM: dts: convert to generic power domain bindings for exynos DT This patch replaces all custom samsung,power-domain dt properties with generic power domain bindings and updates documentation Samsung's devices referring to old binding. Suggested-by: Kevin Hilman Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas [javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook] Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts/exynos4x12.dtsi') diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 93b70402e943..da8734e25f50 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -52,6 +52,7 @@ pd_isp: isp-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; + #power-domain-cells = <0>; }; clock: clock-controller@10030000 { @@ -195,7 +196,7 @@ compatible = "samsung,exynos4212-fimc-lite"; reg = <0x12390000 0x1000>; interrupts = <0 105 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>; clock-names = "flite"; status = "disabled"; @@ -205,7 +206,7 @@ compatible = "samsung,exynos4212-fimc-lite"; reg = <0x123A0000 0x1000>; interrupts = <0 106 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE1>; clock-names = "flite"; status = "disabled"; @@ -215,7 +216,7 @@ compatible = "samsung,exynos4212-fimc-is", "simple-bus"; reg = <0x12000000 0x260000>; interrupts = <0 90 0>, <0 95 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>, <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, <&clock CLK_PPMUISPMX>, -- cgit v1.2.1 From 79f3c37c8859d973b39b64200f7bbc2a66de057c Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:49:08 +0900 Subject: ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi Assign proper FIMC-IS UART gate clock in the device DT node and not use the SRC_MASK gate. This fixes regression introduced in commit a37c82a3b3c0910019abfd22a97be1f ("clk: samsung: exynos4: Remove SRC_MASK_ISP gates"). Without this change exynos4 fimc-is driver fails to probe with an error log: [ 1.842447] ERROR: could not get clock /camera/fimc-is@12000000:uart(13) [ 1.848529] exynos4-fimc-is 12000000.fimc-is: failed to get clock: uart [ 1.855275] exynos4-fimc-is: probe of 12000000.fimc-is failed with error -2 Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/exynos4x12.dtsi') diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index da8734e25f50..af59cab53bd9 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -226,7 +226,7 @@ <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, <&clock CLK_DIV_MCUISP0>, <&clock CLK_DIV_MCUISP1>, - <&clock CLK_SCLK_UART_ISP>, + <&clock CLK_UART_ISP_SCLK>, <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>, <&clock CLK_ACLK400_MCUISP>, <&clock CLK_DIV_ACLK400_MCUISP>; -- cgit v1.2.1