From 0bc830b05c667218d703f2026ec866c49df974fc Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Tue, 18 Mar 2014 10:47:17 +0100 Subject: KVM: ioapic: clear IRR for edge-triggered interrupts at delivery This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if the interrupt is still sitting in the IOAPIC. After the next patches, it avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is called. Reviewed-by: Alex Williamson Signed-off-by: Paolo Bonzini --- virt/kvm/ioapic.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c index 0b4914147b9d..25e16a6898ed 100644 --- a/virt/kvm/ioapic.c +++ b/virt/kvm/ioapic.c @@ -288,6 +288,9 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status) irqe.level = 1; irqe.shorthand = 0; + if (irqe.trig_mode == IOAPIC_EDGE_TRIG) + ioapic->irr &= ~(1 << irq); + if (irq == RTC_GSI && line_status) { BUG_ON(ioapic->rtc_status.pending_eoi != 0); ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, -- cgit v1.2.1