summaryrefslogtreecommitdiffstats
path: root/include/linux/pci.h
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-linus' of ↵Linus Torvalds2008-04-291-2/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (21 commits) pciehp: fix error message about getting hotplug control pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2 pci/irq: restore mask_bits in msi shutdown -v3 doc: replace yet another dev with pdev for consistency in DMA-mapping.txt PCI: don't expose struct pci_vpd to userspace doc: fix an incorrect suggestion to pass NULL for PCI like buses Consistently use pdev as the variable of type struct pci_dev *. pciehp: Fix command write shpchp: fix slot name make pciehp_acpi_get_hp_hw_control_from_firmware() pciehp: Clean up pcie_init() pciehp: Mask hotplug interrupt at controller release pciehp: Remove useless hotplug interrupt enabling pciehp: Fix wrong slot capability check pciehp: Fix wrong slot control register access pciehp: Add missing memory barrier pciehp: Fix interrupt event handlig pciehp: fix slot name Update MAINTAINERS with location of PCI tree PCI: Add Intel SCH PCI IDs ...
| * pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2Yinghai Lu2008-04-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [PATCH 2/2] pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2 this change | commit 23a274c8a5adafc74a66f16988776fc7dd6f6e51 | Author: Prakash, Sathya <sathya.prakash@lsi.com> | Date: Fri Mar 7 15:53:21 2008 +0530 | | [SCSI] mpt fusion: Enable MSI by default for SAS controllers | | This patch modifies the driver to enable MSI by default for all SAS chips. | | Signed-off-by: Sathya Prakash <sathya.prakash@lsi.com> | Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com> | Causes the kexec of a RHEL 5.1 kernel to fail. root casue: the rhel 5.1 kernel still uses INTx emulation. and mptscsih_shutdown doesn't call pci_disable_msi to reenable INTx on kexec path So call pci_msi_shutdown in the shutdown path to do the same thing to msix Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@hobbes.lan>
| * PCI: don't expose struct pci_vpd to userspaceJesse Barnes2008-04-281-2/+2
| | | | | | | | | | | | | | We just need to forward declare it for struct pci_dev, not expose it outside of __KERNEL__. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | x86: multi pci root bus with different io resource range, on 64-bitYinghai Lu2008-04-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | scan AMD opteron io/mmio routing to make sure every pci root bus get correct resource range. Thus later pci scan could assign correct resource to device with unassigned resource. this can fix a system without _CRS for multi pci root bus. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86 pci: remove checking type for mmconfig probeYinghai Lu2008-04-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | doesn't need to check if it is type1 or type2, we can use raw_pci_ops directly. also make pci_direct_conf1 static again. anyway is there system with type 2 and mmconf support? Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | x86_64: set cfg_size for AMD Family 10h in case MMCONFIGYinghai Lu2008-04-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | reuse pci_cfg_space_size but skip check pci express and pci-x CAP ID. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Cc: Andrew Morton <akpm@linux-foundation.org> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | x86: validate against acpi motherboard resourcesRobert Hancock2008-04-261-0/+8
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This path adds validation of the MMCONFIG table against the ACPI reserved motherboard resources. If the MMCONFIG table is found to be reserved in ACPI, we don't bother checking the E820 table. The PCI Express firmware spec apparently tells BIOS developers that reservation in ACPI is required and E820 reservation is optional, so checking against ACPI first makes sense. Many BIOSes don't reserve the MMCONFIG region in E820 even though it is perfectly functional, the existing check needlessly disables MMCONFIG in these cases. In order to do this, MMCONFIG setup has been split into two phases. If PCI configuration type 1 is not available then MMCONFIG is enabled early as before. Otherwise, it is enabled later after the ACPI interpreter is enabled, since we need to be able to execute control methods in order to check the ACPI reserved resources. Presently this is just triggered off the end of ACPI interpreter initialization. There are a few other behavioral changes here: - Validate all MMCONFIG configurations provided, not just the first one. - Validate the entire required length of each configuration according to the provided ending bus number is reserved, not just the minimum required allocation. - Validate that the area is reserved even if we read it from the chipset directly and not from the MCFG table. This catches the case where the BIOS didn't set the location properly in the chipset and has mapped it over other things it shouldn't have. This also cleans up the MMCONFIG initialization functions so that they simply do nothing if MMCONFIG is not compiled in. Based on an original patch by Rajesh Shah from Intel. [akpm@linux-foundation.org: many fixes and cleanups] Signed-off-by: Robert Hancock <hancockr@shaw.ca> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Andi Kleen <ak@suse.de> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andi Kleen <ak@suse.de> Cc: Greg KH <greg@kroah.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* PCI: Expose PCI VPD through sysfsBen Hutchings2008-04-201-0/+3
| | | | | | | | | | | | | | | | | | | | | Vital Product Data (VPD) may be exposed by PCI devices in several ways. It is generally unsafe to read this information through the existing interfaces to user-land because of stateful interfaces. This adds: - abstract operations for VPD access (struct pci_vpd_ops) - VPD state information in struct pci_dev (struct pci_vpd) - an implementation of the VPD access method specified in PCI 2.2 (in access.c) - a 'vpd' binary file in sysfs directories for PCI devices with VPD operations defined It adds a probe for PCI 2.2 VPD in pci_scan_device() and release of VPD state in pci_release_dev(). Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add generic pci_enable_resources()Bjorn Helgaas2008-04-201-0/+1
| | | | | | | | | | | | | | | | | Each architecture has its own pcibios_enable_resources() implementation. These differ in many minor ways that have nothing to do with actual architectural differences. Follow-on patches will make most arches use this generic version instead. This version is based on powerpc, which seemed most up-to-date. The only functional difference from the x86 version is that this uses "!r->parent" to check for resource collisions instead of "!r->start && r->end". Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add PCI Express ASPM supportShaohua Li2008-04-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Note: some devices might not work well with aspm, either because chipset issue or device issue. The patch provide API (pci_disable_link_state), driver can disable ASPM for specific device. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: remove global list of PCI devicesGreg Kroah-Hartman2008-04-201-3/+0
| | | | | | | | | This patch finally removes the global list of PCI devices. We are relying entirely on the list held in the driver core now, and do not need a separate "shadow" list as no one uses it. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: add is_added flag to struct pci_devGreg Kroah-Hartman2008-04-201-0/+1
| | | | | | | | | | This lets us check if the device is really added to the driver core or not, which is what we need when walking some of the bus lists. The flag is there in anticipation of getting rid of the other PCI device list, which is what we used to check in this situation. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: clean up search.c a lotGreg Kroah-Hartman2008-04-201-2/+2
| | | | | | | | | | | | | | | | | | This cleans up the search.c file, now using the pci list of devices that are created for the driver core, instead of relying on our separate list of devices. It's better to use the functions already created for this kind of thing, instead of rolling our own all the time. This work is done in anticipation of getting rid of that second list of pci devices all together. And it ends up saving code, always a nice benefit. This also removes one compiler warning for when CONFIG_PCI_LEGACY is enabled as we no longer internally use the deprecated functions anymore. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: remove pci_get_device_reverseGreg Kroah-Hartman2008-04-201-10/+0
| | | | | | | | | This removes the pci_get_device_reverse function as there should not be any need to walk pci devices backwards anymore. All users of this call are now gone from the tree, so it is safe to remove it. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: remove pci_find_presentGreg Kroah-Hartman2008-04-201-2/+0
| | | | | | | | No one is using this function anymore for quite some time, so remove it. Everyone calls pci_dev_present() instead anyway... Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: #if 0 pci_assign_resource_fixed()Adrian Bunk2008-04-201-1/+0
| | | | | | | | | An unused function that bloated the kernel only when CONFIG_EMBEDDED was enabled... Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: revert "pcie: utilize pcie transaction pending bit"Andrew Morton2008-03-241-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Revert as it is reported to cause problems for people. commit 4348a2dc49f9baecd34a9b0904245488c6189398 Author: Shaohua Li <shaohua.li@intel.com> Date: Wed Oct 24 10:45:08 2007 +0800 pcie: utilize pcie transaction pending bit PCIE has a mechanism to wait for Non-Posted request to complete. I think pci_disable_device is a good place to do this. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Due to the regression reported at http://bugzilla.kernel.org/show_bug.cgi?id=10065 Cc: Shaohua Li <shaohua.li@intel.com> Cc: Soeren Sonnenburg <kernel@nn7.de> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* devres: implement pcim_iomap_regions_request_all()Tejun Heo2008-03-171-0/+2
| | | | | | | | | | | | Some drivers need to reserve all PCI BARs to prevent other drivers misusing unoccupied BARs. pcim_iomap_regions_request_all() requests all BARs and iomap specified BARs. Signed-off-by: Tejun Heo <htejun@gmail.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* PCI: fix issue with busses registering multiple times in sysfsGreg Kroah-Hartman2008-03-131-0/+1
| | | | | | | | | | | | | | PCI busses can be registered multiple times, so we need to detect if we have registered our bus structure in sysfs already. If so, don't do it again. Thanks to Guennadi Liakhovetski <g.liakhovetski@gmx.de> for reporting the problem, and to Linus for poking me to get me to believe that it was a real problem. Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* rename DECLARE_PCI_DEVICE_TABLE to DEFINE_PCI_DEVICE_TABLEAndrew Morton2008-03-101-2/+2
| | | | | | | | This macro is used to define tables, not to declare them. Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Add DECLARE_PCI_DEVICE_TABLE macroJonas Bonn2008-03-041-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definitions of struct pci_device_id arrays should generally follow the same pattern across the entire kernel. This macro defines this array as const and puts it into the __devinitconst section. There are currently many definitions scattered about the kernel that omit the __devinitdata modifier despite the documentation stating that it should always be there. These definitions really also should have been const, which wasn't possible before but has become so with the addition of the __devinitconst attribute. Furthermore, there are definitions that use "const" and __devinitdata, which is explicitly wrong but the compiler doesn't catch section mismatches if there's only one such one case in the module (which is often the case). Adding the __devinitconst modifier where there was nothing before buys us memory. Adding the const modifier gives the compiler a chance to do its thing. Changing __devinitdata to __devinitconst where it was wrong actually fixes some compiler errors in older (mid-release) kernels that were patched over by "removing" the section attribute altogether (which wastes memory). This macro makes it pretty difficult to get this definition wrong in the future... Signed-off-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Change pci_raw_ops to pci_raw_read/writeMatthew Wilcox2008-02-101-8/+8
| | | | | | | | | | We want to allow different implementations of pci_raw_ops for standard and extended config space on x86. Rather than clutter generic code with knowledge of this, we make pci_raw_ops private to x86 and use it to implement the new raw interface -- raw_pci_read() and raw_pci_write(). Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* iommu sg merging: PCI: add dma segment boundary supportFUJITA Tomonori2008-02-051-0/+7
| | | | | | | | | | | | | | | This adds PCI's accessor for segment_boundary_mask in device_dma_parameters. The default segment_boundary is set to 0xffffffff, same to the block layer's default value (and the scsi mid layer uses the same value). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: Greg KH <greg@kroah.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* iommu sg merging: PCI: add device_dma_parameters supportFUJITA Tomonori2008-02-051-0/+9
| | | | | | | | | | | | | | | This adds struct device_dma_parameters in struct pci_dev and properly sets up a pointer in struct device. The default max_segment_size is set to 64K, same to the block layer's default value. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Mostly-acked-by: Jeff Garzik <jeff@garzik.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Acked-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Revert "PCI: PCIE ASPM support"Greg Kroah-Hartman2008-02-021-5/+0
| | | | | | | | | | | This reverts commit 6c723d5bd89f03fc3ef627d50f89ade054d2ee3b. It caused build errors on non-x86 platforms, config file confusion, and even some boot errors on some x86-64 boxes. All around, not quite ready for prime-time :( Cc: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: make pci_bus a struct deviceGreg Kroah-Hartman2008-02-011-2/+2
| | | | | | | | | | | | | | This moves the pci_bus class device to be a real struct device and at the same time, place it in the device tree in the correct location. Note, the old "bridge" symlink is now gone, but this was a non-standard link and no userspace program used it. If you need to determine the device that the bus is on, follow the standard device symlink, or walk up the device tree. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: fix codingstyle issues in include/linux/pci.hGreg Kroah-Hartman2008-02-011-107/+236
| | | | | | | Fixes a number of coding style issues in pci.h. It's a tad more readable now... Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: PCIE ASPM supportShaohua Li2008-02-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | PCI Express ASPM defines a protocol for PCI Express components in the D0 state to reduce Link power by placing their Links into a low power state and instructing the other end of the Link to do likewise. This capability allows hardware-autonomous, dynamic Link power reduction beyond what is achievable by software-only controlled power management. However, The device should be configured by software appropriately. Enabling ASPM will save power, but will introduce device latency. This patch adds ASPM support in Linux. It introduces a global policy for ASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control it. The interface can be used as a boot option too. Currently we have below setting: -default, BIOS default setting -powersave, highest power saving mode, enable all available ASPM state and clock power management -performance, highest performance, disable ASPM and clock power management By default, the 'default' policy is used currently. In my test, power difference between powersave mode and performance mode is about 1.3w in a system with 3 PCIE links. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Remove pci_enable_device_bars()Benjamin Herrenschmidt2008-02-011-1/+0
| | | | | | | | | Now that all in-tree users are gone, this removes pci_enable_device_bars() completely. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Add pci_enable_device_{io,mem} intefacesBenjamin Herrenschmidt2008-02-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | The pci_enable_device_bars() interface isn't well suited to PCI because you can't actually enable/disable BARs individually on a device. So for example, if a device has 2 memory BARs 0 and 1, and one of them (let's say 1) has not been successfully allocated by the firmware or the kernel, then enabling memory decoding shouldn't be permitted for the entire device since it will decode whatever random address is still in that BAR 1. So a device must be either fully enabled for IO, for Memory, or for both. Not on a per-BAR basis. This provides two new functions, pci_enable_device_io() and pci_enable_device_mem() to replace pci_enable_device_bars(). The implementation internally builds a BAR mask in order to be able to use existing arch infrastructure. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Fix bus resource assignment on 32 bits with 64b resourcesBenjamin Herrenschmidt2008-02-011-2/+2
| | | | | | | | | | | | | The current pci_assign_unassigned_resources() code doesn't work properly on 32 bits platforms with 64 bits resources. The main reason is the use of unsigned long in various places instead of resource_size_t. This is a pre-requisite for making powerpc use the generic code instead of its own half-useful implementation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: export pci_restore_msi_state()Linas Vepstas2008-02-011-0/+2
| | | | | | | | | | | | | | | PCI error recovery usually involves the PCI adapter being reset. If the device is using MSI, the reset will cause the MSI state to be lost; the device driver needs to restore the MSI state. The pci_restore_msi_state() routine is currently protected by CONFIG_PM; remove this, and also export the symbol, so that it can be used in a modle. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: get rid of pci_dev::{vendor,device}_compatible fieldsLennert Buytenhek2008-02-011-5/+0
| | | | | | | | | | | The vendor_compatible and device_compatible fields in struct pci_dev aren't used anywhere, and are somewhat pointless. Assuming that these are historical artifacts, remove them. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pcie: utilize pcie transaction pending bitShaohua Li2008-02-011-0/+2
| | | | | | | | | PCIE has a mechanism to wait for Non-Posted request to complete. I think pci_disable_device is a good place to do this. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: drivers/pci/rom.c: #if 0 two functionsAdrian Bunk2008-02-011-2/+0
| | | | | | | | | | This patch #if 0's the following unused global functions: - rom.c: pci_map_rom_copy() - rom.c: pci_remove_rom() Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: make pci_restore_bars() staticAdrian Bunk2008-02-011-1/+0
| | | | | | | | This patch makes the needlessly global pci_restore_bars() static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* remove __attribute_used__Adrian Bunk2008-01-281-1/+1
| | | | | | | | | Remove the deprecated __attribute_used__. [Introduce __section in a few places to silence checkpatch /sam] Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* PCI: Add Kconfig option to disable deprecated pci_find_* APIJeff Garzik2007-11-051-0/+3
| | | | | | Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: make pci_match_device() staticAdrian Bunk2007-11-051-2/+0
| | | | | | | | pci_match_device() no longer has any other users. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Add quirk for devices which disable MSI when INTX_DISABLE is set.David Miller2007-11-051-0/+9
| | | | | | | | | | | | | | | | | | A reasonably common problem with some devices is that they will disable MSI generation when the INTX_DISABLE bit is set in the PCI_COMMAND register. Quirk this explicitly, guarding the pci_intx() calls in msi.c with this quirk indication. The first entries for this quirk are for 5714 and 5780 Tigon3 chips, and thus we can remove the workaround code from the tg3.c driver. Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Michael Chan <mchan@broadcom.com> Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Intel IOMMU: PCI generic helper functionKeshavamurthy, Anil S2007-10-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | When devices are under a p2p bridge, upstream transactions get replaced by the device id of the bridge as it owns the PCIE transaction. Hence its necessary to setup translations on behalf of the bridge as well. Due to this limitation all devices under a p2p share the same domain in a DMAR. We just cache the type of device, if its a native PCIe device or not for later use. [akpm@linux-foundation.org: BUG_ON -> WARN_ON+recover] Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Ashok Raj <ashok.raj@intel.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Christoph Lameter <clameter@sgi.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: Add 'nodomains' boot option, and pci_domains_supported globalJeff Garzik2007-10-121-2/+5
| | | | | | | | | | | | | | * Introduce pci_domains_supported global, hardcoded to zero if !CONFIG_PCI_DOMAINS. * Introduce 'nodomains' boot option, which clears pci_domains_supported on platforms that enable it by default (x86, x86-64, and others when they are converted to use this). Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: make pcie_get_readrq visible in pci.hBrice Goglin2007-08-221-0/+1
| | | | | | | | | | | | | | [PATCH] PCI: make pcie_get_readrq visible in pci.h pcie_get_readrq() is EXPORT_SYMBOL'ed, but its prototype is not visible in pci.h, add it there. This is needed by some network drivers. Signed-off-by: Brice Goglin <brice@myri.com> Acked-by: Peter Oruba <peter.oruba@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Move prototypes for pci_bus_find_capability to include/linux/pci.hKumar Gala2007-08-221-0/+3
| | | | | | | | | | | We need pci_bus_find_capability() in some arch/powerpc code so move the prototype into a header accessible to it. Also kill the duplicate prototype for pci_bus_alloc_resource(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* pci: rename __pci_reenable_device() to pci_reenable_device()Tejun Heo2007-08-011-1/+1
| | | | | | | Rename __pci_reenable_device() to pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* PCI: export __pci_reenable_device()Tejun Heo2007-07-241-0/+1
| | | | | | | | | | Some odd ACPI implementations choke if certain controller is disabled when ACPI suspend is invoked but we still need to make sure the PCI device is enabled during resume. Simply using pci_enable_device() unbalances device enable count. Export __pci_reenable_device(). Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* fix jvc cdrom drive lockupZhang, Yanmin2007-07-161-0/+3
| | | | | | | | | | | | | | | | | Before calling init_hwif_default, ide_unregister gets lock ide_lock and disables irq. init_hwif_default calls ide_default_io_base which calls pci_get_device and later pci_get_subsys tries to apply for semaphore pci_bus_sem and goes to sleep. Mostly, pci_get_device should be called when irq is turned on. ide_default_io_base just needs find if list pci_devices is empty. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Cc: Greg KH <greg@kroah.com> Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'release' of ↵Linus Torvalds2007-07-121-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Support multiple CPUs going through OS_MCA [IA64] silence GCC ia64 unused variable warnings [IA64] prevent MCA when performing MMIO mmap to PCI config space [IA64] add sn_register_pmi_handler oemcall [IA64] Stop bit for brl instruction [IA64] SN: Correct ROM resource length for BIOS copy [IA64] Don't set psr.ic and psr.i simultaneously
| * [IA64] SN: Correct ROM resource length for BIOS copyJohn Keller2007-07-091-0/+1
| | | | | | | | | | | | | | | | | | | | On SN systems, when setting the IORESOURCE_ROM_BIOS_COPY resource flag, the resource length should be set to the actual size of the ROM image so that a call to pci_map_rom() returns the correct size. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | PCI: add pci_try_set_mwiRandy Dunlap2007-07-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
OpenPOWER on IntegriCloud