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* xtensa: move headers files to arch/xtensa/includeChris Zankel2008-11-061-28/+0
| | | | | | | | | | | | | | Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] Add support for configurable registers and coprocessorsChris Zankel2008-02-131-0/+1
| | | | | | | | | | | | | | | | | | | | The Xtensa architecture allows to define custom instructions and registers. Registers that are bound to a coprocessor are only accessible if the corresponding enable bit is set, which allows to implement a 'lazy' context switch mechanism. Other registers needs to be saved and restore at the time of the context switch or during interrupt handling. This patch adds support for these additional states: - save and restore registers that are used by the compiler upon interrupt entry and exit. - context switch additional registers unbound to any coprocessor - 'lazy' context switch of registers bound to a coprocessor - ptrace interface to provide access to additional registers - update configuration files in include/asm-xtensa/variant-fsf Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] Remove oldmask from sigcontext and fix register flushChris Zankel2008-02-131-3/+0
| | | | | | | Remove oldmask from the sigcontext structure. Also update wmask and windowstart when we flush the AR registers to stack. Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] Remove non-rt signal handlingChris Zankel2007-05-311-19/+5
| | | | | | | | | | | The non-rt signal handling was never really used, so we don't break anything. This patch also cleans up the signal stack-frame to make it independent from the processor configuration. It also improves the method used for controlling single-stepping. We now save and restore the 'icountlevel' register that controls single stepping and set or clear the saved state to enable or disable it. Signed-off-by: Chris Zankel <chris@zankel.net>
* [PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6Chris Zankel2005-06-241-0/+44
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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