summaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc
Commit message (Collapse)AuthorAgeFilesLines
* Correct hash flushing from huge_ptep_set_wrprotect()David Gibson2008-07-082-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As Andy Whitcroft recently pointed out, the current powerpc version of huge_ptep_set_wrprotect() has a bug. It just calls ptep_set_wrprotect() which in turn calls pte_update() then hpte_need_flush() with the 'huge' argument set to 0. This will cause hpte_need_flush() to flush the wrong hash entries (of any). Andy's fix for this is already in the powerpc tree as commit 016b33c4958681c24056abed8ec95844a0da80a3. I have confirmed this is a real bug, not masked by some other synchronization, with a new testcase for libhugetlbfs. A process write a (MAP_PRIVATE) hugepage mapping, fork(), then alter the mapping and have the child incorrectly see the second write. Therefore, this should be fixed for 2.6.26, and for the stable tree. Here is a suitable patch for 2.6.26, which I think will also be suitable for the stable tree (neither of the headers in question has been changed much recently). It is cut down slighlty from Andy's original version, in that it does not include a 32-bit version of huge_ptep_set_wrprotect(). Currently, hugepages are not supported on any 32-bit powerpc platform. When they are, a suitable 32-bit version can be added - the only 32-bit hardware which supports hugepages does not use the conventional hashtable MMU and so will have different needs anyway. Signed-off-by: Andy Whitcroft <apw@shadowen.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* kbuild: fix a.out.h export to userspace with O= build.David Woodhouse2008-06-271-1/+0
| | | | | | | | We need to check for existence of the a.out.h header in the source tree, not the object tree, if we want it to get the right answer with O=. Signed-off-by: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* [POWERPC] Build fix for drivers/macintosh/mediabay.cAdrian Bunk2008-06-161-2/+10
| | | | | | | | | | | | | | | | | | This fixes the following build error with CONFIG_BLK_DEV_IDE_PMAC=n: <-- snip --> ... CC drivers/macintosh/mediabay.o /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/macintosh/mediabay.c: In function 'check_media_bay': /home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/macintosh/mediabay.c:428: error: 'struct media_bay_info' has no member named 'cd_index' make[3]: *** [drivers/macintosh/mediabay.o] Error 1 <-- snip --> Reported-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix rmb to order cacheable vs. noncacheableNick Piggin2008-06-161-1/+1
| | | | | | | | | | lwsync is explicitly defined not to have any effect on the ordering of accesses to device memory, so it cannot be used for rmb(). sync appears to be the only barrier which fits the bill. Signed-off-by: Nick Piggin <npiggin@suse.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'linux-2.6' into mergePaul Mackerras2008-06-161-0/+1
|\
| * KVM: ppc: Remove duplicate functionHollis Blanchard2008-06-061-0/+1
| | | | | | | | | | | | | | This was left behind from some code movement. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* | powerpc/spufs: remove class_0_dsisr from spu exception handlingLuke Browning2008-06-162-2/+1
|/ | | | | | | | | | | | | | | According to the CBEA, the SPU dsisr is not updated for class 0 exceptions. spu_stopped() is testing the dsisr that was passed to it from the class 0 exception handler, so we return a false positive here. This patch cleans up the interrupt handler and erroneous tests in spu_stopped. It also removes the fields from the csa since it is not needed to process class 0 events. Signed-off-by: Luke Browning <lukebrowning@us.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* [POWERPC] Add "memory" clobber to MMIO accessorsBenjamin Herrenschmidt2008-05-311-5/+7
| | | | | | | | | | Gcc might re-order MMIO accessors vs. surrounding consistent memory accesses, which is a "bad thing", and could break drivers. This fixes it by adding a "memory" clobber to the MMIO accessors, which should prevent gcc from doing that reordering. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] mpic: Fix use of uninitialized variableStephen Rothwell2008-05-231-2/+1
| | | | | | | | | | | | | | | | | | | | Compiling ppc64_defconfig with gcc 4.3 gives thes warnings: arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_get_priority': arch/powerpc/sysdev/mpic.c:1351: warning: 'is_ipi' may be used uninitialized in this function arch/powerpc/sysdev/mpic.c: In function 'mpic_irq_set_priority': arch/powerpc/sysdev/mpic.c:1328: warning: 'is_ipi' may be used uninitialized in this function It turns out that in the cases where is_ipi is uninitialized, another variable (mpic) will be NULL and it is dereferenced. Protect against this by returning if mpic is NULL in mpic_irq_set_priority, and removing mpic_irq_get_priority completely as it has no in tree callers. This has the nice side effect of making the warning go away. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix uninitialized variable bug in copy_{to|from}_userNate Case2008-05-151-2/+2
| | | | | | | | | | | | | | Calls to copy_to_user() or copy_from_user() can fail when copying N bytes, where N is a constant less than 8, but not 1, 2, 4, or 8, because 'ret' is not initialized and is only set if the size is 1, 2, 4 or 8, but is tested after the switch statement for any constant size <= 8. This fixes it by initializing 'ret' to 1, causing the code to fall through to the __copy_tofrom_user call for sizes other than 1, 2, 4 or 8. Signed-off-by: Dave Scidmore <dscidmore@xes-inc.com> Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] vmemmap fixes to use smaller pagesBenjamin Herrenschmidt2008-05-152-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes vmemmap to use a different region (region 0xf) of the address space, and to configure the page size of that region dynamically at boot. The problem with the current approach of always using 16M pages is that it's not well suited to machines that have small amounts of memory such as small partitions on pseries, or PS3's. In fact, on the PS3, failure to allocate the 16M page backing vmmemmap tends to prevent hotplugging the HV's "additional" memory, thus limiting the available memory even more, from my experience down to something like 80M total, which makes it really not very useable. The logic used by my match to choose the vmemmap page size is: - If 16M pages are available and there's 1G or more RAM at boot, use that size. - Else if 64K pages are available, use that - Else use 4K pages I've tested on a POWER6 (16M pages) and on an iSeries POWER3 (4K pages) and it seems to work fine. Note that I intend to change the way we organize the kernel regions & SLBs so the actual region will change from 0xf back to something else at one point, as I simplify the SLB miss handler, but that will be for a later patch. Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'for-2.6.26' of ↵Paul Mackerras2008-05-099-54/+32
|\ | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
| * [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 coreStefan Roese2008-05-061-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure fields to the TLB2 word. Those are: Bit 11 12 13 14 15 WL1 IL1I IL1D IL2I IL2D With these bits the cache (L1 and L2) can be configured in a more flexible way, instruction- and data-cache independently now. The "old" I and W bits are still available and setting these old bits will automically set these new bits too (for backward compatibilty). The current code does not clear these fields resulting in disabling the cache by chance. This patch now makes sure that these new bits are cleared when the TLB2 word is written. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * [POWERPC] devres: Add devm_ioremap_prot()Emil Medve2008-05-051-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We provide an ioremap_flags, so this provides a corresponding devm_ioremap_prot. The slight name difference is at Ben Herrenschmidt's request as he plans on changing ioremap_flags to ioremap_prot in the future. Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Tejun Heo <htejun@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * KVM: ppc: Handle guest idle by emulating MSR[WE] writesHollis Blanchard2008-05-042-0/+6
| | | | | | | | | | | | | | | | | | This reduces host CPU usage when the guest is idle. However, the guest must set MSR[WE] in its idle loop, which Linux did not do until 2.6.26. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Jerone Young <jyoung5@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
| * unified (weak) sys_pipe implementationUlrich Drepper2008-05-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This replaces the duplicated arch-specific versions of "sys_pipe()" with one unified implementation. This removes almost 250 lines of duplicated code. It's marked __weak, so that *if* an architecture wants to override the default implementation it can do so by simply having its own replacement version, since many architectures use alternate calling conventions for the 'pipe()' system call for legacy reasons (ie traditional UNIX implementations often return the two file descriptors in registers) I still haven't changed the cris version even though Linus says the BKL isn't needed. The arch maintainer can easily do it if there are really no obstacles. Signed-off-by: Ulrich Drepper <drepper@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-inttypesLinus Torvalds2008-05-031-42/+6
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-inttypes: (24 commits) Make constants in kernel/timeconst.h fixed 64 bits types: add C99-style constructors to <asm-generic/int-*.h> xtensa: types: use <asm-generic/int-*.h> for the xtensa architecture x86: types: use <asm-generic/int-*.h> for the x86 architecture v850: types: use <asm-generic/int-*.h> for the v850 architecture sparc64: types: use <asm-generic/int-*.h> for the sparc64 architecture sparc: types: use <asm-generic/int-*.h> for the sparc architecture sh: types: use <asm-generic/int-*.h> for the sh architecture s390: types: use <asm-generic/int-*.h> for the s390 architecture powerpc: types: use <asm-generic/int-*.h> for the powerpc architecture parisc: types: use <asm-generic/int-*.h> for the parisc architecture mn10300: types: use <asm-generic/int-*.h> for the mn10300 architecture mips: types: use <asm-generic/int-*.h> for the mips architecture m68k: types: use <asm-generic/int-*.h> for the m68k architecture m32r: types: use <asm-generic/int-*.h> for the m32r architecture ia64: types: use <asm-generic/int-*.h> for the ia64 architecture h8300: types: use <asm-generic/int-*.h> for the h8300 architecture frv: types: use <asm-generic/int-*.h> for the frv architecture cris: types: use <asm-generic/int-*.h> for the cris architecture blackfin: types: use <asm-generic/int-*.h> for the blackfin architecture ...
| | * powerpc: types: use <asm-generic/int-*.h> for the powerpc architectureH. Peter Anvin2008-05-021-42/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This modifies <asm-powerpc/types.h> to use the <asm-generic/int-*.h> generic include files. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Anton Blanchard <anton@samba.org>
| * | Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpcLinus Torvalds2008-05-031-3/+0
| |\ \ | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Bolt in SLB entry for kernel stack on secondary cpus [POWERPC] PS3: Update ps3_defconfig [POWERPC] PS3: Remove unsupported wakeup sources [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy static [POWERPC] PS3: Add time include to lpm [POWERPC] Fix slb.c compile warnings [POWERPC] Xilinx: Fix compile warnings [POWERPC] Squash build warning for print of resource_size_t in fsl_soc.c [RAPIDIO] fix current kernel-doc notation [POWERPC] 86xx: mpc8610_hpcd: add support for PCI Express x8 slot Fix a potential issue in mpc52xx uart driver [POWERPC] mpc5200: Allow for fixed speed MII configurations [POWERPC] 86xx: Fix the wrong serial1 interrupt for 8610 board
| * | asm-*/futex.h should include linux/uaccess.hJeff Dike2008-04-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lots of asm-*/futex.h call pagefault_enable and pagefault_disable, which are declared in linux/uaccess.h, without including linux/uaccess.h. They all include asm/uaccess.h, so this patch replaces asm/uaccess.h with linux/uaccess.h. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | Merge branch 'master' of ↵Linus Torvalds2008-04-293-12/+36
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [RAPIDIO] Change RapidIO doorbell source and target ID field to 16-bit [RAPIDIO] Add RapidIO connection info print out and re-training for broken connections [RAPIDIO] Add serial RapidIO controller support, which includes MPC8548, MPC8641 [RAPIDIO] Add RapidIO node probing into MPC86xx_HPCN board id table [RAPIDIO] Add RapidIO node into MPC8641HPCN dts file [RAPIDIO] Auto-probe the RapidIO system size [RAPIDIO] Add OF-tree support to RapidIO controller driver [RAPIDIO] Add RapidIO multi mport support [RAPIDIO] Move include/asm-ppc/rio.h to asm-powerpc [RAPIDIO] Add RapidIO option to kernel configuration [RAPIDIO] Change RIO function mpc85xx_ to fsl_ [POWERPC] Provide walk_memory_resource() for powerpc [POWERPC] Update lmb data structures for hotplug memory add/remove [POWERPC] Hotplug memory remove notifications for powerpc [POWERPC] windfarm: Add PowerMac 12,1 support [POWERPC] Fix building of pmac32 when CONFIG_NVRAM=m [POWERPC] Add IRQSTACKS support on ppc32 [POWERPC] Use __always_inline for xchg* and cmpxchg* [POWERPC] Add fast little-endian switch system call
| * | | kernel: Move arches to use common unaligned accessHarvey Harrison2008-04-291-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unaligned access is ok for the following arches: cris, m68k, mn10300, powerpc, s390, x86 Arches that use the memmove implementation for native endian, and the byteshifting for the opposite endianness. h8300, m32r, xtensa Packed struct for native endian, byteshifting for other endian: alpha, blackfin, ia64, parisc, sparc, sparc64, mips, sh m86knommu is generic_be for Coldfire, otherwise unaligned access is ok. frv, arm chooses endianness based on compiler settings, uses the byteshifting versions. Remove the unaligned trap handler from frv as it is now unused. v850 is le, uses the byteshifting versions for both be and le. Remove the now unused asm-generic implementation. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | | proper __do_softirq() prototypeAdrian Bunk2008-04-291-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a proper prototype for __do_softirq() in include/linux/interrupt.h Signed-off-by: Adrian Bunk <bunk@kernel.org> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | [POWERPC] spufs: handle faults while the context switch pending flag is setLuke Browning2008-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, page fault handlers don't issue a mfc restart if the context switch pending flag is set, which can leave us with a hanging DMA after a context restore. This patch introduces fault pending flag that is set by the fault handler and read by the context switch code, so that the latter can add the restart bit at the right spot, after it has successfuly saved the state of the mfc control register. Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* | | | [POWERPC] spufs: fix concurrent delivery of class 0 & 1 exceptionsLuke Browning2008-05-052-4/+7
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPU class 0 & 1 exceptions may occur in parallel, so we may end up overwriting csa.dsisr. This change adds dedicated fields for each class to the spu and the spu context so that fault data is not overwritten. Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
* | | [POWERPC] PS3: Make ps3_virq_setup and ps3_virq_destroy staticGeert Uytterhoeven2008-05-021-3/+0
| |/ |/| | | | | | | | | | | | | | | The routines ps3_virq_setup() and ps3_virq_destroy() are used in only one file, so make them static. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [RAPIDIO] Move include/asm-ppc/rio.h to asm-powerpcZhang Wei2008-04-291-0/+18
| | | | | | | | | | | | Signed-off-by: Zhang Wei <wei.zhang@freescale.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Add IRQSTACKS support on ppc32Kumar Gala2008-04-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes it possible to use separate stacks for hard and soft IRQs on 32-bit powerpc as well as on 64-bit. The code for 32-bit is just the 32-bit analog of the 64-bit code. * Added allocation and initialization of the irq stacks. We limit the stacks to be in lowmem for ppc32. * Implemented ppc32 versions of call_do_softirq() and call_handle_irq() to switch the stack pointers * Reworked how we do stack overflow detection. We now keep around the limit of the stack in the thread_struct and compare against the limit to see if we've overflowed. We can now use this on ppc64 if desired. [ paulus@samba.org: Fixed bug on 6xx where we need to reload r9 with the thread_info pointer. ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Use __always_inline for xchg* and cmpxchg*Paul Mackerras2008-04-291-12/+12
|/ | | | | | | | | | | | This changes the definitions of the xchg and cmpxchg families of functions in include/asm-powerpc/system.h to be marked __always_inline rather than __inline__. The reason for doing this is that we rely on the compiler inlining them in order to eliminate the references to __xchg_called_with_bad_pointer and __cmpxchg_called_with_bad_pointer, which are deliberately left undefined. Thus this change will enable us to make the inline keyword be just a hint rather than a directive. Signed-off-by: Paul Mackerras <paulus@samba.org>
* hugetlbfs: common code update for s390Gerald Schaefer2008-04-281-0/+37
| | | | | | | | | | | | | | | | | | | | Huge ptes have a special type on s390 and cannot be handled with the standard pte functions in certain cases, e.g. because of a different location of the invalid bit. This patch adds some new architecture- specific functions to hugetlb common code, as a prerequisite for the s390 large page support. This won't affect other architectures in functionality, but I need to add some new dummy inline functions to the headers. Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* hugetlbfs: add missing TLB flush to hugetlb_cow()Gerald Schaefer2008-04-281-0/+5
| | | | | | | | | | | | | | | | | | | | | | | A cow break on a hugetlbfs page with page_count > 1 will set a new pte with set_huge_pte_at(), w/o any tlb flush operation. The old pte will remain in the tlb and subsequent write access to the page will result in a page fault loop, for as long as it may take until the tlb is flushed from somewhere else. This patch introduces an architecture-specific huge_ptep_clear_flush() function, which is called before the the set_huge_pte_at() in hugetlb_cow(). ATTENTION: This is just a nop on all architectures for now, the s390 implementation will come with our large page patch later. Other architectures should define their own huge_ptep_clear_flush() if needed. Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* hugetlbfs: architecture header cleanupGerald Schaefer2008-04-282-7/+37
| | | | | | | | | | | | | | | | | | | | | | | This patch moves all architecture functions for hugetlb to architecture header files (include/asm-foo/hugetlb.h) and converts all macros to inline functions. It also removes (!) ARCH_HAS_HUGEPAGE_ONLY_RANGE, ARCH_HAS_HUGETLB_FREE_PGD_RANGE, ARCH_HAS_PREPARE_HUGEPAGE_RANGE, ARCH_HAS_SETCLEAR_HUGE_PTE and ARCH_HAS_HUGETLB_PREFAULT_HOOK. Getting rid of the ARCH_HAS_xxx #ifdef and macro fugliness should increase readability and maintainability, at the price of some code duplication. An asm-generic common part would have reduced the loc, but we would end up with new ARCH_HAS_xxx defines eventually. Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm: introduce pte_special pte bitNick Piggin2008-04-282-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | s390 for one, cannot implement VM_MIXEDMAP with pfn_valid, due to their memory model (which is more dynamic than most). Instead, they had proposed to implement it with an additional path through vm_normal_page(), using a bit in the pte to determine whether or not the page should be refcounted: vm_normal_page() { ... if (unlikely(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP))) { if (vma->vm_flags & VM_MIXEDMAP) { #ifdef s390 if (!mixedmap_refcount_pte(pte)) return NULL; #else if (!pfn_valid(pfn)) return NULL; #endif goto out; } ... } This is fine, however if we are allowed to use a bit in the pte to determine refcountedness, we can use that to _completely_ replace all the vma based schemes. So instead of adding more cases to the already complex vma-based scheme, we can have a clearly seperate and simple pte-based scheme (and get slightly better code generation in the process): vm_normal_page() { #ifdef s390 if (!mixedmap_refcount_pte(pte)) return NULL; return pte_page(pte); #else ... #endif } And finally, we may rather make this concept usable by any architecture rather than making it s390 only, so implement a new type of pte state for this. Unfortunately the old vma based code must stay, because some architectures may not be able to spare pte bits. This makes vm_normal_page a little bit more ugly than we would like, but the 2 cases are clearly seperate. So introduce a pte_special pte state, and use it in mm/memory.c. It is currently a noop for all architectures, so this doesn't actually result in any compiled code changes to mm/memory.o. BTW: I haven't put vm_normal_page() into arch code as-per an earlier suggestion. The reason is that, regardless of where vm_normal_page is actually implemented, the *abstraction* is still exactly the same. Also, while it depends on whether the architecture has pte_special or not, that is the only two possible cases, and it really isn't an arch specific function -- the role of the arch code should be to provide primitive functions and accessors with which to build the core code; pte_special does that. We do not want architectures to know or care about vm_normal_page itself, and we definitely don't want them being able to invent something new there out of sight of mm/ code. If we made vm_normal_page an arch function, then we have to make vm_insert_mixed (next patch) an arch function too. So I don't think moving it to arch code fundamentally improves any abstractions, while it does practically make the code more difficult to follow, for both mm and arch developers, and easier to misuse. [akpm@linux-foundation.org: build fix] Signed-off-by: Nick Piggin <npiggin@suse.de> Acked-by: Carsten Otte <cotte@de.ibm.com> Cc: Jared Hulbert <jaredeh@gmail.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* KVM: ppc: PowerPC 440 KVM implementationHollis Blanchard2008-04-275-2/+383
| | | | | | | | | | | | | | | | This functionality is definitely experimental, but is capable of running unmodified PowerPC 440 Linux kernels as guests on a PowerPC 440 host. (Only tested with 440EP "Bamboo" guests so far, but with appropriate userspace support other SoC/board combinations should work.) See Documentation/powerpc/kvm_440.txt for technical details. [stephen: build fix] Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Avi Kivity <avi@qumranet.com>
* ppc: Export tlb_44x_hwater for KVMHollis Blanchard2008-04-271-0/+2
| | | | | | | | | | | PowerPC 440 KVM needs to know how many TLB entries are used for the host kernel linear mapping (it does not modify these mappings when switching between guest and host execution). Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Avi Kivity <avi@qumranet.com>
* generic: implement __fls on all 64-bit archsAlexander van Heukelum2008-04-261-0/+5
| | | | | | | | | | | | | | | | | | | | | Implement __fls on all 64-bit archs: alpha has an implementation of fls64. Added __fls(x) = fls64(x) - 1. ia64 has fls, but not __fls. Added __fls based on code of fls. mips and powerpc have __ilog2, which is the same as __fls. Added __fls = __ilog2. parisc, s390, sh and sparc64: Include generic __fls. x86_64 already has __fls. Signed-off-by: Alexander van Heukelum <heukelum@fastmail.fm> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* [POWERPC] cell: Generalize io-workarounds codeIshizaki Kou2008-04-242-54/+55
| | | | | | | | | | This splits cell io-workaround code into spider-pci dependent code and a generic part, and also moves io-workarounds initialization into cell_setup_phb. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Raise the upper limit of NR_CPUS and move the pacas into the BSSTony Breeds2008-04-241-0/+1
| | | | | | | | | | | | | | This adds the required functionality to fill in all pacas at runtime. With NR_CPUS=1024 text data bss dec hex filename 137 1704032 0 1704169 1a00e9 arch/powerpc/kernel/paca.o :Before 121 1179744 524288 1704153 1a00d9 arch/powerpc/kernel/paca.o :After Also remove unneeded #includes from arch/powerpc/kernel/paca.c Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Port fixmap from x86 and use for kmap_atomicKumar Gala2008-04-242-19/+128
| | | | | | | | | | | | | | | | | | | The fixmap code from x86 allows us to have compile time virtual addresses that we change the physical addresses of at run time. This is useful for applications like kmap_atomic, PCI config that is done via direct memory map, kexec/kdump. We got ride of CONFIG_HIGHMEM_START as we can now determine a more optimal location for PKMAP_BASE based on where the fixmap addresses start and working back from there. Additionally, the kmap code in asm-powerpc/highmem.h always had debug enabled. Moved to using CONFIG_DEBUG_HIGHMEM to determine if we should have the extra debug checking. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] 85xx: Add support for relocatable kernel (and booting at non-zero)Kumar Gala2008-04-243-13/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support to allow an 85xx kernel to be run from a non-zero physical address (useful for cooperative asymmetric multiprocessing situations and kdump). The support can be configured at compile time by setting CONFIG_PAGE_OFFSET, CONFIG_KERNEL_START, and CONFIG_PHYSICAL_START as desired. Alternatively, the kernel build can set CONFIG_RELOCATABLE. Setting this config option causes the kernel to determine at runtime the physical addresses of CONFIG_PAGE_OFFSET and CONFIG_KERNEL_START. If CONFIG_RELOCATABLE is set, then CONFIG_PHYSICAL_START has no meaning. However, CONFIG_PHYSICAL_START will always be used to set the LOAD program header physical address field in the resulting ELF image. Currently we are limited to running at a physical address that is a multiple of 256M. This is due to how we map TLBs to cover lowmem. This should be fixed to allow 64M or maybe even 16M alignment in the future. It is considered an error to try and run a kernel at a non-aligned physical address. All the magic for this support is accomplished by proper initialization of the kernel memory subsystem and use of ARCH_PFN_OFFSET. The use of ARCH_PFN_OFFSET only affects normal memory and not IO mappings. ioremap uses map_page and isn't affected by ARCH_PFN_OFFSET. /dev/mem continues to allow access to any physical address in the system regardless of how CONFIG_PHYSICAL_START is set. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix kernel stack allocation alignmentBenjamin Herrenschmidt2008-04-241-6/+2
| | | | | | | | | | | | | | | | | | | | | The powerpc kernel stacks need to be naturally aligned, as they contain the thread info at the bottom, which is obtained by clearing the low bits of the stack pointer. However, when using 64K pages, the stack is smaller than a page, so we use kmalloc to allocate it, but that doesn't provide the alignment guarantee we need. It appeared to work so far... until one enables SLUB debugging which then returns unaligned pointers. Ooops... This fixes it by using a slab cache with enforced alignment. It relies on my previous patch that adds a thread_info_cache_init() callback. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'master' of ↵Linus Torvalds2008-04-2144-280/+786
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (202 commits) [POWERPC] Fix compile breakage for 64-bit UP configs [POWERPC] Define copy_siginfo_from_user32 [POWERPC] Add compat handler for PTRACE_GETSIGINFO [POWERPC] i2c: Fix build breakage introduced by OF helpers [POWERPC] Optimize fls64() on 64-bit processors [POWERPC] irqtrace support for 64-bit powerpc [POWERPC] Stacktrace support for lockdep [POWERPC] Move stackframe definitions to common header [POWERPC] Fix device-tree locking vs. interrupts [POWERPC] Make pci_bus_to_host()'s struct pci_bus * argument const [POWERPC] Remove unused __max_memory variable [POWERPC] Simplify xics direct/lpar irq_host setup [POWERPC] Use pseries_setup_i8259_cascade() in pseries_mpic_init_IRQ() [POWERPC] Turn xics_setup_8259_cascade() into a generic pseries_setup_i8259_cascade() [POWERPC] Move xics_setup_8259_cascade() into platforms/pseries/setup.c [POWERPC] Use asm-generic/bitops/find.h in bitops.h [POWERPC] 83xx: mpc8315 - fix USB UTMI Host setup [POWERPC] 85xx: Fix the size of qe muram for MPC8568E [POWERPC] 86xx: mpc86xx_hpcn - Temporarily accept old dts node identifier. [POWERPC] 86xx: mark functions static, other minor cleanups ...
| * [POWERPC] Fix compile breakage for 64-bit UP configsPaul Mackerras2008-04-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | The rearrangements in 945feb174b14e7098cc7ecf0cf4768d35bc52f9c ("[POWERPC] irqtrace support for 64-bit powerpc") caused 64-bit non-SMP configs to fail to compile with a message about local_irq_save being undefined in include/linux/proportions.h. This follows the lead of x86 in including <linux/irqflags.h> in asm/system.h, which fixes the problem. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Optimize fls64() on 64-bit processorsPaul Mackerras2008-04-181-0/+17
| | | | | | | | | | | | | | | | 64-bit powerpc processors can find the leftmost 1 bit in a 64-bit doubleword in one instruction, so use that rather than using the generic fls64(), which does two 32-bit fls() calls. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] irqtrace support for 64-bit powerpcBenjamin Herrenschmidt2008-04-185-30/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds the low level irq tracing hooks to the powerpc architecture needed to enable full lockdep functionality. This is partly based on Johannes Berg's initial version. I removed the asm trampoline that isn't needed (thus improving performance) and modified all sorts of bits and pieces, reworking most of the assembly, etc... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Move stackframe definitions to common headerBenjamin Herrenschmidt2008-04-181-0/+9
| | | | | | | | | | | | | | | | This moves various definitions used all over the place to parse stack frames to ptrace.h so only one definition is needed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Make pci_bus_to_host()'s struct pci_bus * argument constTrent Piepho2008-04-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | A) It's not modified and so it can be made const. const is good. B) If one has a function that was given a const pci_bus pointer and you want to get a pointer to its pci_controller, you'll get a warning from gcc when you use pci_bus_to_host(). This is the right way to stop that warning. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Use asm-generic/bitops/find.h in bitops.hAlexander van Heukelum2008-04-181-16/+1
| | | | | | | | | | | | | | | | | | Powerpc and ppc have some code in their bitops.h that is exactly the same as asm-generic/bitops/find.h. Include this header instead of the private implementation. Signed-off-by: Alexander van Heukelum <heukelum@fastmail.fm> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] QE: export qe_get_brg_clk()Anton Vorontsov2008-04-171-0/+1
| | | | | | | | | | | | | | qe_get_brg_clk() will be used by the fsl_gtm routines. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] QE: immap_qe.h should include asm/io.hAnton Vorontsov2008-04-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Headers should include prototypes they use, otherwise build will break if we use it without explicitly including io.h: CC arch/powerpc/sysdev/qe_lib/gtm.o In file included from include/asm/qe.h:20, from arch/powerpc/sysdev/qe_lib/gtm.c:18: include/asm/immap_qe.h: In function ‘immrbar_virt_to_phys’: include/asm/immap_qe.h:480: error: implicit declaration of function ‘virt_to_phys’ make[2]: *** [arch/powerpc/sysdev/qe_lib/gtm.o] Error 1 make[1]: *** [arch/powerpc/sysdev/qe_lib] Error 2 gtm.c needs qe.h (which includes immap_qe.h) to use qe_get_brg_clk(). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
OpenPOWER on IntegriCloud