summaryrefslogtreecommitdiffstats
path: root/include/asm-powerpc/hw_irq.h
Commit message (Collapse)AuthorAgeFilesLines
* powerpc: fixup hard_irq_disable semanticsBenjamin Herrenschmidt2007-05-111-2/+9
| | | | | | | | | | | | | | | | | | | | This patch renames the raw hard_irq_{enable,disable} into __hard_irq_{enable,disable} and introduces a higher level hard_irq_disable() function that can be used by any code to enforce that IRQs are fully disabled, not only lazy disabled. The difference with the __ versions is that it will update some per-processor fields so that the kernel keeps track and properly re-enables them in the next local_irq_disable(); This prepares powerpc for my next patch that introduces hard_irq_disable() generically. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [POWERPC] Delete unused irq functions on powerpcMatthew Wilcox2006-12-081-19/+0
| | | | | | | | | The ack_irq macro is unused and conflicts with James' work to template the generic irq code. mask_irq and unmask_irq are also unused, so delete those macros too. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Provide dummy hard_irq_enable/disable() for PPC32Michael Ellerman2006-12-041-0/+3
| | | | | | | | | | | | | | To allow arch/powerpc/kernel/crash.c to build on 32-bit we need a definition of hard_irq_disable(). 32-bit doesn't support the lazy interrupt disabling mechanism, so on 32-bit hard_irq_disable() is simply local_irq_disable(). Add a definition for hard_irq_enable() just for completeness. This allows (KEXEC=y && PPC32=y) to build again. Broken since d04c56f73c30a5e593202ecfcf25ed43d42363a2. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make soft_enabled irqs preempt safeHugh Dickins2006-12-041-5/+15
| | | | | | | | | Rewrite local_get_flags and local_irq_disable to use r13 explicitly, to avoid the risk that gcc will split get_paca()->soft_enabled into a sequence unsafe against preemption. Similar care in local_irq_restore. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Lazy interrupt disabling for 64-bit machinesPaul Mackerras2006-10-161-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements a lazy strategy for disabling interrupts. This means that local_irq_disable() et al. just clear the 'interrupts are enabled' flag in the paca. If an interrupt comes along, the interrupt entry code notices that interrupts are supposed to be disabled, and clears the EE bit in SRR1, clears the 'interrupts are hard-enabled' flag in the paca, and returns. This means that interrupts only actually get disabled in the processor when an interrupt comes along. When interrupts are enabled by local_irq_enable() et al., the code sets the interrupts-enabled flag in the paca, and then checks whether interrupts got hard-disabled. If so, it also sets the EE bit in the MSR to hard-enable the interrupts. This has the potential to improve performance, and also makes it easier to make a kernel that can boot on iSeries and on other 64-bit machines, since this lazy-disable strategy is very similar to the soft-disable strategy that iSeries already uses. This version renames paca->proc_enabled to paca->soft_enabled, and changes a couple of soft-disables in the kexec code to hard-disables, which should fix the crash that Michael Ellerman saw. This doesn't yet use a reserved CR field for the soft_enabled and hard_enabled flags. This applies on top of Stephen Rothwell's patches to make it possible to build a combined iSeries/other kernel. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] genirq: add ->retrigger() irq op to consolidate hw_irq_resend()Ingo Molnar2006-06-291-3/+3
| | | | | | | | | | | | Add ->retrigger() irq op to consolidate hw_irq_resend() implementations. (Most architectures had it defined to NOP anyway.) NOTE: ia64 needs testing. i386 and x86_64 tested. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] genirq: rename desc->handler to desc->chipIngo Molnar2006-06-291-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch-queue improves the generic IRQ layer to be truly generic, by adding various abstractions and features to it, without impacting existing functionality. While the queue can be best described as "fix and improve everything in the generic IRQ layer that we could think of", and thus it consists of many smaller features and lots of cleanups, the one feature that stands out most is the new 'irq chip' abstraction. The irq-chip abstraction is about describing and coding and IRQ controller driver by mapping its raw hardware capabilities [and quirks, if needed] in a straightforward way, without having to think about "IRQ flow" (level/edge/etc.) type of details. This stands in contrast with the current 'irq-type' model of genirq architectures, which 'mixes' raw hardware capabilities with 'flow' details. The patchset supports both types of irq controller designs at once, and converts i386 and x86_64 to the new irq-chip design. As a bonus side-effect of the irq-chip approach, chained interrupt controllers (master/slave PIC constructs, etc.) are now supported by design as well. The end result of this patchset intends to be simpler architecture-level code and more consolidation between architectures. We reused many bits of code and many concepts from Russell King's ARM IRQ layer, the merging of which was one of the motivations for this patchset. This patch: rename desc->handler to desc->chip. Originally i did not want to do this, because it's a big patch. But having both "desc->handler", "desc->handle_irq" and "action->handler" caused a large degree of confusion and made the code appear alot less clean than it truly is. I have also attempted a dual approach as well by introducing a desc->chip alias - but that just wasnt robust enough and broke frequently. So lets get over with this quickly. The conversion was done automatically via scripts and converts all the code in the kernel. This renaming patch is the first one amongst the patches, so that the remaining patches can stay flexible and can be merged and split up without having some big monolithic patch act as a merge barrier. [akpm@osdl.org: build fix] [akpm@osdl.org: another build fix] Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-261-1/+0
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* ppc64: remove ppc_irq_dispatch_handlerStephen Rothwell2005-11-091-1/+0
| | | | | | | Use __do_IRQ instead. The only difference is that every controller is now assumed to have an end() routine (only xics_8259 did not). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* powerpc: Get 64-bit configs to compile with ARCH=powerpcPaul Mackerras2005-10-101-1/+0
| | | | | | | | This is a bunch of mostly small fixes that are needed to get ARCH=powerpc to compile for 64-bit. This adds setup_64.c from arch/ppc64/kernel/setup.c and locks.c from arch/ppc64/lib/locks.c. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: merged hw_irq.hKumar Gala2005-09-221-0/+115
Merged hw_irq.h between ppc32 & ppc64. Added support to use the Book-E wrtee[i] instructions that allow modifying MSR[EE] atomically. Additionally, added get_irq_desc() macros to ppc32 to allow mask_irq(), unmask_irq(), and ack_irq() to be common between ppc32 & ppc64. Note: because 64-bit Book-E implementations only have a 32-bit MSR the macro's for Book-E need to come before the PPC64 macro's to ensure the right thing happends for 64-bit Book-E processors. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
OpenPOWER on IntegriCloud