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path: root/include/asm-mips/mipsregs.h
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* [MIPS] PMC MSP71xx mips commonMarc St-Jean2007-07-101-0/+33
* [MIPS] Enable support for the userlocal hardware registerRalf Baechle2007-07-101-1/+5
* [MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle2007-07-061-0/+2
* [MIPS] Remove unused R10000 performance counter definitions.Ralf Baechle2006-11-301-56/+0
* [MIPS] vr41xx: Replace magic number for P4K bit with symbol.Yoichi Yuasa2006-07-131-0/+1
* [MIPS] TRACE_IRQFLAGS_SUPPORT support.Ralf Baechle2006-07-131-1/+1
* [MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.Yoichi Yuasa2006-07-131-0/+1
* [MIPS] Fix use of ehb instruction for non-R2 configurations.Ralf Baechle2006-06-291-1/+2
* Merge git://git.infradead.org/hdrcleanup-2.6Linus Torvalds2006-06-201-1/+0
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| * Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-261-1/+0
* | [MIPS] Cleanup __emt() a bit.Ralf Baechle2006-06-191-3/+1
* | [MIPS] DSP and MDMX share the same config flag bit.Thiemo Seufer2006-06-011-1/+1
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* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-191-0/+133
* [MIPS] Provide access functions for c0_badvaddr.Ralf Baechle2006-04-191-0/+3
* MIPS: DSP: Put mask field into the right place.Ralf Baechle2006-01-101-1/+1
* Virtual SMP support for the 34K.Ralf Baechle2005-10-291-2/+0
* Fix parenthesis in macros.Ralf Baechle2005-10-291-3/+3
* Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov2005-10-291-0/+12
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-291-0/+1
* Macros to access the register of processors using the new MIPSRalf Baechle2005-10-291-0/+2
* A few more macros to access MIPS R2 architecture registers.Ralf Baechle2005-10-291-0/+28
* Get the thing to compile again ...Ralf Baechle2005-10-291-1/+1
* Use macros for the RM7k cp0.config bits instead of magic numbers.Maciej W. Rozycki2005-10-291-2/+7
* Remove dead code which was causing warnings.Ralf Baechle2005-10-291-3/+0
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-291-0/+287
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-291-1/+46
* Better interface to run uncached cache setup code.Thiemo Seufer2005-10-291-0/+3
* Provide functions to access cop0 config4-7 registersRalf Baechle2005-10-291-0/+8
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+1018
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