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* [MIPS] SB1: Build fix.Ralf Baechle2007-05-111-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] FPU hazard handlingChris Dearman2007-05-111-0/+32
| | | | | | | | Move FPU hazard handling to hazards.h and provide proper support for MIPSR2 processors Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix pipeline hazard.Ralf Baechle2007-03-241-0/+1
| | | | | | | | | | | | | In the the sequence: ei .. mfc0 $x, $status the mfc0 may not see the SR_IE bit set. This was a deliberate bug in the kernel code because we knew this was a safe thing to do on all R2 silicon so far but new silicon is changing this. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vr41xx: need one more nop with mtc0_tlbw_hazard()Yoichi Yuasa2007-01-241-1/+1
| | | | | | | NEC VR4111 and VR4121 need one more nop with mtc0_tlbw_hazard(). Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.Ralf Baechle2006-09-271-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Cleanup hazard handling.Ralf Baechle2006-09-271-236/+126
| | | | | | Mostly based on patch by Chris Dearman and cleanups from Yoichi. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add missing backslashes to macro definitions.Ralf Baechle2006-06-291-2/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-261-1/+0
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-191-0/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SB1: Fix interrupt disable hazard.Ralf Baechle2006-03-181-77/+103
| | | | | | | The SB1 core has a three cycle interrupt disable hazard but we were wrongly treating it as fully interlocked. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix C version of ssnop to use the right opcode.Ralf Baechle2006-02-071-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.Ralf Baechle2006-01-101-5/+15
| | | | | | | | | | | Gcc has a tradition of misscompiling the previous construct using the address of a label as argument to inline assembler. Gas otoh has the annoying difference between la and dla which are only usable for 32-bit rsp. 64-bit code, so can't be used without conditional compilation. The alterantive is switching the assembler to 64-bit code which happens to work right even for 32-bit code ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fixup a few lose ends in explicit support for MIPS R1/R2.Ralf Baechle2005-10-291-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Use R4000 TLB routines for SB1 also.Ralf Baechle2005-10-291-2/+4
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Cleanups.Ralf Baechle2005-10-291-10/+12
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS R2 instruction hazard handling.Ralf Baechle2005-10-291-0/+16
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* One definition of back_to_back_c0_hazard too much.Ralf Baechle2005-10-291-6/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* New hazard handling function back_to_back_c0_hazard() to handle back toRalf Baechle2005-10-291-0/+21
| | | | | | back mtc0 / mfc0 pairs from the same coprocessor register. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+217
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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