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* i386/x86_64: move headers to include/asm-x86Thomas Gleixner2007-10-111-161/+0
| | | | | | | | Move the headers to include/asm-x86 and fixup the header install make rules Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* i386: msr.h: be paranoid about types and parenthesesH. Peter Anvin2007-05-091-27/+22
| | | | | | | | | | | When implementing things as macros, make sure we use typecasts and parentheses where needed. The macros as defined were vulnerable to surreptitious promotion causing problems. Avoid macros where practical; e.g. wrmsr() can be an inline instead. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* i386: remove unused rdtsc() macroH. Peter Anvin2007-05-091-7/+0
| | | | | | | | All users to the two-part rdtsc() macro have already switched to using rdtscl() or rdtscll(). Remove the now-obsolete macro. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* i386: Add safe variants of rdmsr_on_cpu and wrmsr_on_cpuRudolf Marek2007-05-081-1/+11
| | | | | | | | | | | | | | Add safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu. You should use these when the target MSR may not actually exist, as doing so could trigger an exception which the regular functions do not handle. The safe variants are slower, though. The upcoming coretemp hardware monitoring driver will need this. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Cc: Alexey Dobriyan <adobriyan@openvz.org> Cc: Dave Jones <davej@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
* [PATCH] x86: Clean up x86 control register and MSR macros (corrected)H. Peter Anvin2007-05-021-230/+7
| | | | | | | | | | | | This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs. It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Andi Kleen <ak@suse.de>
* [PATCH] i386: rationalize paravirt wrappersRusty Russell2007-05-021-53/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | paravirt.c used to implement native versions of all low-level functions. Far cleaner is to have the native versions exposed in the headers and as inline native_XXX, and if !CONFIG_PARAVIRT, then simply #define XXX native_XXX. There are several nice side effects: 1) write_dt_entry() now takes the correct "struct Xgt_desc_struct *" not "void *". 2) load_TLS is reintroduced to the for loop, not manually unrolled with a #error in case the bounds ever change. 3) Macros become inlines, with type checking. 4) Access to the native versions is trivial for KVM, lguest, Xen and others who might want it. Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Cc: Avi Kivity <avi@qumranet.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
* [PATCH] x86-64: Disable local APIC timer use on AMD systems with C1EAndi Kleen2007-04-021-0/+2
| | | | | | | | | | | | | | | AMD dual core laptops with C1E do not run the APIC timer correctly when they go idle. Previously the code assumed this only happened on C2 or deeper. But not all of these systems report support C2. Use a AMD supplied snippet to detect C1E being enabled and then disable local apic timer use. This supercedes an earlier workaround using DMI detection of specific systems. Thanks to Mark Langsdorf for the detection snippet. Signed-off-by: Andi Kleen <ak@suse.de>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreqLinus Torvalds2007-02-261-0/+14
|\ | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] constify some data tables. [CPUFREQ] constify cpufreq_driver where possible. {rd,wr}msr_on_cpu SMP=n optimization [CPUFREQ] cpufreq_ondemand.c: don't use _WORK_NAR rdmsr_on_cpu, wrmsr_on_cpu [CPUFREQ] Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI
| * {rd,wr}msr_on_cpu SMP=n optimizationAdrian Bunk2007-02-201-0/+11
| | | | | | | | | | | | | | Let's save a few bytes in the CONFIG_SMP=n case. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave Jones <davej@redhat.com>
| * rdmsr_on_cpu, wrmsr_on_cpuAlexey Dobriyan2007-02-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There was OpenVZ specific bug rendering some cpufreq drivers unusable on SMP. In short, when cpufreq code thinks it confined itself to needed cpu by means of set_cpus_allowed() to execute rdmsr, some "virtual cpu" feature can migrate process to anywhere. This triggers bugons and does wrong things in general. This got fixed by introducing rdmsr_on_cpu and wrmsr_on_cpu executing rdmsr and wrmsr on given physical cpu by means of smp_call_function_single(). Dave Jones mentioned cpufreq might be not only user of rdmsr_on_cpu() and wrmsr_on_cpu(), so I'm putting them into arch/{i386,x86_64}/lib/ . Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Jones <davej@redhat.com>
* | [PATCH] Mark TSC on GeodeLX reliableMarcelo Tosatti2007-02-161-0/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | | The Geode can safely use the TSC for highres, since: 1) Does not support frequency scaling, 2) The TSC _does_ count when the CPU is halted. Furthermore, the Geode supports a mode called "suspension on halt", where Suspend mode (which interacts with the power management states) is entered. TSC counting during suspend mode is controlled by bit 8 of the Bus Controller Configuration Register #0 (thanks Tom!). 3) no SMP :) Check if "RTSC counts during suspension" and remove the requirement for verification, so the clocksource code can safely select it as an timesource for the highres timers subsystem. Signed-off-by: Marcelo Tosatti <marcelo@kvack.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: john stultz <johnstul@us.ibm.com> Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge ../linusDave Jones2006-12-121-0/+18
|\ | | | | | | | | | | Conflicts: drivers/cpufreq/cpufreq.c
| * [PATCH] paravirt: header and stubs for paravirtualisationRusty Russell2006-12-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a paravirt.h header for all the critical operations which need to be replaced with hypervisor calls, and include that instead of defining native operations, when CONFIG_PARAVIRT. This patch does the dumbest possible replacement of paravirtualized instructions: calls through a "paravirt_ops" structure. Currently these are function implementations of native hardware: hypervisors will override the ops structure with their own variants. All the pv-ops functions are declared "fastcall" so that a specific register-based ABI is used, to make inlining assember easier. And: +From: Andy Whitcroft <apw@shadowen.org> The paravirt ops introduce a 'weak' attribute onto memory_setup(). Code ordering leads to the following warnings on x86: arch/i386/kernel/setup.c:651: warning: weak declaration of `memory_setup' after first use results in unspecified behavior Move memory_setup() to avoid this. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andy Whitcroft <apw@shadowen.org>
| * [PATCH] i386: add Intel Core related PMU MSRsStephane Eranian2006-12-071-0/+13
| | | | | | | | | | | | | | | | | | - add Intel Precise-Event Based sampling (PEBS) related MSR - add Intel Data Save (DS) Area related MSR - add Intel Core microarchitecure performance counter MSRs Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
* | [CPUFREQ] p4-clockmod: add more CPUsDominik Brodowski2006-11-061-0/+2
| | | | | | | | | | | | | | | | | | Several more Intel CPUs are now capable using the p4-clockmod cpufreq driver. As it is of limited use most of the time, print a big bold warning if a better cpufreq driver might be available. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Dave Jones <davej@redhat.com>
* | [CPUFREQ][8/8] acpi-cpufreq: Add support for freq feedback from hardwareVenkatesh Pallipadi2006-10-151-0/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable ondemand governor and acpi-cpufreq to use IA32_APERF and IA32_MPERF MSR to get active frequency feedback for the last sampling interval. This will make ondemand take right frequency decisions when hardware coordination of frequency is going on. Without APERF/MPERF, ondemand can take wrong decision at times due to underlying hardware coordination or TM2. Example: * CPU 0 and CPU 1 are hardware cooridnated. * CPU 1 running at highest frequency. * CPU 0 was running at highest freq. Now ondemand reduces it to some intermediate frequency based on utilization. * Due to underlying hardware coordination with other CPU 1, CPU 0 continues to run at highest frequency (as long as other CPU is at highest). * When ondemand samples CPU 0 again next time, without actual frequency feedback from APERF/MPERF, it will think that previous frequency change was successful and can go to wrong target frequency. This is because it thinks that utilization it has got this sampling interval is when running at intermediate frequency, rather than actual highest frequency. More information about IA32_APERF IA32_MPERF MSR: Refer to IA-32 Intel® Architecture Software Developer's Manual at http://developer.intel.com Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
* [PATCH] x86: more asm cleanupsZachary Amsden2005-09-051-0/+15
| | | | | | | | | Some more assembler cleanups I noticed along the way. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+272
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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