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* Merge branch 'for-linus' of ↵Linus Torvalds2008-07-231-0/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits) I/OAT: I/OAT version 3.0 support I/OAT: tcp_dma_copybreak default value dependent on I/OAT version I/OAT: Add watchdog/reset functionality to ioatdma iop_adma: cleanup iop_chan_xor_slot_count iop_adma: document how to calculate the minimum descriptor pool size iop_adma: directly reclaim descriptors on allocation failure async_tx: make async_tx_test_ack a boolean routine async_tx: remove depend_tx from async_tx_sync_epilog async_tx: export async_tx_quiesce async_tx: fix handling of the "out of descriptor" condition in async_xor async_tx: ensure the xor destination buffer remains dma-mapped async_tx: list_for_each_entry_rcu() cleanup dmaengine: Driver for the Synopsys DesignWare DMA controller dmaengine: Add slave DMA interface dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap dmaengine: Add dma_client parameter to device_alloc_chan_resources dmatest: Simple DMA memcpy test client dmaengine: DMA engine driver for Marvell XOR engine iop-adma: fix platform driver hotplug/coldplug dmaengine: track the number of clients using a channel ... Fixed up conflict in drivers/dca/dca-sysfs.c manually
| * dmaengine: Driver for the Synopsys DesignWare DMA controllerHaavard Skinnemoen2008-07-081-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a driver for the Synopsys DesignWare DMA controller (aka DMACA on AVR32 systems.) This DMA controller can be found integrated on the AT32AP7000 chip and is primarily meant for peripheral DMA transfer, but can also be used for memory-to-memory transfers. This patch is based on a driver from David Brownell which was based on an older version of the DMA Engine framework. It also implements the proposed extensions to the DMA Engine API for slave DMA operations. The dmatest client shows no problems, but there may still be room for improvement performance-wise. DMA slave transfer performance is definitely "good enough"; reading 100 MiB from an SD card running at ~20 MHz yields ~7.2 MiB/s average transfer rate. Full documentation for this controller can be found in the Synopsys DW AHB DMAC Databook: http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf The controller has lots of implementation options, so it's usually a good idea to check the data sheet of the chip it's intergrated on as well. The AT32AP7000 data sheet can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Changes since v4: * Use client_count instead of dma_chan_is_in_use() * Add missing include * Unmap buffers unless client told us not to Changes since v3: * Update to latest DMA engine and DMA slave APIs * Embed the hw descriptor into the sw descriptor * Clean up and update MODULE_DESCRIPTION, copyright date, etc. Changes since v2: * Dequeue all pending transfers in terminate_all() * Rename dw_dmac.h -> dw_dmac_regs.h * Define and use controller-specific dma_slave data * Fix up a few outdated comments * Define hardware registers as structs (doesn't generate better code, unfortunately, but it looks nicer.) * Get number of channels from platform_data instead of hardcoding it based on CONFIG_WHATEVER_CPU. * Give slave clients exclusive access to the channel Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>, Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | atmel-mci: Driver for Atmel on-chip MMC controllersHaavard Skinnemoen2008-07-151-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a driver for the MMC controller on the AP7000 chips from Atmel. It should in theory work on AT91 systems too with some tweaking, but since the DMA interface is quite different, it's not entirely clear if it's worth merging this with the at91_mci driver. This driver has been around for a while in BSPs and kernel sources provided by Atmel, but this particular version uses the generic DMA Engine framework (with the slave extensions) instead of an avr32-only DMA controller framework. This driver can also use PIO transfers when no DMA channels are available, and for transfers where using DMA may be difficult or impractical for some reason (e.g. the DMA setup overhead is usually not worth it for very short transfers, and badly aligned buffers or lengths are difficult to handle.) Currently, the driver only support PIO transfers. DMA support has been split out to a separate patch to hopefully make it easier to review. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 3.5 MiB/s on fast cards with debugging disabled. The driver has also been tested using the mmc_test module on the same cards. All tests except 7, 9, 15 and 17 succeed. The first two are unsupported by all the cards I have, so I don't know if the driver handles this correctly. The last two fail because the hardware flags a Data CRC Error instead of a Data Timeout error. I'm not sure how to deal with that. Documentation for this controller can be found in many data sheets from Atmel, including the AT32AP7000 data sheet which can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* | avr32: Power Management support ("standby" and "mem" modes)Haavard Skinnemoen2008-07-021-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement Standby support. In this mode, we'll suspend all drivers, put the SDRAM in self-refresh mode and switch off the HSB bus ("frozen" mode.) Implement Suspend-to-mem support. In this mode, we suspend all drivers, put the SDRAM into self-refresh mode and switch off all internal clocks except the 32 kHz oscillator ("stop" mode.) The lowest-level suspend code runs from a small portion of SRAM allocated at startup time. This gets rid of a small potential race with the SDRAM where we might try to enter self-refresh mode in the middle of an icache burst. We also relocate all interrupt and exception handlers to SRAM during the small window when we enter and exit the low-power modes. We don't need to do any special tricks to start and stop the PLL. The main clock is automatically gated by hardware until the PLL is stable. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | avr32: Add simple SRAM allocatorHaavard Skinnemoen2008-07-021-0/+30
| | | | | | | | | | | | | | Add SRAM allocator for avr32, which is just a thin wrapper around genalloc. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | avr32: Move setup_platform() into chip-specific fileHaavard Skinnemoen2008-06-281-4/+0
| | | | | | | | | | | | | | | | | | Combine at32_clock_init() and at32_portmux_init() into setup_platform() and remove setup_platform() from at32ap.c. No functional change since all setup_platform() ever did was call those two functions. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | avr32: Add PSIF platform devicesHans-Christian Egtvedt2008-06-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | This patch adds the PS/2 interface (PSIF) to the device code, split into two platform devices, one for each port. The function for adding the PSIF platform device is also added to the board header file. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Add pin configuration choice to LCDC peripheralHans-Christian Egtvedt2008-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch lets the board code choose which pin out to use for the LCD interface. On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it is vital to have the choice to select the alternative pinout since this pinout is routed to the external headers. Update ATSTK1002 and ATSTK1004 to use the new interface. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Allow board to define oscillator ratesAlex2008-06-271-0/+6
|/ | | | | | | | | | | | On our custom board we have other oscillator rates than on atngw100 and atstk100x. Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c. This patch moves them into board specific code. Signed-off-by: Alex Raimondi <raimondi@miromico.ch> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Generic clockevents supportDavid Brownell2008-04-191-112/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* avr32: Move sleep code into mach-at32apHaavard Skinnemoen2008-04-191-0/+48
| | | | | | | Create a new file, pm-at32ap700x.S, in mach-at32ap and move the CPU idle sleep code there. Make it possible to disable the sleep code. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* avr32: pass i2c board info through at32_add_device_twiBen Nizette2008-04-191-1/+4
| | | | | | | | | | | | | | New-style I2C drivers require that motherboard-mounted I2C devices are registered with the I2C core, typically at arch_initcall time. This can be done nice and neat by passing the struct i2c_board_info[] through at32_add_device_twi just like we do for the SPI board info. While we've got the hood up, remove a duplicate declaration of at32_add_device_twi() in board.h. [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration] Signed-Off-By: Ben Nizette <bn@niasdigital.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* atmel_usba_udc: move endpoint declarations into platform data.Stelian Pop2008-04-061-3/+1
| | | | | | | | | | | | | | The atmel_usba_udc driver is being used by several platforms and arches (avr32 and at91 ATM), and each platform may have different endpoint settings. The patch below moves the endpoint declarations into the platform data and make the necessary adjustments for AVR32 (improved by Haavard Skinnemoen <hskinnemoen@atmel.com>). Signed-off-by: Stelian Pop <stelian@popies.net> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Basic PWM driver for AVR32 and AT91David Brownell2008-02-081-0/+3
| | | | | | | | | | | | | | | PWM device setup, and a simple PWM driver exposing a programming interface giving access to each channel's full capabilities. Note that this doesn't support starting several channels in synch. [hskinnemoen@atmel.com: allocate platform device dynamically] [hskinnemoen@atmel.com: Kconfig fix] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* gpiolib: avr32 at32ap platform supportDavid Brownell2008-02-053-13/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals on external chips (like GPIO expanders) can easily be used. This mostly reorganizes some existing logic, with two minor changes in behavior: - The PSR registers are used instead of the previous "gpio_mask" values, matching AT91 behavior and removing some duplication between that role and that of "pinmux_mask". - NR_IRQs grew to acommodate a bank of external GPIOs. Eventually this number should probably become a board-specific config option. There's a debugfs dump of status for the built-in GPIOs, showing which pins have deglitching, pullups, or open drain drive enabled, as well as the ID string used when requesting each IRQ. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [ARM] 4764/1: [AT91] AT91CAP9 core supportAndrew Victor2008-01-261-0/+1
| | | | | | | | | Add support for Atmel's AT91CAP9 Customizable Microcontroller family. <http://www.atmel.com/products/AT91CAP/Default.asp> Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [AVR32] Add support for AT32AP7001 and AT32AP7002Haavard Skinnemoen2008-01-253-6/+6
| | | | | | | | | These are derivatives of the AT32AP7000 chip, which means that most of the code stays the same. Rename a few files, functions, definitions and config symbols to reflect that they apply to all AP700x chips, and exclude some platform devices from chips where they aren't present. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Implement at32_add_device_cf()Haavard Skinnemoen2007-10-231-0/+11
| | | | | | | | | | | | | | Implement at32_add_device_cf() which will add a platform_device for the at32_cf driver (not merged yet). Separate out most of the at32_add_device_ide() code and use it to implement at32_add_device_cf() as well. This changes the API in the following ways: * The board code must initialize data->cs to the chipselect ID to use before calling any of these functions. * The board code must use GPIO_PIN_NONE to indicate unused CF pins. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Implement more at32_add_device_foo() functionsHaavard Skinnemoen2007-10-231-0/+5
| | | | | | | | | | Implement functions for adding platform devices for TWI, MCI, AC97C and ABDAC. They may need to be modified to cope with platform data, etc. when the corresponding drivers are ready to be merged, but such changes are much less likely to conflict than adding support for a whole new type of device. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Platform code for pata_at32Kristoffer Nyborg Gregertsen2007-10-231-0/+7
| | | | | | | | | This patch adds platform code for PATA devices on the AP7000. [hskinnemoen@atmel.com: board code left out for now since stk1000 doesn't support IDE out of the box] Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] SMC configuration in clock cyclesKristoffer Nyborg Gregertsen2007-10-111-10/+41
| | | | | | | | | | | | | This patch makes the SMC configuration take timings in clock cycles instead of nanoseconds. A function to calculate timings in clock cycles is added. This patch removes the rounding troubles of the previous SMC configuration method. [hskinnemoen@atmel.com: fix atstk1002/atngw100 flash config] Signed-off-by: Kristoffer Nyborg Gregertsen <gregerts@stud.ntnu.no> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Wire up USBA deviceHaavard Skinnemoen2007-10-111-0/+8
| | | | | | | Implement at32_add_device_usba() and use it to wire up the USBA device on ATSTK1000 and ATNGW100. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] add multidrive support for pio driverMatteo Vit2007-10-111-0/+1
| | | | | | | This patch add multidrive support for pio driver Signed-off-by: Matteo Vit - Dave S.r.l. <matteo.vit@dave.eu> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add Atmel SSC driver platform device to AT32AP architectureHans-Christian Egtvedt2007-07-181-0/+14
| | | | | | | This patch adds register definitions, clocks and IRQs to the platform devices. Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Split SM device into PM, RTC, WDT and EICHaavard Skinnemoen2007-07-181-27/+0
| | | | | | | | | | | Split the SM platform device into separate platform devices for PM, RTC, WDT and EIC. This is more correct according to the documentation and allows us to simplify the code a little. Also turn the EIC driver into a real platform driver. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
* macb: Use generic PHY layerfrederic RODO2007-07-161-0/+1
| | | | | | | | | Convert the macb driver to use the generic PHY layer in drivers/net/phy. Signed-off-by: Frederic RODO <f.rodo@til-technologies.fr> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [AVR32] gpio_*_cansleep() fixDavid Brownell2007-06-141-0/+2
| | | | | | | | The AVR32 <asm/gpio.h> was missing the gpio_*_cansleep() calls, breaking compilation for some code using them. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Implement platform hooks for atmel_lcdfb driverHaavard Skinnemoen2007-05-151-5/+3
| | | | | | | | This modifies and extends the existing lcdc platform code to support the new atmel_lcdfb driver. The ATSTK1000 board code is set up to use the on-board Samsung LTV350QV LCD panel. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [ARM] 4370/3: AT91: Support for Atmel AT91SAM9RL processors.Andrew Victor2007-05-111-0/+1
| | | | | | | | | | Add support for Atmel's new AT91SAM9RL range of processors. Includes similar peripherals as other AT91SAM9 processors, but with a High-speed USB controller and various sizes of internal SRAM. Signed-off-by: Nicolas Ferre <nicolas.ferre@rfo.atmel.com> Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Use common cpu_is_xxx() macros on AT91 and AVR32Haavard Skinnemoen2007-05-091-0/+33
| | | | | | | | | | | | | | | | | | Several drivers shared between AT91 and AVR32 chips use cpu_is_xxx() to handle CPU-specific differences. Currently, such code needs to be inside #ifdef CONFIG_ARCH_AT91 because the macros don't exist on AVR32. By defining the same macros on both AT91 and AVR32, these #ifdefs can be eliminated. Since the macros will evaluate to a constant value for CPUs that aren't supported by the current architecture, any code that is only needed on AT91 will be optimized away on AVR32 and vice versa. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: David Brownell <david-b@pacbell.net> Acked-by: Andrew Victor <andrew@sanpeople.com> Cc: Nicolas Ferre <nicolas.ferre@rfo.atmel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [AVR32] Make I/O access macros work with external devicesHaavard Skinnemoen2007-04-271-0/+39
| | | | | | | | | | | | | | | | | | | Fix the I/O access macros so that they work with externally connected devices accessed in little-endian mode over any bus width: * Use a set of macros to define I/O port- and memory operations borrowed from MIPS. * Allow subarchitecture to specify address- and data-mangling * Implement at32ap-specific port mangling (with build-time configurable bus width. Only one bus width at a time supported for now.) * Rewrite iowriteN and friends to use write[bwl] and friends (not the __raw counterparts.) This has been tested using pata_pcmcia to access a CompactFlash card connected to the EBI (16-bit bus width.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Change system timer from count-compare to Timer/Counter 0Hans-Christian Egtvedt2007-04-271-0/+112
| | | | | | | | | | | | | | | | | | | | Due to limitation of the count-compare system timer (not able to count when CPU is in sleep), the system timer had to be changed to use a peripheral timer/counter. The old COUNT-COMPARE code is still present in time.c as weak functions. The new timer is added to the architecture directory. This patch sets up TC0 as system timer The new timer has been tested on AT32AP7000/ATSTK1000 at 100 Hz, 250 Hz, 300 Hz and 1000 Hz. For more details about the timer/counter see the datasheet for AT32AP700x available at http://www.atmel.com/dyn/products/product_card.asp?part_id=3903 Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [AVR32] Add nwait and tdf parameters to SMC configurationHans-Christian Egtvedt2007-04-271-0/+22
| | | | | | | | Complete the SMC configuration code by adding nwait and tdf parameter. After this change, we support the same parameters as the hardware. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* [PATCH] gpio_direction_output() needs an initial valueDavid Brownell2007-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | It's been pointed out that output GPIOs should have an initial value, to avoid signal glitching ... among other things, it can be some time before a driver is ready. This patch corrects that oversight, fixing - documentation - platforms supporting the GPIO interface - users of that call (just one for now, others are pending) There's only one user of this call for now since most platforms are still using non-generic GPIO setup code, which in most cases already couples the initial value with its "set output mode" request. Note that most platforms are clear about the hardware letting the output value be set before the pin direction is changed, but the s3c241x docs are vague on that topic ... so those chips might not avoid the glitches. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Andrew Victor <andrew@sanpeople.com> Acked-by: Milan Svoboda <msvoboda@ra.rockwell.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-02-191-36/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits) [ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports [ARM] 4140/1: AACI stability add ac97 timeout and retries [ARM] 4139/1: AACI record support [ARM] 4138/1: AACI: multiple channel support for IRQ handling [ARM] 4211/1: Provide a defconfig for ns9xxx [ARM] 4210/1: base for new machine type "NetSilicon NS9360" [ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM [ARM] 4221/1: S3C2443: DMA support [ARM] 4220/1: S3C24XX: DMA system initialised from sysdev [ARM] 4219/1: S3C2443: DMA source definitions [ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443 [ARM] 4217/1: S3C24XX: remove the dma channel show at startup [ARM] 4090/2: avoid clash between PXA and SA1111 defines [ARM] 4216/1: add .gitignore entries for ARM specific files [ARM] 4214/2: S3C2410: Add Armzone QT2410 [ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST [ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos [ARM] 4137/1: Add kexec support [ARM] 4201/1: SMP barriers pair needed for the secondary boot process ... Fix up conflict due to typedef removal in sound/arm/aaci.h
| * [ARM] 4151/1: AT91 / AVR32: Move at91_pdc.h to linux/atmel_pdc.hAndrew Victor2007-02-081-36/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Atmel AT91 and AVR32 processor architectures share many of the same peripherals. The PDC (Peripheral Data Controller) registers are also implemented within in a number of the on-chip peripherals (eg, USART, MMC, SPI, SSC, etc). In a attempt not to duplicate the register definitions in each peripheral, or in each architecture, the at91_pdc.h header in asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with linux/atmel_pdc.h. The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*, and the drivers updated accordingly. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 4124/1: Rename mach-at91rm9200 and arch-at91rm9200 directoriesAndrew Victor2007-02-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [AVR32] Use per-controller spi_board_info structuresHaavard Skinnemoen2007-02-161-1/+3
| | | | | | | | | | | | | | | | | | | | Set up one spi_board_info array per controller and pass this to at32_add_device_spi so that it can set up any GPIO pins for chip selects based on this information. Extracted from a patch by David Brownell and adapted slightly. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Add PIOE device and reserve SDRAM pinsHaavard Skinnemoen2007-02-092-1/+3
| | | | | | | | | | | | | | | | | | | | | | The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] Introduce at32_reserve_pin()Haavard Skinnemoen2007-02-091-0/+1
| | | | | | | | | | | | | | | | at32_reserve_pin() can be used for reserving portmux pins without altering their configuration. Useful for e.g. SDRAM pins where we really don't want to change the bootloader-provided configuration. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [AVR32] GPIO API implementationHaavard Skinnemoen2007-02-093-3/+45
|/ | | | | | | Arch-neutral GPIO calls for AVR32. GPIO IRQ support written by David Brownell. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* Merge branch 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32Linus Torvalds2006-12-113-8/+48
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32: [AVR32] Add missing #include <linux/param.h> to delay.c [AVR32] Pass dev parameter to dma_cache_sync() [AVR32] Implement intc_get_pending() [AVR32] Don't include <asm/delay.h> [AVR32] Put the chip in "stop" mode when halting the system [AVR32] Set flow handler for external interrupts [AVR32] Remove unused file [AVR32] Remove mii_phy_addr and eth_addr from eth_platform_data [AVR32] Move ethernet tag parsing to board-specific code [AVR32] Add macb1 platform_device [AVR32] Portmux API update
| * [AVR32] Remove mii_phy_addr and eth_addr from eth_platform_dataHaavard Skinnemoen2006-12-081-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The macb driver will probe for the PHY chip and read the mac address from the MACB registers, so we don't need them in eth_platform_data anymore. Since u-boot doesn't currently initialize the MACB registers with the mac addresses, the tag parsing code is kept but instead of sticking the information into eth_platform_data, it uses it to initialize the MACB registers (in case the boot loader didn't do it.) This code should be unnecessary at some point in the future. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Portmux API updateHaavard Skinnemoen2006-12-082-5/+48
| | | | | | | | | | | | | | Rename portmux_set_func to at32_select_periph, add at32_select_gpio and add flags parameter to specify the initial state of the pins. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* | [ARM] 3954/1: AT91: Update drivers for new headersAndrew Victor2006-11-301-3/+3
|/ | | | | | | | | | | | This patch updates the drivers (and other files) which include the hardware headers. This fixes the breakage introduced in patches 3950/1 and 3951/1 (those patches were getting big). The AVR32 architecture uses the same serial driver and had its own copy of at91rm9200_pdc.h. Renamed it to at91_pdc.h Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] AVR32: Allow renumbering of serial devicesHaavard Skinnemoen2006-10-042-0/+2
| | | | | | | | | | | | | Allow the board to remap actual USART peripheral devices to serial devices by calling at32_map_usart(hw_id, serial_line). This ensures that even though ATSTK1002 uses USART1 as the first serial port, it will still have a ttyS0 device. This also adds a board-specific early setup hook and moves the at32_setup_serial_console() call there from the platform code. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] atmel_serial: Pass fixed register mappings through platform_dataHaavard Skinnemoen2006-10-041-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | In order to initialize the serial console early, the atmel_serial driver had to do a hack where it compared the physical address of the port with an address known to be permanently mapped, and used it as a virtual address. This got around the limitation that ioremap() isn't always available when the console is being initalized. This patch removes that hack and replaces it with a new "regs" field in struct atmel_uart_data that the board-specific code can initialize to a fixed virtual mapping for platform devices where this is possible. It also initializes the DBGU's regs field with the address the driver used to check against. On AVR32, the "regs" field is initialized from the physical base address when this it can be accessed through a permanently 1:1 mapped segment, i.e. the P4 segment. If regs is NULL, the console initialization is delayed until the "real" driver is up and running and ioremap() can be used. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] at91_serial -> atmel_serial: Public definitionsHaavard Skinnemoen2006-10-041-2/+2
| | | | | | | | | | | Rename the following public definitions: * AT91_NR_UART -> ATMEL_MAX_UART * struct at91_uart_data -> struct atmel_uart_data * at91_default_console_device -> atmel_default_console_device Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] at91_serial -> atmel_serial: at91rm9200_usart.hHaavard Skinnemoen2006-10-041-123/+0
| | | | | | | | | Move include/asm/arch/at91rm9200_usart.h into drivers/serial and rename it atmel_usart.h. Also delete AVR32's version of this file. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] AVR32 MTD: Static Memory Controller driverHaavard Skinnemoen2006-09-261-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset adds the necessary drivers and infrastructure to access the external flash on the ATSTK1000 board through the MTD subsystem. With this stuff in place, it will be possible to use a jffs2 filesystem stored in the external flash as a root filesystem. It might also be possible to update the boot loader if you drop the write protection of partition 0. As suggested by David Woodhouse, I reworked the patches to use the physmap driver instead of introducing a separate mapping driver for the ATSTK1000. I've also cleaned up the hsmc header by removing useless comments and converting spaces to tabs (my headerfile generator needs some work.) Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup instead. This patch: This adds a simple API for configuring the static memory controller along with an implementation for the Atmel HSMC. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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