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| | | | | | | | | * | [ARM] pxa: add pxa27x_keypad device and pxa_set_keypad_info()eric miao2008-04-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | also update the clk definitions in pxa27x and pxa3xx. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] pxa: allow dynamic enable/disable of GPIO wakeup for pxa{25x,27x}eric miao2008-04-192-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes include: 1. rename MFP_LPM_WAKEUP_ENABLE into MFP_LPM_CAN_WAKEUP to indicate the board capability of this pin to wakeup the system 2. add gpio_set_wake() and keypad_set_wake() to allow dynamically enable/disable wakeup from GPIOs and keypad GPIO * these functions are currently kept in mfp-pxa2xx.c due to their dependency to the MFP configuration 3. pxa2xx_mfp_config() only gives early warning if MFP_LPM_CAN_WAKEUP is set on incorrect pins So that the GPIO's wakeup capability is now decided by the following: a) processor's capability: (only those GPIOs which have dedicated bits within PWER/PRER/PFER can wakeup the system), this is initialized by pxa{25x,27x}_init_mfp() b) board design decides: - whether the pin is designed to wakeup the system (some of the GPIOs are configured as other functions, which is not intended to be a wakeup source), by OR'ing the pin config with MFP_LPM_CAN_WAKEUP - which edge the pin is designed to wakeup the system, this may depends on external peripherals/connections, which is totally board specific; this is indicated by MFP_LPM_EDGE_* c) the corresponding device's (most likely the gpio_keys.c) wakeup attribute: Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] pxa: add MFP-alike pin configuration support for pxa{25x, 27x}eric miao2008-04-193-0/+723
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pin configuration on pxa{25x,27x} has now separated from generic GPIO into dedicated mfp-pxa2xx.c by this patch. The name "mfp" is borrowed from pxa3xx and is used here to alert the difference between the two concepts: pin configuration and generic GPIOs. A GPIO can be called a "GPIO" _only_ when the corresponding pin is configured so. A pin configuration on pxa{25x,27x} is composed of: - alternate function selection (or pin mux as commonly called) - low power state or sleep state - wakeup enabling from low power mode The following MFP_xxx bit definitions in mfp.h are re-used: - MFP_PIN(x) - MFP_AFx - MFP_LPM_DRIVE_{LOW, HIGH} - MFP_LPM_EDGE_* Selecting alternate function on pxa{25x, 27x} involves configuration of GPIO direction register GPDRx, so a new bit and MFP_DIR_{IN, OUT} are introduced. And pin configurations are defined by the following two macros: - MFP_CFG_IN : for input alternate functions - MFP_CFG_OUT : for output alternate functions Every configuration should provide a low power state if it configured as output using MFP_CFG_OUT(). As a general guideline, the low power state should be decided to minimize the overall power dissipation. As an example, it is better to drive the pin as high level in low power mode if the GPIO is configured as an active low chip select. Pins configured as GPIO are defined by MFP_CFG_IN(). This is to avoid side effects when it is firstly configured as output. The actual direction of the GPIO is configured by gpio_direction_{input, output} Wakeup enabling on pxa{25x, 27x} is actually GPIO based wakeup, thus the device based enable_irq_wake() mechanism is not applicable here. E.g. invoking enable_irq_wake() with a GPIO IRQ as in the following code to enable OTG wakeup is by no means portable and intuitive, and it is valid _only_ when GPIO35 is configured as USB_P2_1: enable_irq_wake( gpio_to_irq(35) ); To make things worse, not every GPIO is able to wakeup the system. Only a small number of them can, on either rising or falling edge, or when level is high (for keypad GPIOs). Thus, another new bit is introduced to indicate that the GPIO will wakeup the system: - MFP_LPM_WAKEUP_ENABLE The following macros can be used in platform code, and be OR'ed to the GPIO configuration to enable its wakeup: - WAKEUP_ON_EDGE_{RISE, FALL, BOTH} - WAKEUP_ON_LEVEL_HIGH The WAKEUP_ON_LEVEL_HIGH is used for keypad GPIOs _only_, there is no edge settings for those GPIOs. These WAKEUP_ON_* flags OR'ed on wrong GPIOs will be ignored in case that platform code author is careless enough. The tradeoff here is that the wakeup source is fully determined by the platform configuration, instead of enable_irq_wake(). Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] pxa: separate GPIOs and their mode definitions to pxa2xx-gpio.heric miao2008-04-192-301/+304
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | two reasons: 1. GPIO namings and their mode definitions are conceptually not part of the PXA register definitions 2. this is actually a temporary move in the transition of PXA2xx to use MFP-alike APIs (as what PXA3xx is now doing), so that legacy code will still work and new code can be added in step by step Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] pxa: integrate low IRQ chip (ICIP) and high IRQ chip (ICIP2) into oneeric miao2008-04-191-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the code better organized and simplified a bit. The change will lose a bit of performance when performing IRQ ack/mask/unmask,but that's not too much after checking the result binary. This patch also removes the ugly #ifdef CONFIG_PXA27x .. #endif by carefully not to access those pxa{27x,3xx} specific registers, this is done by keeping an internal IRQ number variable. The pxa-regs.h is also modified so registers for IRQ > PXA_IRQ(31) are made public even if CONFIG_PXA{27x,3xx} isn't defined (for pxa25x's sake) The incorrect assumption in the original code that internal irq starts from 0 is also corrected by comparing with PXA_IRQ(0). "struct sys_device" for the IRQ are reduced into one single device on pxa{27x,3xx}. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4868/1: Enhance pxa270 GPIO definitionsRobert Jarzmik2008-04-191-14/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhanced GPIO alternate functions descriptions, taken from Intel PXA270 Developers Manual. Signed-off-by: Robert Jarzmik <rjarzmik@free.fr> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | | * | [ARM] 4830/1: Add support for the CLK_POUT pin on PXA3xx CPUsMark Brown2008-04-191-0/+9
| | | | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Expose control of the PXA3xx 13MHz CLK_POUT pin via the clock API Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * | Orion: orion -> orion5x renameLennert Buytenhek2008-03-2715-257/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Saeed Bishara <saeed@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | Orion: general cleanupLennert Buytenhek2008-03-279-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various Orion cleanups: - Unify GPL license banner format across all files. - Unify naming of .h double inclusion guard preprocessor macros. - Unify spelling of "PCIe" (variants seen: PCIE, PCIe, PCI-EX.) - Various typo fixes. - Remove __init attributes from prototypes declared in headers. - Remove trailing comments from #endif statements. - Mark a couple of locally-used-only structs static. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | Orion: only map peripheral register space onceLennert Buytenhek2008-03-271-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Save some TLB entries by making ioremap() return pointers into the boot-time Orion peripheral iotable mapping whenever someone tries to ioremap any part of the Orion peripheral register space. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | Orion: move I/O macros out of orion.hLennert Buytenhek2008-03-272-19/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the Orion register accessor macros out of orion.h, to prevent them from ending up in the decompressor image (Orion uncompress.h includes orion.h.) Move them into io.h, which seems a better place for this kind of stuff. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | Orion: describe physical address mapLennert Buytenhek2008-03-271-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Include a table describing our physical address map in orion.h. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | plat-orion: make orion_nand available for all Orion familiesLennert Buytenhek2008-03-271-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | plat-orion: make ehci-orion available for all Orion familiesLennert Buytenhek2008-03-272-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | plat-orion: share time handling codeLennert Buytenhek2008-03-273-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split off Orion time handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | plat-orion: share PCIe handling codeLennert Buytenhek2008-03-271-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split off Orion PCIe handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | plat-orion: share IRQ handling codeLennert Buytenhek2008-03-271-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split off Orion IRQ handling code into plat-orion/, and add support for multiple sets of (32) interrupts. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | | * | ehci-orion: mbus decode window supportLennert Buytenhek2008-03-271-0/+9
| | | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make it possible to pass mbus_dram_target_info to the ehci-orion driver via the platform data, make the ehci-orion driver program the window registers based on this data if it is passed in, and make the Orion platform setup code use this method instead of programming the EHCI mbus window registers by hand. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| | | | | | | * | ns9xxx: let putc autodetect where to writeUwe Kleine-König2008-03-311-7/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now putc writes to the first enabled internal UART. If there is none the external UART on the a9m9750dev board is used (if enabled). Otherwise there is no output. Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
| | | | | | | * | ns9xxx: prepare for adding support for Digi ns921x processorsUwe Kleine-König2008-03-317-134/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware team changed some things that were taken as being common to all ns9xxx processors up to now. This patch addresses: - irqs: s/IRQ_/IRQ_NS9360_/ - system module registers: some registers are still general, their definition lives now in include/asm-arm/arch-ns9xxx/regs-sys-common.h. The ns9360 specific ones are in .../regs-sys-ns9360.h As a result ns9360_systemclock cannot be static inline any more as its definition needs regs-sys-ns9360.h. This becomes a real problem when adding support for ns9215 as this will need regs-sys-ns9215.h and including both files will not work. For the same reason ns9360_reset() is now non-inline and gpio functions live in their own file. - register mapping: s/ns9xxx_map_io/ns9360_map_io/ - timer registers: move time.c to time-ns9360.c; s/ns9xxx_timer/ns9360_timer/ Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
| | | | | | | * | ns9xxx: add module_is_..., processor_is_... and board_is_... for many machsUwe Kleine-König2008-03-313-7/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the machines are not yet supported, but I have to start somewhere. Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
| | | | | | | * | ns9xxx: Use get_irqnr_preamble to initialize base registerUwe Kleine-König2008-03-311-1/+1
| | | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the irq handling a bit. Now the base register is only computed once if more than one irq is pending. Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
| | | | | | * | [ARM] 4887/1: i.MXC family: Separate current platform codeRobert Schwebel2008-04-174-22/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Juergen Beisert <j.beisert@pengutronix.de> This patch separates the current code into i.MX2 and i.MX3 and modifies the Kconfig files to reflect this separation in the menus. Things happend since last review: - make i.MX3 compile again - fix some structure names to be conform with all the shared/common sources from i.MX1/i.MX2 Previous changes: - stay conform to other Kconfig files (note from Russell King) Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | [ARM] 4876/1: i.MXC family: Clean upRobert Schwebel2008-03-319-161/+61
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Juergen Beisert <j.beisert@pengutronix.de> Clean up current header files from doxygen style comments. There are probably more such comments left, but we start with these. Things happend since last review: - needless blank lines removed (note by Russell King) - re-format comments (note by Ross Wille) Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: Ross Wille <wille@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4852/1: Add timerfd_create, timerfd_settime and timerfd_gettime ↵Uwe Kleine-König2008-04-191-1/+3
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | syscall entries Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4981/1: [KS8695] Simple LED driverAndrew Victor2008-04-171-0/+5
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simple gpio-connected LED driver for KS8695 platforms. (Based on old AT91 LED driver) Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | iop: unconditionally initialize the ATU on platforms known to be 'hosts'Dan Williams2008-03-262-8/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | Platforms like iq80321 and iq80331 which may be host-bus-adapters require 'iop3xx_init_atu=y' to be specified on the kernel command line. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | [ARM] 4988/1: Add GPIO lib support to the EP93xxRyan Mallon2008-04-191-17/+4
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Adds support for the generic GPIO lib to the EP93xx family. The gpio handling code has been moved from core.c to a new file called gpio.c. The GPIO based IRQ code has not been changed. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4913/1: [AT91] PMC_MDIV definitionsAndrew Victor2008-04-101-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The allowed values for the MDIV field (Master Clock Division) in the PMC controller differ between the AT91RM9200 and AT91SAM9/CAP9. To remove possible confusion, change the definitions to be more explicit. Also define the Processor Clock Division bits. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4907/1: [AT91] SAM9/CAP9 reset reasonAndrew Victor2008-04-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Reset controller on the SAM9/CAP9 processors will store the reason for the last system reset. On startup, display this information (wakeup signal, RTT alarm, watchdog reset, user reset, etc) Based on patch from David Brownell. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4904/1: [AT91] Pass ECC controller to NAND driverAndrew Victor2008-04-041-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | On AT91 processors that include an ECC controller, pass its base address to the NAND driver via platform_device resources. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4902/1: [AT91] SAM9/CAP9 memory controller headerAndrew Victor2008-04-043-63/+178
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | The AT91CAP9 processor includes the same Static Memory Controller (SMC) peripheral as the SAM9 processors, but replaces the SDRAM Controller with a DDR/SDR Controller (DDRSDRC). This patch splits the existing include/asm-arm/arch-at91/at91sam926x_mc.h into at91sam9_sdramc.h and at91sam9_smc.h. It also adds an at91cap9_ddrsdr.h for the DDRSDRC controller. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | RealView: Add uncompressing support for PB1176Catalin Marinas2008-04-181-0/+3
| | | | | | | | | | | | | | | | This patch adds the UART0 base address detection in uncompress.h. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Base support for the PB1176 platformBahadir Balban2008-04-182-0/+153
| | | | | | | | | | | | | | | | | | | | This patch adds the base files for the PB1176 platform support. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Add uncompressing support to PB11MPCoreCatalin Marinas2008-04-181-0/+3
| | | | | | | | | | | | | | | | | | This patch adds the UART address detection in uncompress.h for the PB11MPCore platform. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Base support for the PB11MPCore platformBahadir Balban2008-04-182-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the base files for the PB11MPCore platform support. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Change the IO_ADDRESS macroCatalin Marinas2008-04-182-2/+2
| | | | | | | | | | | | | | | | | | | | This patch changes the IO_ADDRESS macro for the RealView platforms to accomodate a wider range of physical addresses on PB11MPCore. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move more device address definitions to board-eb.hCatalin Marinas2008-04-182-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | The upcoming PB11MPCore and PB1176 have different memory maps and some of the definitions in platform.h are no longer common. This patch moves them to the board-eb.h file and updates their usage in realview_eb.c. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move the UART definitions to EB specific filesCatalin Marinas2008-04-183-12/+28
| | | | | | | | | | | | | | | | | | | | Since the PB1176 has different UART base addresses, this patch moves the definitions form platorm.h to board-eb.h. It also modifies uncompress.h to detect the platform type at run-time. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move the timer definitions into the EB specific filesCatalin Marinas2008-04-182-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch moves the timer definitions from platform.h into board-eb.h as they are different on PB11MPCore and PB1176. It also adds timerX_va_base variables in core.c which are set by the realview_eb_timer_init function before invoking realview_timer_init. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move the flash definitions out of platform.hCatalin Marinas2008-04-182-3/+3
| | | | | | | | | | | | | | | | | | | | This patch moves the patch definitions into board-eb.h and realview_eb.c (from core.c) as they are different on the PB11MPCore and PB1176 platforms. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move the EB GIC definitions to the board fileCatalin Marinas2008-04-182-2/+3
| | | | | | | | | | | | | | | | This is in preparation for the RealView PB11MPCore and PB1176 patches which have different base addresses for the GIC. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | RealView: Move the SCU initialisation out of __v6_setupCatalin Marinas2008-04-182-18/+8
| | | | | | | | | | | | | | | | | | This patch moves the SCU initialisation from __v6_setup to the smp_prepare_cpus() function as it relies on platform-specific settings. Changes to get_core_count() are mainly for allowing cleaner code with the upcoming PB11MPCore patches. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | Add a prefetch abort handlerPaul Brook2008-04-182-30/+61
| | | | | | | | | | | | | | | | | | This patch adds a prefetch abort handler similar to the data abort one and renames the latter for consistency. Initial implementation by Paul Brook with some renaming by Catalin Marinas. Signed-off-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* | ARMv7: Add support for the ThumbEE state saving/restoringCatalin Marinas2008-04-182-0/+4
|/ | | | | | | This patch adds the detection and handling of the ThumbEE extension on ARMv7 CPUs. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
* [ARM] 4872/1: Replaces buggy macro in S3C2410 irq includeDavide Rizzo2008-03-201-1/+1
| | | | | | | | | This is a bug correction for a macro that generated wrong results. Nobody used it in official kernel tree, my driver did. Signed-off-by: Davide Rizzo <davide@elpa.it> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4869/1: ARM: OMAP: Fix compile for mcbspTony Lindgren2008-03-201-1/+7
| | | | | | | Until DSP MMU code is merged, dsp_request_mem() does not exist. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4863/1: AT91: CAP9 USART definitions for early debugAndrew Victor2008-03-201-1/+6
| | | | | | | | | | | Define AT91_USART0, 1, 2 so the selection of the UART for early kernel messages works. (See commit fa3218d8594869b38b1a170ea36d176ac455b897). Replace AT91_SHDC with AT91_SHDWC to be consistent with other AT91 platforms. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'omap-fixes'Russell King2008-03-063-4/+18
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * omap-fixes: ARM: OMAP2: Register the L4 io bus to boot OMAP2 ARM: OMAP1: Compile in other 16xx boards to OSK defconfig ARM: OMAP1: Refresh H2 defconfig ARM: OMAP1: Refresh OSK defconfig ARM: OMAP: gpio lockdep updates ARM: OMAP1: omap1/pm.c build fix ARM: OMAP1: omap h2 regression fix ARM: OMAP1: Fix compile for boards depending on old gpio expander ARM: OMAP1: omap h3 regression and build fix ARM: OMAP: Remove compiler warning when i2c is not set ARM: OMAP: fix omap i2c init (regression) ARM: OMAP: fix false lockdep warnings ARM: OMAP: Fix sleep under spinlock for cpufreq ARM: OMAP: Pass logical DMA channel number always to callback handlers
| * ARM: OMAP1: Fix compile for boards depending on old gpio expanderTony Lindgren2008-03-051-0/+11
| | | | | | | | | | | | The long term fix is to switch boards to use drivers/gpio/pcf857x.c. Signed-off-by: Tony Lindgren <tony@atomide.com>
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