summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* libata: Report zeroed read after TRIM and max discard sizeMartin K. Petersen2009-12-031-3/+9
| | | | | | | | | | | | Our current TRIM payload is a single sector that can accommodate 64 * 65535 blocks being unmapped. Report this value in the Block Limits Maximum Unmap LBA count field. If a storage device supports TRIM and the DRAT and RZAT bits are set, report TPRZ=1 in Read Capacity(16). Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt3x2n: fix overclocked MWDMA0 timingBartlomiej Zolnierkiewicz2009-12-031-2/+1
| | | | | | | | Remove superfluous timings table entry while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: MWDMA0 is unsupportedBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* [libata] MWDMA0 is unsupported on PIIX-like PATA controllersBartlomiej Zolnierkiewicz2009-12-033-3/+3
| | | | | | | | | MWDMA0 timings cannot be met with the PIIX based controller programming interface. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_via: clear UDMA transfer mode bit for PIO and MWDMABartlomiej Zolnierkiewicz2009-12-031-6/+13
| | | | | | | Fix register naming while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_sis: Power Management fixBartlomiej Zolnierkiewicz2009-12-031-2/+19
| | | | | | | Call sis_fixup() on resume. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_rz1000: Power Management fixBartlomiej Zolnierkiewicz2009-12-031-1/+10
| | | | | | | | Fix ->resume method to re-enable & re-init PCI device properly before doing chipset specific setup. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_radisys: fix UDMA handlingBartlomiej Zolnierkiewicz2009-12-031-2/+2
| | | | | | | Set correct bits to switch between UDMA2 and UDMA4. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_ns87415: Power Management fixBartlomiej Zolnierkiewicz2009-12-031-5/+27
| | | | | | | Fix ->resume method to do chipset specific setup. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_marvell: fix marvell_pre_reset() documentationBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_legacy: add pointers to QDI65x0 documentationBartlomiej Zolnierkiewicz2009-12-031-1/+8
| | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_legacy: fix access to control register for QDI6580Bartlomiej Zolnierkiewicz2009-12-031-2/+2
| | | | | | | | We need to mask out the port offset from the port number cached in ld_qdi->timing. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_legacy: fix QDI6580DP supportBartlomiej Zolnierkiewicz2009-12-031-0/+1
| | | | | | | | Dual port QDI6580 has shared PIO timings for master/slave devices so it needs to use custom ->qc_issue method. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: fix it8213_pre_reset() documentationBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: fix wrong MWDMA timings being programmedBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | | | | | | | Clear old MWDMA timings before programming new ones (IT8213 is a single port host so there is no need to check ap->port_no). This change should be safe as this is how we have been doing things in IDE it8213 host driver for years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: fix PIO2 underclockingBartlomiej Zolnierkiewicz2009-12-031-7/+6
| | | | | | | | | | | [ port of Sergei's fixes for pata_efar from commit 5f33b3b ] Fix the PIO mode 2 using mode 0 timings -- this driver should enable the fast timing bank starting with PIO2, just like the PIIX/ICH drivers do. Also, fix/rephrase some comments while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: fix wrong PIO timings being programmedBartlomiej Zolnierkiewicz2009-12-031-2/+2
| | | | | | | | | | | * do not clear PIO timings for master when programming slave * program new PIO timings in the correct register nibble Both changes should be safe as this is how we have been doing things in IDE it8213 host driver for years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_it8213: fix UDMA handlingBartlomiej Zolnierkiewicz2009-12-031-2/+2
| | | | | | | | | | | Driver should program the cycle timing not the mode number (doing the latter results in wrong timings being used). There shouldn't be any problems with it as IDE it8213 host driver has been doing it this way for years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt3x3: Power Management fixBartlomiej Zolnierkiewicz2009-12-031-1/+10
| | | | | | | | Fix ->resume method to re-enable & re-init PCI device properly before doing chipset specific setup. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_cs5520: remove dead VDMA supportBartlomiej Zolnierkiewicz2009-12-031-38/+1
| | | | | | | | | | | It has been dead for the last three years (== since the initial driver merge) and probability that it will ever get fixed is quite low. Since there is no reason to keep this dead code around any longer just remove it (it can still be retrieved from the git history if necessary). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_efar: fix wrong MWDMA timings being programmedBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | | | | | | | Do not clear MWDMA timings for device on the other port when programming slave device. This change should be safe as this is how we have been doing things in IDE slc90e66 host driver for years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_efar: fix wrong PIO timings being programmedBartlomiej Zolnierkiewicz2009-12-031-2/+3
| | | | | | | | | | | | * do not clear PIO timings for master when programming slave * do not clear PIO timings for device on the other port when programming slave device Both changes should be safe as this is how we have been doing things in IDE slc90e66 host driver for years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ata_piix: fix MWDMA handling on PIIX3Bartlomiej Zolnierkiewicz2009-12-031-3/+3
| | | | | | | | Fix erroneous check for ap->udma_mask in do_pata_set_dmamode() resulting in controller not being programmed properly for MWDMA. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: let users know that Promise PDC42819 support is limited to SATA devicesMark Nelson2009-12-031-0/+8
| | | | | | | | | | | | ahci can drive the Promise PDC42819, but obviously it can only use SATA disks connected to this controller. The controller can actually support SAS disks as well, but we only know how to use it in it's AHCI mode. Add a message to let users know that because ahci is driving their chip they can only use the SATA disks connected to this controller. Signed-off-by: Mark Nelson <mdnelson8@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ata: use pci_dev->revisionSergei Shtylyov2009-12-035-39/+20
| | | | | | | | | Some places were using PCI_CLASS_REVISION instead of PCI_REVISION_ID, so they weren't converted by commit 44c10138fd4bbc4b6d6bff0873c24902f2a9da65 (PCI: Change all drivers to use pci_device->revision). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt366: fix timing register documentationSergei Shtylyov2009-12-031-16/+14
| | | | | | | | | | The comment in the driver actually describes HPT37x's timing register layout, which is different from HPT36x. Fix it and reformat the comment, while at it. Bump the driver version, accounting for several patches that forgot to do it. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: add comment documenting PIO latency issues on UPBartlomiej Zolnierkiewicz2009-12-031-0/+7
| | | | | | | | Based on: http://lkml.indiana.edu/hypermail/linux/kernel/0908.2/01420.html Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt{37x|3x2n}: fix timing register masks (take 2)Sergei Shtylyov2009-12-032-26/+23
| | | | | | | | | | | | | | | | | | | | | | | | These drivers inherited from the older 'hpt366' IDE driver the buggy timing register masks in their set_piomode() metods. As a result, too low command cycle active time is programmed for slow PIO modes. Quite fortunately, it's later "fixed up" by the set_dmamode() methods which also "helpfully" reprogram the command timings, usually to PIO mode 4; unfortunately, setting an UltraDMA mode #N also reprograms already set PIO data timings, usually to MWDMA mode # max(N, 2) timings... However, the drivers added some breakage of their own too: the bit that they set/clear to control the FIFO is sometimes wrong -- it's actually the MSB of the command cycle setup time; also, setting it in DMA mode is wrong as this bit is only for PIO actually and clearing it for PIO modes is not needed as no mode in any timing table has it set... Fix all this, inverting the masks while at it, like in the 'hpt366' and 'pata_hpt366' drivers; bump the drivers' versions, accounting for recent patches that forgot to do it... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: stable@kernel.org Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_piccolo: Driver for old Toshiba chipsetsAlan Cox2009-12-035-2/+156
| | | | | | | | | | | | We were never able to get docs for this out of Toshiba for years. Dave Barnes produced a NetBSD driver however and from that we can fill in the needed tables. As we correct the PCI identifiers a bit also update the old ide generic driver at the same time so it stays compiling. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_ali: Fix regression with old devicesAlan Cox2009-12-031-1/+3
| | | | | | | | | | | Making the new stuff work broke some of the old chipsets. We need to go back to the old set up values for these it seems. Unfortunately even with documentation this is basically a mix of cargoculting and guesswork. Chased down to the exact line by Gianluca. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* [libata] PATA: Update experimental tagsAlan Cox2009-12-031-15/+15
| | | | | Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_cmd64x: implement serialization as per notesAlan Cox2009-12-031-8/+108
| | | | | | | | | | | | | | | | | | | | | | Daniela Engert pointed out that there are some implementation notes for the 643 and 646 that deal with certain serialization rules. In theory we don't need them because they apply when the motherboard decides not to retry PCI requests for long enough and the chip is busy doing a DMA transfer on the other channel. The rule basically is "don't touch the taskfile of the other channel while a DMA is in progress". To implement that we need to - not issue a command on a channel when there is a DMA command queued - not issue a DMA command on a channel when there are PIO commands queued - use the alternative access to the interrupt source so that we do not touch altstatus or status on shared IRQ. Updated to remote extra conditional check Bartlomiej noted and to remove the variables for irq checks as the CMD648 doesn't have the underlying problem. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_sis: Implement MWDMA for the UDMA 133 capable chipsAlan Cox2009-12-031-22/+69
| | | | | | | | Bartlomiej pointed out that while this got fixed in the old driver whoever did it didn't port it across. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_via: Blacklist some combinations of Transcend Flash and viaAlan Cox2009-12-031-0/+27
| | | | | | | | | Reported by Mikulas Patocka. VIA VT82C586B + Transcend TS64GSSD25-M v0826 does not work in UDMA mode Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata/sff: Use ops->bmdma_stop instead of ata_bmdma_stop()Benjamin Herrenschmidt2009-12-031-1/+1
| | | | | | | | | In libata-sff, ata_sff_post_internal_cmd() directly calls ata_bmdma_stop() instead of ap->ops->bmdma_stop(). This can be a problem for controllers that use their own bmdma_stop for which the generic sff one isn't suitable Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: add translation for SCSI WRITE SAME (aka TRIM support)Christoph Hellwig2009-12-031-0/+98
| | | | | | | | | | | | | | Add support for the ATA TRIM command in libata. We translate a WRITE SAME 16 command with the unmap bit set into an ATA TRIM command and export enough information in READ CAPACITY 16 and the block limits EVPD page so that the new SCSI layer discard support will driver this for us. Note that I hardcode the WRITE_SAME_16 opcode for now as the patch to introduce the symbolic is not in 2.6.32 yet but only in the SCSI tree - as soon as it is merged we can fix it up to properly use the symbolic name. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: retry failed FLUSH if device didn't fail itTejun Heo2009-12-031-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | If ATA device failed FLUSH, it means that the device failed to write out some amount of data and the error needs to be reported to upper layers. As retries can't recover the lost data, FLUSH failures need to be reported immediately in general. However, if FLUSH fails due to transmission errors, the FLUSH needs to be retried; otherwise, filesystems may switch to RO mode and/or raid array may drop a drive for a random transmission glitch. This condition can be rather easily reproduced on certain ahci controllers which go through a PHY event after powersave mode switch + ext4 combination. Powersave mode switch is often closely followed by flush from the filesystem failing the FLUSH with ATA bus error which makes the filesystem code believe that data is lost and drop to RO mode. This was reported in the following bugzilla bug. http://bugzilla.kernel.org/show_bug.cgi?id=14543 This patch makes libata EH retry FLUSH if it wasn't failed by the device. Signed-off-by: Tejun Heo <tj@kernel.org> Reported-by: Andrey Vihrov <andrey.vihrov@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* sata_fsl: Add asynchronous notification supportashish kalra2009-12-031-8/+10
| | | | | | | Enable device hot-plug support on Port multiplier fan-out ports Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt{37x,3x2n}: add debounce delay to cable detection methodsBartlomiej Zolnierkiewicz2009-12-032-0/+6
| | | | | | | | | | | | Alan Cox reported that cable detection sometimes works unreliably for HPT3xxN and that the issue is fixed by adding debounce delay as used by the vendor driver. Sergei Shtylyov also noticed that debounce delay is needed for all HPT37x and HPT3xxN chipsets according to vendor drivers. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt3x2n: fix cable detectionBartlomiej Zolnierkiewicz2009-12-031-1/+1
| | | | | | | | | The detection was reversed between primary and secondary ports. Fix it to match hpt366 and the vendor driver. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ata: Don't require newlines for link_power_management_policyMatthew Garrett2009-12-031-2/+1
| | | | | | | | sysfs attributes shouldn't require newlines. Make it possible to set the link power management policy without a trailing newline. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata-it821x: use PCI_DEVICE_ID_RDC_D1010 defineOtavio Salvador2009-12-031-1/+1
| | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt37x: unify ->pre_reset methodsBartlomiej Zolnierkiewicz2009-12-031-21/+2
| | | | | | | We can use the same ->pre_reset method for all HPT37x chipsets now. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_hpt37x: add proper cable detection methodsBartlomiej Zolnierkiewicz2009-12-031-30/+56
| | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* ahci: disable SNotification capability for ich8Shaohua Li2009-12-031-2/+18
| | | | | | | | | | | | | | | | | | I obseved there is a sata_async_notification() for every ahci interrupt. But the async notification does nothing (this is hard disk drive and no pmp). This cause cpu wastes some time on sntf register access. It appears ICH AHCI doesn't support SNotification register, but the controller reports it does. After quirking it, the async notification disappears. PS. it appears all ICH don't support SNotification register from ICH manual, don't know if we need quirk all ICH. I don't have machines with all kinds of ICH. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* sata_sil24: MSI support, disabled by defaultVivek Mahajan2009-12-031-0/+9
| | | | | | | | | The following patch adds MSI support. Some platforms may have broken MSI, so those are defaulted to use legacy PCI interrupts. Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* libata: remove experimental tag on PATA driversRobert Hancock2009-12-031-1/+1
| | | | | | | | | | Remove the experimental tag on Parallel ATA drivers. Though some of the individual PATA drivers are still marked as experimental, as a group they can hardly be considered to be, given they've been used in various distros for some time. Signed-off-by: Robert Hancock <hancockrwd@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* sata_mv: Clean up hard coded array size calculation.Thiago Farina2009-12-031-1/+1
| | | | | | | Use ARRAY_SIZE macro of kernel api instead. Signed-off-by: Thiago Farina <tfransosi@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_via: fix double put on isa bridgeJiri Slaby2009-12-031-6/+4
| | | | | | | | | | | In via_init_one, when via_isa_bridges iterator reaches PCI_DEVICE_ID_VIA_ANON and last but one via_isa_bridges bridge is found but rev doesn't match, pci_dev_put(isa) is called twice. Do pci_dev_put only once. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* pata_cs5536: use 32-bit BM DMA template instead of 16-bit.Krzysztof Halasa2009-12-031-1/+1
| | | | | | | Tested on IXP425 + CS5536. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
OpenPOWER on IntegriCloud