| Commit message (Collapse) | Author | Age | Files | Lines |
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It can't be called with a NULL transfer anymore so it can be simplified
to not check for that.
Fix indention of line-wrapped code to Linux standard.
The transfer pointer can be const.
It's not necessary to check if the spi_transfer's speed_hz is zero, as
the spi core also fills it in from the spi_device. However, the spi
core does not check if spi_device's speed is zero so we have to do
that still.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The spi core already checks for a slave setting mode bits that we
didn't list as supported when the master was registered. There is no
need to do it again in the master driver.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Despite many warnings in the SPI documentation and code, the spi-mxs
driver sets shared chip registers in the ->setup method. This method can
be called when transfers are in progress on other slaves controlled by the
master. Setting registers or any other shared state will corrupt those
transfers.
So fix mxs_spi_setup() to not call mxs_spi_setup_transfer().
mxs_spi_setup_transfer() is already called for each transfer when they
are actually performed in mxs_spi_transfer_one(), so the call in
mxs_spi_setup() isn't necessary to setup anything.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The ssp struct has a clock rate field, to provide the actual value, in Hz,
of the SSP output clock (the rate of SSP_SCK) after mxs_ssp_set_clk_rate()
is called. It is set by mxs_ssp_set_clk_rate(), for SSP using drivers (like
SPI and MMC) to *read* if they want to know the actual clock rate. The SPI
driver isn't supposed to *write* to it.
For some reason the spi-mxs driver decides to write to this field on init,
and sets it to the value of the SSP input clock (clk_sspN, from the MXS
clocking block) in kHz. It shouldn't be setting the value, and certainly
shouldn't be setting it with the wrong clock in the wrong units.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Because the driver sets the SPI_MASTER_HALF_DUPLEX flag, the spi core
will check transfers to insure they are not full duplex. It's not
necessary to check that in the spi-mxs driver as well.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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In DMA mode the chip select control bits would be ORed into the CTRL0
register without first clearing the bits. This means that after
addressing slave 1, the CTRL0 bit to address slave 1 would be still be
set when addressing slave 0, resulting in slave 1 continuing to be
addressed.
The message handling function would pass the CS value to the txrx
function, which would re-program the bits on each transfer in the
message. The selected CS does not change during a message so this is
inefficient. It also means there are two different sets of code for
selecting the CS, one for PIO that worked and one for DMA that didn't.
Change the code to set the CS bits in the message handling function
once. Now the DMA and PIO txrx functions don't need to care about CS
at all.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There are two bits which control the CS line in the CTRL0 register:
LOCK_CS and IGNORE_CRC. The latter would be better named DEASSERT_CS
in SPI mode.
Setting DEASSERT_CS causes CS to be de-asserted at the end of the transfer.
It should normally be set only for the final segment of the final transfer.
The DMA code explicitly sets it in this case, but because it never clears
the bit from the ctrl0 register, it will remain set for all transfers in
subsequent messages. This results in a CS pulse between transfers.
There is a similar problem with the read mode bit never being cleared
in DMA mode.
This patch fixes DEASSERT_CS and READ being left on in DMA mode.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There are three flag arguments to the PIO and DMA txrx functions. Two
are passed as pointers to integers, even though they are input only
and not modified, which makes no sense to do. The third is passed as
an integer.
The compiler must use an argument register or stack variable for each
flag this way. Using bitflags in a single flag argument is more
efficient and produces smaller code, since all the flags can fit in a
single register. And all the flag arguments get cumbersome,
especially when more are added for things like GPIO chipselects.
The "first" flag is never used, so can just be deleted.
The "last" flag is renamed to DEASSERT_CS, since that's really what it
does. The spi_transfer cs_change flag means that CS might be
de-asserted on a transfer which is not last and not de-assert on the
last transfer, so it is not which transfer is the last we need to know
but rather the transfers after which CS should be de-asserted.
This also extends the driver to not ignore cs_change when setting the
DEASSERT_CS nee "last" flag.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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INGORE_CRC, better named DEASSERT_CS, should be cleared on all tranfers
except the last. So instead of only clearing it on the first transfer, we
can just always clear it. It will set on the last transfer.
This removes the only use of the "first" flag in the transfer functions, so
that flag can be then be removed.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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These functions consist of nothing but one single writel call and are
only called once. And the names really aren't accurate or clear,
since they don't enable or disble SPI. Rather they set the bit that
controls the state of CS at the end of transfer. It easier to follow
the code to just set this bit with a writel() along with all the other
bits being set in the same function.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There are two bits which control the CS line in the CTRL0 register:
LOCK_CS and IGNORE_CRC. The latter would be better named DEASSERT_CS
in SPI mode.
LOCK_CS keeps CS asserted though the entire transfer. This should
always be set. The DMA code will always set it, explicitly on the
first segment of the first transfer, and then implicitly on all the
rest by never clearing the bit from the value read from the ctrl0
register.
The PIO code will explicitly set it for the first transfer, leave it
set for intermediate transfers, and then clear it for the final
transfer. It should not clear it.
The only reason to not set LOCK_CS would be to attempt an altered
protocol where CS pulses between each word. Though don't get your
hopes up if you want to do this, as the hardware doesn't appear to do
this in any sane manner. It appears to be related to the hardware
FIFO fill level.
The code can be simplified by just setting LOCK_CS once and then not
needing to deal with it at all in the PIO and DMA transfer functions.
Signed-off-by: Trent Piepho <tpiepho@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Mark Brown <broonie@linaro.org>
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The hardware level /CS handling is tied to the start of the data path so
is rolled into the same function as we use to manipulate GPIO /CS. In
order to support factoring out the /CS handling into the core separate the
two and explicitly start transfers separately to the /CS handling.
Signed-off-by: Mark Brown <broonie@linaro.org>
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To help with bisection of future refactoring to share more of the code for
handling a spi_message pull the enabling of GPIO based /CS prior to all
the hardware setup for starting a transfer.
Signed-off-by: Mark Brown <broonie@linaro.org>
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The hardware level /CS handling is tied to the start of the data path so
is rolled into the same function as we use to manipulate GPIO /CS. In
order to support factoring out the /CS handling into the core separate the
two and explicitly start transfers separately to the /CS handling.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Rather than using the driver custom platform data to store the chip select
GPIO use the cs_gpio field provided by the SPI core, supporting future
refectoring.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Mark Brown <broonie@linaro.org>
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Ensure that the FIFOs are fully drained before we deassert /CS or do any
delays that have been requested in order to ensure that the behaviour
visible on the bus matches that which was requested by the caller.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Conflicts:
drivers/spi/spi-s3c64xx.c
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Replace all symbols by simple dependency PLAT_SAMSUNG.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add compatibles for s3c6410, s5pc100 and s5pc110/s5pv210 boards.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Also improve the error reporting on failure and remove a duplicate put.
This provides a small code saving.
Signed-off-by: Mark Brown <broonie@linaro.org>
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subsys_init_call() initializes driver too early.
It's preventing to move DMA channel allocation at the begining
(driver probe).
This patch reduces and simplifies initalization code by
using module_platform_driver() macro.
It's also efficiently delaying driver startup.
Signed-off-by: Lukasz Czerwinski <l.czerwinski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The loops which SPI controller drivers use to process the list of transfers
in a spi_message are typically very similar and have some error prone areas
such as the handling of /CS. Help simplify drivers by factoring this code
out into the core - if drivers provide a transfer_one() function instead
of a transfer_one_message() function the core will handle processing at the
message level.
/CS can be controlled by either setting cs_gpio or providing a set_cs
function. If this is not possible for hardware reasons then both can be
omitted and the driver should continue to implement manual /CS handling.
This is a first step in refactoring and it is expected that there will be
further enhancements, for example factoring out of the mapping of transfers
for DMA and the initiation and completion of interrupt driven transfers.
Signed-off-by: Mark Brown <broonie@linaro.org>
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This is of very little value in itself but will be useful once the loop
iterating over the transfers is also factored out into the core.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Many SPI drivers perform setup and tear down on every message, usually
doing things like DMA mapping the message. Provide hooks for them to use
to provide such operations.
This is of limited value for drivers that implement transfer_one_message()
but will be of much greater utility with future factoring out of standard
implementations of that function.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Provide tracepoints for the lifecycle of a message from submission to
completion and for the active time for masters to help with performance
analysis of SPI I/O.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Current code keeps the clocks enabled all the time, it wastes the power
when there is no operaiton on the spi controller.
In order to save the power, this patch adds the two hooks:
spi_imx_prepare_message: enable the clocks for this message
spi_imx_unprepare_message: disable the clocks.
This patch also disables the clocks in the end of the probe.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Support for loading the Renesas HSPI driver via devicetree.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix the following checkpatch warning.
WARNING: space prohibited before semicolon
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'of_match_ptr' is defined in linux/of.h. Include it explicitly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The variable efm32_spi_pdata_default origins from an earlier revision of
the patch introducing the driver, its use was dropped because of review
comments but I forgot to also drop the variable itself.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This call is needed to cleanup the resources requested by
spi_bitbang_start in the probe callback.
Noticed-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Calling kfree() to clean up the memory obtained from spi_alloc_master() is
wrong as this is done in spi_master_release() when spi_master->dev's refcount
reaches zero.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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clock source is prepared and enabled by clk_prepare_enable()
in probe function, but no disable or unprepare in remove.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
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- improve dependencies using COMPILE_TEST
- fix a typo
- drop platform_set_drvdata(pdev, NULL) in error path of probe
- make MODULE_LICENSE match the header
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Added missing __iomem annotation in order to fix the following
sparse warnings:
drivers/spi/spi-fsl-dspi.c:140:16: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:140:16: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:140:16: got void *
drivers/spi/spi-fsl-dspi.c:143:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:143:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:143:9: got void *
drivers/spi/spi-fsl-dspi.c:132:18: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:132:18: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:132:18: got void *
drivers/spi/spi-fsl-dspi.c:241:17: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:241:17: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:241:17: got void *
drivers/spi/spi-fsl-dspi.c:132:18: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:132:18: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:132:18: got void *
drivers/spi/spi-fsl-dspi.c:259:29: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:259:29: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:259:29: got void *
drivers/spi/spi-fsl-dspi.c:266:29: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:266:29: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:266:29: got void *
drivers/spi/spi-fsl-dspi.c:298:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:298:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:298:9: got void *
drivers/spi/spi-fsl-dspi.c:299:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:299:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:299:9: got void *
drivers/spi/spi-fsl-dspi.c:300:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:300:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:300:9: got void *
drivers/spi/spi-fsl-dspi.c:303:17: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:303:17: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:303:17: got void *
drivers/spi/spi-fsl-dspi.c:318:21: warning: incorrect type in argument 1 (different address spaces)
drivers/spi/spi-fsl-dspi.c:318:21: expected void const volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:318:21: got void *
drivers/spi/spi-fsl-dspi.c:327:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:327:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:327:9: got void *
drivers/spi/spi-fsl-dspi.c:386:9: warning: incorrect type in argument 2 (different address spaces)
drivers/spi/spi-fsl-dspi.c:386:9: expected void volatile [noderef] <asn:2>*addr
drivers/spi/spi-fsl-dspi.c:386:9: got void *
drivers/spi/spi-fsl-dspi.c:485:20: warning: incorrect type in assignment (different address spaces)
drivers/spi/spi-fsl-dspi.c:485:20: expected void *base
drivers/spi/spi-fsl-dspi.c:485:20: got void [noderef] <asn:2>*
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix the following checkpatch warnings.
WARNING: Use #include <linux/uaccess.h> instead of <asm/uaccess.h>
WARNING: braces {} are not necessary for any arm of this statement
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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The driver core clears the driver data to NULL after device_release
or on probe failure. Thus, it is not needed to manually clear the
device driver data to NULL.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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