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* pinctrl: uniphier: change pin names of aio/xirq for LD11Kunihiko Hayashi2017-03-061-6/+6
| | | | | | | | | This patch changes pin names of AIO and XIRQ according to updated specification. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: qcom: add get_direction functionTimur Tabi2017-03-061-0/+15
| | | | | | | | | | | | | | The get_direction callback function allows gpiolib to know the current direction (input vs output) for a given GPIO. This is particularly useful on ACPI systems, where the GPIOs are configured only by firmware (typically UEFI), so the only way to know the initial values to query the hardware directly. Without this function, gpiolib thinks that all GPIOs are configured for input. Signed-off-by: Timur Tabi <timur@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* scripts/spelling.txt: add "overrided" pattern and fix typo instancesMasahiro Yamada2017-02-271-1/+1
| | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: overrided||overridden Link: http://lkml.kernel.org/r/1481573103-11329-22-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge tag 'pinctrl-v4.11-1' of ↵Linus Torvalds2017-02-21101-3600/+11717
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Pin control bulk changes for the v4.11 kernel cycle. Core changes: - Switch the generic pin config argument from 16 to 24 bits, only use 8 bits for the configuration type. We might need to encode more information about a certain setting than we need to encode different generic settings. - Add a cross-talk API to the pin control GPIO back-end, utilizing pinctrl_gpio_set_config() from GPIO drivers that want to set up a certain pin configuration in the back-end. This also includes the .set_config() refactoring of the GPIO chips, so that they pass a generic configuration for things like debouncing and single ended (typically open drain). This change has also been merged in an immutable branch to the GPIO tree. - Take hogs with a delayed work, so that we finalize probing a pin controller before trying to get any hogs. - For pin controllers putting all group and function definitions into the device tree, we now have generic code to deal with this and it is used in two drivers so far. - Simplifications of the pin request conflict check. - Make dt_free_map() optional. Updates to drivers: - pinctrl-single now use the generic helpers to generate dynamic group and function tables from the device tree. - Texas Instruments IOdelay configuration driver add-on to pinctrl-single. - i.MX: use radix trees to store groups and functions, use the new generic group and function helpers to manage them. - Intel: add support for hardware debouncing and 1K pull-down. New subdriver for the Gemini Lake SoC. - Renesas SH-PFC: drive strength and bias support, CAN bus muxing, MSIOF, SDHI, HSCIF for r8a7796. Gyro-ADC supporton r8a7791. - Aspeed: use syscon cross-dependencies to set up related bits in the LPC host controller and display controller. - Aspeed: finalize G4 and G5 support. Fix mux configuration on GPIOs. Add banks Y, Z, AA, AB and AC. - AMD: support additional GPIO. - STM32: set this controller to strict muxing mode. STM32H743 MCU support. - Allwinner sunxi: deep simplifications on how to support subvariants of SoCs without adding to much SoC-specific data for each subvariant, especially for sun5i variants. New driver for V3s SoCs. New driver for the H5 SoC. Support A31/A31s variants with the new variant framework. - Mvebu: simplifications to use a MMIO and regmap abstraction. New subdrivers for the 98DX3236, 98DX5241 SoCs. - Samsung Exynos: delete Exynos4415 support. Add crosstalk to the SoC driver to access regmaps. Add infrastructure for pin-bank retention control. Clean out the pin retention control from arch/arm/mach-exynos and arch/arm/mach-s5p and put it properly in the Samsung pin control driver(s). - Meson: add HDMI HPD/DDC pins. Add pwm_ao_b pin. - Qualcomm: use raw spinlock variants: this makes the qualcomm driver realtime-safe" * tag 'pinctrl-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (111 commits) pinctrl: samsung: Fix return value check in samsung_pinctrl_get_soc_data() pinctrl: intel: unlock on error in intel_config_set_pull() pinctrl: berlin: make bool drivers explicitly non-modular pinctrl: spear: make bool drivers explicitly non-modular pinctrl: mvebu: make bool drivers explicitly non-modular pinctrl: sunxi: make sun5i explicitly non-modular pinctrl: sunxi: Remove stray printk call in sun5i driver's probe function pinctrl: samsung: mark PM functions as __maybe_unused pinctrl: sunxi: Remove redundant A31s pinctrl driver pinctrl: sunxi: Support A31/A31s with pinctrl variants pinctrl: Amend bindings for STM32 pinctrl pinctrl: Add STM32 pinctrl driver DT bindings pinctrl: stm32: Add STM32H743 MCU support include: dt-bindings: Add STM32H7 pinctrl DT defines gpio: aspeed: Remove dependence on GPIOF_* macros pinctrl: stm32: fix bad location of gpiochip_lock_as_irq drivers: pinctrl: add driver for Allwinner H5 SoC pinctrl: intel: Add Intel Gemini Lake pin controller support pinctrl: intel: Add support for 1k additional pull-down pinctrl: intel: Add support for hardware debouncer ...
| * pinctrl: samsung: Fix return value check in samsung_pinctrl_get_soc_data()Wei Yongjun2017-02-131-3/+2
| | | | | | | | | | | | | | | | | | | | In case of error, the function devm_ioremap() returns NULL pointer not ERR_PTR(). Fix by using devm_ioremap_resource instead of devm_ioremap. Fixes: 8b1bd11c1f8f ("pinctrl: samsung: Add the support the multiple IORESOURCE_MEM for one pin-bank") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: intel: unlock on error in intel_config_set_pull()Dan Carpenter2017-02-131-2/+4
| | | | | | | | | | | | | | | | We need to unlock before returning -EINVAL on this error path. Fixes: 04cc058f0c52 ("pinctrl: intel: Add support for 1k additional pull-down") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: berlin: make bool drivers explicitly non-modularPaul Gortmaker2017-02-134-28/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: "Antoine Ténart" <antoine.tenart@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Hongzhou Yang <hongzhou.yang@mediatek.com> Cc: Thomas Hebb <tommyhebb@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: spear: make bool drivers explicitly non-modularPaul Gortmaker2017-02-136-66/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get the exact same change, so they are handled in batch. Changes are (1) use init.h header in place of module.h header, (2) delete module_exit related code, (3) delete MODULE_DEVICE_TABLE, and (4) delete MODULE_LICENCE/MODULE_AUTHOR and associated tags. None of these drivers were using module_init() so we don't have to worry about the init ordering getting changed with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE etc. tags since all that information is already contained at the top of each file in the comments. Cc: spear-devel@list.st.com Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: mvebu: make bool drivers explicitly non-modularPaul Gortmaker2017-02-139-65/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | None of the Kconfigs for any of these drivers are tristate, meaning that they currently are not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get the exact same change, so they are handled in batch. Changes are (1) use builtin_platform_driver, (2) dont use module.h (3) delete module_exit related code, (4) delete MODULE_DEVICE_TABLE, and (5) delete MODULE_LICENCE/MODULE_AUTHOR and associated tags. For the dove driver we explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. We deleted the MODULE_LICENSE etc. tags since all that information is already contained at the top of the file in the comments. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sunxi: make sun5i explicitly non-modularPaul Gortmaker2017-02-061-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had all these corrected in commit 0c8c6ba00cbf ("pinctrl: sunxi: make bool drivers explicitly non-modular") but this new one recently crept in. The Kconfig currently controlling compilation of this code is: drivers/pinctrl/sunxi/Kconfig:config PINCTRL_SUN5I drivers/pinctrl/sunxi/Kconfig: def_bool MACH_SUN5I ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. We also delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sunxi: Remove stray printk call in sun5i driver's probe functionChen-Yu Tsai2017-02-061-2/+0
| | | | | | | | | | | | | | | | | | | | | | There is a stray printk call in the new sun5i pinctrl driver's probe function. Remove it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: samsung: mark PM functions as __maybe_unusedArnd Bergmann2017-02-061-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rework of the suspend/resume handling uses the wrong #ifdef check, leading to a build warning without CONFIG_PM_SLEEP: drivers/pinctrl/samsung/pinctrl-samsung.c:1142:12: error: 'samsung_pinctrl_resume' defined but not used [-Werror=unused-function] drivers/pinctrl/samsung/pinctrl-samsung.c:1092:12: error: 'samsung_pinctrl_suspend' defined but not used [-Werror=unused-function] Using a __maybe_unused annotation instead of the #ifdef is a simple way to avoid this problem class. Fixes: 2b24efa8e5c5 ("pinctrl: samsung: Replace syscore ops with standard platform device pm_ops") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sunxi: Remove redundant A31s pinctrl driverChen-Yu Tsai2017-02-063-814/+0
| | | | | | | | | | | | | | | | | | | | | | | | Now that we can support the A31s pin controller with the A31 driver using the new variants support, the independent A31s driver becomes redundant. Remove it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: sunxi: Support A31/A31s with pinctrl variantsChen-Yu Tsai2017-02-062-65/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The A31s is a trimmed down version of the A31. Some hardware blocks are removed, thus not available for muxing on the external pins. Some external pins were directly removed. This makes it easy to support the A31s pin controller with the A31 driver. We just mark the pins and functions that were trimmed as A31 only. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: stm32: Add STM32H743 MCU supportAlexandre TORGUE2017-02-063-0/+1986
| | | | | | | | | | | | | | | | This patch adds STM32H743 pinctrl and GPIO support, relies on the generic STM32 pinctrl driver. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: stm32: fix bad location of gpiochip_lock_as_irqAlexandre TORGUE2017-01-301-25/+12
| | | | | | | | | | | | | | | | Move gpio lock as irq from "domain alloc" callback to "domain activate" callback. It will allow to use gpiolib sysfs correctly. Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * drivers: pinctrl: add driver for Allwinner H5 SoCIcenowy Zheng2017-01-303-0/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on the Allwinner H5 datasheet and the pinctrl driver of the backward-compatible H3 this introduces the pin multiplex assignments for the H5 SoC. H5 introduced some more pin functions (e.g. three more groups of TS pins, and one more groups of SIM pins) than H3. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: intel: Add Intel Gemini Lake pin controller supportMika Westerberg2017-01-303-0/+521
| | | | | | | | | | | | | | | | | | | | | | | | This driver adds pinctrl/GPIO support for Intel Gemini Lake SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. This commit includes material from David E. Box. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: intel: Add support for 1k additional pull-downMika Westerberg2017-01-302-1/+18
| | | | | | | | | | | | | | | | | | The next generation Intel GPIO hardware supports additional 1k pull-down per-pad. Add support for this to the Intel core pinctrl driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * pinctrl: intel: Add support for hardware debouncerMika Westerberg2017-01-302-2/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The next generation Intel GPIO hardware has two additional registers PADCFG2 and PADCFG3. The latter is marked as reserved but the former includes configuration for per-pad hardware debouncer. This patch adds support for that in the Intel pinctrl core driver. Since these are additional features on top of the current generation hardware, we use revision number and feature flags to enable this if detected. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * Merge tag 'sh-pfc-for-v4.11-tag2' of ↵Linus Walleij2017-01-301-0/+86
| |\ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.11 (take two) - Add Gyro-ADC pin groups for R-Car M2-W.
| | * pinctrl: sh-pfc: r8a7791: Add ADI pinconf supportJacopo Mondi2017-01-201-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | Add pin configuration support for Gyro-ADC, named ADI on r8a7791 SoC. Signed-off-by: Jacopo Mondi <jacopo@jmondi.org> Tested-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | Merge branch 'ib-mvebu-98dx3236' into develLinus Walleij2017-01-301-0/+156
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| | * | pinctrl: mvebu: pinctrl driver for 98DX3236 SoCKalyan Kinthada2017-01-301-0/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pinctrl driver supports the 98DX3236, 98DX3336 and 98DX4251 SoCs from Marvell. Signed-off-by: Kalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | pinctrl: broxton: No need to take pointer of a pointerAndy Shevchenko2017-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to take pointer of a pointer to an array of SoC data in platform driver. Do it in the same way as it's done for ACPI. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | Merge tag 'v4.10-rc6' into develLinus Walleij2017-01-3010-48/+102
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux 4.10-rc6 Resolved conflicts in: drivers/pinctrl/pinctrl-amd.c drivers/pinctrl/samsung/pinctrl-exynos.c
| * | | | pinctrl: samsung: Replace syscore ops with standard platform device pm_opsMarek Szyprowski2017-01-261-58/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Once the dependency on PMU driver (for pad retention control) has been removed, there is no reason to use syscore_ops based suspend/resume. This patch replaces it with standard platform device pm_ops based solution. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Move retention control from mach-s5pv210 to the pinctrl driverMarek Szyprowski2017-01-261-0/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves pad retention control from S5PV210 machine code to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine and pin control code. Till now it worked fine only because sys_ops for machine code and pin controller were called in registration order. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> For mach-s5pv210: Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Move retention control from mach-exynos to the pinctrl driverMarek Szyprowski2017-01-261-0/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves pad retention control from PMU driver to Exynos pin controller driver. This helps to avoid possible ordering and logical dependencies between machine, PMU and pin control code. Till now it worked fine only because sys_ops for PMU and pin controller were called in registration order. This is also a preparation for adding new features to Exynos pin controller driver, like runtime power management and suspending individual pin controllers, which might be a part of some power domain. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: baytrail: Fix debugfs offset outputAlexander Stein2017-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apparently each GPIO pad's register are 16 bytes, so multiply the pad_map by that. The same is done in byt_gpio_reg the only other place where pad_map is used. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Add infrastructure for pin-bank retention controlMarek Szyprowski2017-01-262-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pad retention control after suspend/resume cycle should be done from pin controller driver instead of PMU (power management unit) driver to avoid possible ordering and logical dependencies. Till now it worked fine only because PMU driver registered its sys_ops after pin controller. This patch adds infrastructure to handle pad retention during pin control driver resume. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Remove dead codeMarek Szyprowski2017-01-261-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'enable' parameter has been removed a while ago, so all code for handling it can be simply removed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Use generic of_device_get_match_data helperMarek Szyprowski2017-01-261-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace custom code with generic helper. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Add missing initconst annotationMarek Szyprowski2017-01-261-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos5433 support has been added in parallel to adding initconst annotation to most of the init data structures, so add those annotations also to Exynos5433 structures. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: mediatek: Use real dependenciesJean Delvare2017-01-261-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not hide pinctrl drivers for Mediatek platforms using conditionals. Doing so actually leaves the symbols present (but always disabled) on all other platforms, which is confusing and inefficient. Better use real dependencies so that the symbols do not exist at all on platforms where they are not relevant. Signed-off-by: Jean Delvare <jdelvare@suse.de> Reported-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: meson: meson-gxl: add the pwm_ao_b pinMartin Blumenstingl2017-01-261-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the pwm_ao_b pin. Unfortunately the registers for the pwm_ao pins are not documented at all. The source for the pwm_ao_b pin from this patch is the Khadas VIM GPL kernel source, which sets bit 3 and unsets bits 4 and 31 to enable the PWM LEDs. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: broxton: Rename apl-pinctrl driverAndy Shevchenko2017-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While we have no users yet rename the platform driver to use the same pattern as the rest of Intel SoCs, i.e. use full SoC name in 'apollolake-pinctrl'. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge branch 'ib-pinctrl-genprops' into develLinus Walleij2017-01-2622-72/+118
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| | * | | | pinctrl / gpio: Introduce .set_config() callback for GPIO chipsMika Westerberg2017-01-263-42/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | pinctrl: Allow configuration of pins from gpiolib based driversMika Westerberg2017-01-263-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a GPIO driver is backed by a pinctrl driver the GPIO driver sometimes needs to call the pinctrl driver to configure certain things, like whether the pin is used as input or output. In addition to this there are other configurations applicable to GPIOs such as setting debounce time of the GPIO. To support this we introduce a new function pinctrl_gpio_set_config() that can be used by gpiolib based driver to pass configuration requests to the backing pinctrl driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | pinctrl: Widen the generic pinconf argument from 16 to 24 bitsMika Westerberg2017-01-2616-30/+27
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current pinconf packed format allows only 16-bit argument limiting the maximum value 65535. For most types this is enough. However, debounce time can be in range of hundreths of milliseconds in case of mechanical switches so we cannot represent the worst case using the current format. In order to support larger values change the packed format so that the lower 8 bits are used as type which leaves 24 bits for the argument. This allows representing values up to 16777215 and debounce times up to 16 seconds. We also convert the existing users to use 32-bit integer when extracting argument from the packed configuration value. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: mvebu: remove unused variableArnd Bergmann2017-01-261-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A cleanup caused a harmless warning: drivers/pinctrl/mvebu/pinctrl-kirkwood.c: In function 'kirkwood_pinctrl_probe': drivers/pinctrl/mvebu/pinctrl-kirkwood.c:460:19: error: unused variable 'res' [-Werror=unused-variable] The obvious fix is to remove the declaration of the now unused variable. Fixes: ad9ec4ecee68 ("pinctrl: mvebu: switch drivers to generic simple mmio") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]Andrew Jeffery2017-01-261-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Incorrect video output configuration bits were being tested on pins in GPIO banks AA and AB for the ROM{8,16} mux functions. The ROM{8,16} functions are the highest priority for the relevant pins and also the default function, so we require the relevant video output configuration be disabled to mux GPIO functionality. As the wrong bits were being tested a GPIO export would succeed but leave the pin in an unresponsive state (i.e. value updates were ignored). This misbehaviour was discovered as part of extending the GPIO controller's support to cover banks Y, Z, AA, AB and AC (AC in the case of the g5 SoC). Fixes: 6d329f14a75f ("pinctrl: aspeed-g4: Add mux configuration for all pins") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: qcom: Use raw spinlock variantsJulia Cartwright2017-01-261-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSM pinctrl driver currently implements an irq_chip for handling GPIO interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. On real-time kernels, this fixes an OOPs which looks like the following, as reported by Brian Wrenn: kernel BUG at kernel/locking/rtmutex.c:1014! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP Modules linked in: spidev_irq(O) smsc75xx wcn36xx [last unloaded: spidev] CPU: 0 PID: 1163 Comm: irq/144-mmc0 Tainted: G W O 4.4.9-linaro-lt-qcom #1 PC is at rt_spin_lock_slowlock+0x80/0x2d8 LR is at rt_spin_lock_slowlock+0x68/0x2d8 [..] Call trace: rt_spin_lock_slowlock rt_spin_lock msm_gpio_irq_ack handle_edge_irq generic_handle_irq msm_gpio_irq_handler generic_handle_irq __handle_domain_irq gic_handle_irq Reported-by: Brian Wrenn <dcbrianw@gmail.com> Tested-by: Brian Wrenn <dcbrianw@gmail.com> Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Fix samsung_pinctrl_create_functions return valueMarek Szyprowski2017-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Return proper error code in case of memory allocation failure. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Remove messages for failed memory allocationMarek Szyprowski2017-01-263-33/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Memory subsystem already prints message about failed memory allocation, there is no need to do it in the drivers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl/amd: Drop pinctrl_unregister for devm_ registered deviceWei Yongjun2017-01-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's not necessary to unregister pin controller device registered with devm_pinctrl_register() and using pinctrl_unregister() leads to a double free. Fixes: 3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: meson: Add HDMI HPD/DDC pins functionsNeil Armstrong2017-01-182-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pinctrl functions for HDMI HPD pin and DDC pins on Amlogic Meson GXL and GXBB SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)Krzysztof Kozlowski2017-01-183-78/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for Exynos4415 is going away because there are no internal nor external users. Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"), the platform cannot be instantiated so remove also the drivers. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | pinctrl: ti-iodelay: remove redundant pin < 0 check on unsigned intColin Ian King2017-01-181-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pin is an unsigned int and therefore can never be < 0 so this check is redundant. Remove the check and the associated dev_err error message. Fixes CoverityScan CID#1396438 ("Unsigned compared against 0") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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