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* pinctrl: s3c24xx: use correct header for chained_irq functionsHeiko Stuebner2013-06-191-2/+1
| | | | | | | | | | | | chained_irq_enter and chained_irq_exit moved to a real header under linux/pinctrl instead of asm/. Update the pinctrl driver to use the correct header and fix the build error. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>` Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* pinctrl: Add pinctrl-s3c24xx driverHeiko Stuebner2013-05-211-0/+652
The s3c24xx pins follow a similar pattern as the other Samsung SoCs and can therefore reuse the already introduced infrastructure. The s3c24xx SoCs have one design oddity in that the first 4 external interrupts do not reside in the eint pending register but in the main interrupt controller instead. We solve this by forwarding the external interrupt from the main controller into the irq domain of the pin bank. The masking/acking of these interrupts is handled in the same way. Furthermore the S3C2412/2413 SoCs contain another oddity in that they keep the same 4 eints in the main interrupt controller and eintpend register and requiring ack operations to happen in both. This is solved by using different compatible properties for the wakeup eint node which set a property accordingly. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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