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path: root/drivers/pinctrl/pinctrl-abx500.h
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* pinctrl/abx500: replace IRQ offsets with table read-in valuesLee Jones2013-02-101-4/+6
| | | | | | | | | | | | | | | | | | The ABx500 GPIO controller used to provide a set of virtual contiguous IRQs for use by sub-devices, but they have been removed after a request from Mainline Maintainers. Now the AB8500 core driver deals with almost all IRQ related issues instead. The ABx500 GPIO driver is now only used to convert between GPIO and IRQ numbers which is actually quite difficult, as the ABx500 GPIO's associated IRQs are clustered together throughout the interrupt number space at irregular intervals. To solve this quandary, we have placed the read-in values into the existing cluster information table to use during conversion. Signed-off-by: Lee Jones <lee.jones@linaro.org> [Moved irq_base removal into this patch] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB8540 sub-driverPatrice Chotard2013-02-051-0/+13
| | | | | | | | | | | | | Add AB8540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB9540 sub-driverPatrice Chotard2013-02-051-0/+13
| | | | | | | | | | | | | Add AB9540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB8505 sub-driverPatrice Chotard2013-02-051-0/+13
| | | | | | | | | | | | Add AB8505 sub driver to the ABx5x family. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl/abx500: add AB8500 sub-driverPatrice Chotard2013-01-301-0/+13
| | | | | | | | | | | | This adds a subdriver for the AB8500 pinctrl portions. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: add abx500 pinctrl driver corePatrice Chotard2013-01-301-0/+180
This adds the AB8500 core driver, which will be utilized by the follow-on drivers for different ABx500 variants. Sselect the driver from the DBX500_SOC, as this chip is powering and clocking that SoC. Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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