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path: root/drivers/pci/host/pci-rcar-gen2.c
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* PCI: rcar: Use new OF interrupt mapping when possibleLucas Stach2014-04-161-1/+7
| | | | | | | | | | | | Use new OF interrupt mapping (of_irq_parse_and_map_pci()) when possible. This is the recommended method of doing the IRQ mapping. For old devicetrees we fall back to the previous practice. This allows interrupts to be remapped across bridges. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Break out window size handlingMagnus Damm2014-02-181-3/+28
| | | | | | | | | Break out the hard coded window size code to allow dynamic setup. The window size is still left at 1GiB but with this patch changing window size is easy for testing. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Register each instance independentlyMagnus Damm2014-02-181-60/+20
| | | | | | | | | Convert the code to allow per-device probe() like other device drivers. This also delays driver registration due to change from subsys_initcall() to regular module_platform_driver(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Fix bridge logic configuration accessesBen Dooks2014-02-181-0/+4
| | | | | | | | | | | | | | | The bridge logic at slot 0 only supports reads up to 0x40 and the rest of the PCI configuration space for this slot is marked as reserved in the manual. Trying a read from offset 0x100 is producing an error from the bridge. With error interrupts enabled, the following is printed: pci-rcar-gen2 ee0d0000.pci: error irq: status 00000014 Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Add error interrupt handlingBen Dooks2014-02-181-0/+60
| | | | | | | | | Add option to enable interrupts to report any errors from the AHB-PCI bridge to help find any issues with the bridge when in use. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Check platform_get_irq() return codeBen Dooks2014-02-181-0/+5
| | | | | | | | | The current code does not check the return from platform_get_irq() so add an error check and return if this call does fail. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Simon Horman <horms+renesas@verge.net.au>
* PCI: rcar: Add runtime PM supportValentine Barshak2013-12-091-1/+7
| | | | | | | | | | | If runtime PM is enabled in the kernel config, the PCI clocks are not forced on at start-up, and thus, are never enabled. Use pm_runtime_get_sync() to enable the clocks. While at it, use dev_info() instead of pr_info() since now we have the device pointer available in the PCI setup callback. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* PCI: rcar: Fix rcar_pci_probe() return value checkWei Yongjun2013-12-071-2/+2
| | | | | | | | | In case of error, the function devm_ioremap_resource() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jg1.han@samsung.com>
* PCI: Add R-Car Gen2 internal PCI supportValentine Barshak2013-10-301-0/+333
This adds internal PCI controller driver for R-Car Gen2 SoC. There are three PCI controllers available with only a single EHCI/OHCI device built-in on each PCI bus. This gives us three USB channels. Channel 0 is shared with the USBHS device, while channel 2 is shared with the USBSS. The PCI controllers do not support I/O port space mapping, and it is not needed here. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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