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* ixgbe: convert to ethtool set_phys_idEmil Tantilov2011-04-272-12/+18
| | | | | | | | | | | | | Based on the original patch submitted by Stephen Hemminger. This patch makes the following changes: - Change ETHTOOL_ID_INACTIVE return value to 2 (blinks/sec) - Fix restoring of IXGBE_LEDCTL CC: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix X540 ethtool loopback test.Don Skidmore2011-04-271-0/+7
| | | | | | | | | | On X540 we need to set the MACC.FLU bit to 1 in order to force the link up before entering MAC loopback. This is only used in the ethtool loopback test, which was failing. This patch corrects it. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: Bump versionDon Skidmore2011-04-271-2/+2
| | | | | | | | | Bump the driver version number to better match up with the out of tree driver that has similar functionality. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: enable SCTP checksum offload for X540Don Skidmore2011-04-271-1/+7
| | | | | | | | | X540 supports SCTP checksum offload so enable it. It was overlooked when X540 support was initially added to the driver. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: do not clear FCoE DDP error status for received ABTSYi Zou2011-04-271-2/+2
| | | | | | | | | | | | | The ddp->err is initialized to be 1 to make sure outstanding DDP context is guaranteed to be invalidated when HW is not auto-invalidating it. However, in case of receiving ABTS response for a DDPed I/O, the ddp->err was cleared, bypassing the invalidating of the DDP context from upper protocol stack when ixgbe_fcoe_ddp_put() is called. This bug is fixed here by updating the error only when FCP_RSP is received. Signed-off-by: Yi Zou <yi.zou@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix static functionsJohn Fastabend2011-04-274-5/+5
| | | | | | | | Define functions as static added C=1 (sparse) to my make line brought these to my attention. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: remove ntuple display supportAlexander Duyck2011-04-272-6/+0
| | | | | | | | | | | | | This change removes the ntuple display support from ixgbe. The reason for this change is to resolve a number of issues in the way display filtering is handled. I plan to add support for displaying these filters via the network flow classifier interface. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: add LED blink code for x540Emil Tantilov2011-04-271-2/+62
| | | | | | | | | Implement blink_led_start and blink_led_stop functions for x540 using the MACC register. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: add support for 64k EEPROM for 82599Emil Tantilov2011-04-271-1/+30
| | | | | | | | | | | 82599 supports up to 32k EEPROM addressing via EERD register. If we wish to address larger EEPROM this have to be done via serial interface. This patch adds function ixgbe_read_eeprom_82599 which selects the best method to read the EEPROM. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: register defines cleanupEmil Tantilov2011-04-272-67/+125
| | | | | | | | | | | | Remove duplicates. Fix incorrect defines. Fix/Update comments. Fix whitespace. Add new register defines. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: explicitly disable 100H for x540Emil Tantilov2011-04-271-1/+2
| | | | | | | | | 100H is not supported on this HW, but the bit is set on the PHY. This can result in link at 100F when advertising only 1000F. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, X540 devices do not respond to pause framesJohn Fastabend2011-04-132-2/+9
| | | | | | | | | | DCB enabled X540 devices are not responding to pause frames due to a missing register set that was added for these devices that did not exist in other devices. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, misallocated packet buffer size with X540 deviceJohn Fastabend2011-04-136-27/+52
| | | | | | | | | | | | | | | | | | The X540 device has a smaller packet buffer but the DCB configuration never took this into account. Under stress this can result in the DMA engine hanging and TX Unit hang occurring to reset the device. This patch reworks the packet buffer allocation routine used for DCB on 82599 and X540 devices to account for RX packet buffer sizes. This fixes the immediate hang. We should consolidate the various hardware specific routines for configuring features into a single routine. This will make it much harder to miss feature cases like this. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: make device_caps() genericEmil Tantilov2011-04-134-17/+18
| | | | | | | | | | | x540 has the same device capability word in the EEPROM as 82599. This patch renames ixgbe_get_device_caps_82599 to ixgbe_get_device_caps_generic, moves it to ixgbe_common.h and sets up the function pointer for x540. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: explicitly disable 100H for x540Emil Tantilov2011-04-131-1/+2
| | | | | | | | | 100H is not supported on this HW, but the bit is set on the PHY. This can result in link at 100F when advertising only 1000F. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: add support for new HWEmil Tantilov2011-04-133-0/+4
| | | | | | | | Add new device ID supported by ixgbe. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix semaphores in eeprom routines for x540Emil Tantilov2011-04-133-47/+153
| | | | | | | | | | | | | HW can upload EEPROM content from flash while in a middle of checksum calculation. Take NVM ownership for the whole process of checksum update. Call ixgbe_read_eerd_generic() and ixgbe_write_eewr_generic() directly to avoid double take of semaphores which leads to long loading times. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: cleanup short msleep's (<20ms) to use usleep_rangeDon Skidmore2011-04-138-28/+36
| | | | | | | | | Since msleep might not sleep for the desired amount when less than 20ms use usleep_range. Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix 82599 KR downshift coexistence with LESM FW moduleEmil Tantilov2011-04-132-1/+48
| | | | | | | | | | | Disable KR to KX4/KX downshift on 82599 backplane devices when LESM (Link Establishment State Machine) is enabled in FW. Those features cannot co-exist as they both manipulate the same registers. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Acked-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Phillip Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: move disabling of relaxed ordering in start_hw()Emil Tantilov2011-04-133-5/+35
| | | | | | | | | | | Relaxed ordering can lead to issues with some chipsets. This patch makes sure that it is disabled by default and not only when DCA is on. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: refactor common start_hw code for 82599 and x540Emil Tantilov2011-04-134-13/+58
| | | | | | | | | | Factored out the common start_hw code into a new function ixgbe_start_hw_gen2() so that it can be used by x540 and 82599. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Acked-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: update version string for Dell CEM useJeff Kirsher2011-04-131-2/+6
| | | | | | Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Acked-by: Don Skidmore <donald.c.skidmore@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com>
* ixgbe: fix namespacecheck issueEmil Tantilov2011-04-131-1/+1
| | | | | | | | Set ixgbe_identify_82599() as static Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: correct function number for some 82598 partsEmil Tantilov2011-04-132-1/+38
| | | | | | | | | | | | | Some 82598 parts have LAN0 disabled and LAN1 enabled and the LAN ID bits in Device Status register report the NIC as having only LAN1 as enabled. This causes ixgbe_set_lan_id_multi_port_pcie() to set bus->func = 1 which is incorrect. Force bus->func to 0 when LAN0 is disabled in the EEPROM. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix return value checksEmil Tantilov2011-04-131-3/+2
| | | | | | | | The value of status was incorrectly tested. Also whitespace cleanup. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Evan Swanson <evan.swanson@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, further cleanups to app configurationJohn Fastabend2011-04-131-83/+24
| | | | | | | | | | | | | | With the app data on the kernel dcb_app list we no longer need to specifically handle them in ixgbe for the CEE case. So now we can remove app handling logic and check when the hw is configured if the app data matches the hardware configuration in set_hw_all(). If it does not match then we can reconfigure. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* Fix common misspellingsLucas De Marchi2011-03-315-9/+9
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* ixgbe: DCB, PFC not cleared until reset occursJohn Fastabend2011-03-122-51/+47
| | | | | | | | | | | | | | | The PFC configuration is not cleared until the device is reset. This has not been a problem because setting DCB attributes forced a hardware reset. Now that we no longer require this reset to occur PFC remains configured even after being disabled until the device is reset. This removes a goto in the PFC hardware set routines for 82598 and 82599 devices that was short circuiting the clear. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: add support for VF Transmit rate limit using iproute2Lior Levy2011-03-125-2/+93
| | | | | | | | | | | | | | | | | | | | | | | Implemented ixgbe_ndo_set_vf_bw function which is being used by iproute2 tool. In addition, updated ixgbe_ndo_get_vf_config function to show the actual rate limit to the user. The rate limitation can be configured only when the link is up and the link speed is 10Gb. The rate limit value can be 0 or ranged between 11 and actual link speed measured in Mbps. A value of '0' disables the rate limit for this specific VF. iproute2 usage will be 'ip link set ethX vf Y rate Z'. After the command is made, the rate will be changed instantly. To view the current rate limit, use 'ip link show ethX'. The rates will be zeroed only upon driver reload or a link speed change. This feature is being supported by 82599 and X540 devices. Signed-off-by: Lior Levy <lior.levy@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, set minimum bandwidth per traffic classJohn Fastabend2011-03-121-1/+1
| | | | | | | | | | | | DCB provides a guaranteed bandwidth in the case with 0% bandwidth then no bandwidth is guaranteed. However the traffic class should still be able to transmit traffic. For this to work the traffic class must be given the minimum credits required to send a frame. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: update PHY code to support 100Mbps as well as 1G/10GEmil Tantilov2011-03-124-99/+245
| | | | | | | | | This change updates the PHY setup code to support 100Mbps capable PHYs as well as 10G and 1Gbps. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: remove timer reset to 0 on timeoutEmil Tantilov2011-03-121-6/+0
| | | | | | | | | | | | | The VF mailbox polling for acks and messages would reset the timer to zero on a timeout. Under heavy load a timeout may actually occur without being the result of an error and when this occurs it is not practical to perform a full VF driver reset on every message timeout. Instead, just return an error (which is already done) and the VF driver will have an opportunity to retry the operation. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB during ifup use correct CEE or IEEE modeJohn Fastabend2011-03-121-10/+20
| | | | | | | | | | | | | | DCB settings are cleared in the hardware across link events during ifup ixgbe reprograms the hardware for DCB if it is enabled. Now that we have two modes CEE or IEEE we need to use the correct set of configuration data. This patch checks the dcbx_cap bits and then enables the device in the correct mode. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: IEEE 802.1Qaz, implement priority assignment tableJohn Fastabend2011-03-125-19/+36
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to use the priority assignment table in the ieee_ets structure to map priorities to traffic classes. Previously ixgbe only supported a 1:1 mapping. Now we can enable and disable hardware DCB support when multiple traffic classes are actually being used. This allows the default case all priorities mapped to traffic class 0 to work in normal hardware mode and utilize the full packet buffer. This patch does not address putting the hardware in 4TC mode so packet buffer space may be underutilized in this case. A follow up patch can address this optimization. But at least we have the hooks to do this now. Also CEE will behave as it always has and map priorities 1:1 with traffic classes. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, missed translation from 8021Qaz TSA to CEE link strictJohn Fastabend2011-03-122-25/+23
| | | | | | | | | | | | | | | | | | | | | The patch below allowed IEEE 802.1Qaz and CEE DCB hardware configurations to use common hardware set routines, commit 88eb696cc6a7af8f9272266965b1a4dd7d6a931b Author: John Fastabend <john.r.fastabend@intel.com> Date: Thu Feb 10 03:02:11 2011 -0800 ixgbe: DCB, abstract out dcb_config from DCB hardware configuration However the case when CEE link strict and group strict are set was missed and are currently being mapped incorrectly in some configurations. This patch resolves this. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB: enable RSS to be used with DCBJohn Fastabend2011-03-122-9/+25
| | | | | | | | | | | | RSS had previously been disabled when DCB was enabled because DCB was single queued per traffic class. Now that DCB implements multiple Tx/Rx rings per traffic class enable RSS. Here RSS hashes across the queues in the traffic class. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain.@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: enable ndo_tc_setupJohn Fastabend2011-03-121-1/+23
| | | | | | | | | This patch adds the ndo_tc_setup to ixgbe. By default we set the device to use strict priority. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain.@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, use multiple Tx rings per traffic classJohn Fastabend2011-03-123-168/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables multiple {Tx|Rx} rings per traffic class while in DCB mode. In order to get this working as expected the tc_to_tx net device mapping is configured as well as the prio_tc_map. skb priorities are mapped across a range of queue pairs to get a distribution per traffic class. The maximum number of queue pairs used while in DCB mode is capped at 64. The hardware max is actually 128 queues but 64 is sufficient for now and allocating more seemed a bit excessive. It is easy enough to increase the cap later if need be. To get the 802.1Q priority tags inserted correctly ixgbe was previously using the skb queue_mapping field to directly set the 802.1Q priority. This no longer works because we have removed the 1:1 mapping between queues and traffic class. Each ring is aligned with an 802.1Qaz traffic class so here we add an extra field to the ring struct to identify the 802.1Q traffic class. This uses an extra byte of the ixgbe_ring struct fortunately there was a 2byte hole, struct ixgbe_ring { void * desc; /* 0 8 */ struct device * dev; /* 8 8 */ struct net_device * netdev; /* 16 8 */ union { struct ixgbe_tx_buffer * tx_buffer_info; /* 8 */ struct ixgbe_rx_buffer * rx_buffer_info; /* 8 */ }; /* 24 8 */ long unsigned int state; /* 32 8 */ u8 atr_sample_rate; /* 40 1 */ u8 atr_count; /* 41 1 */ u16 count; /* 42 2 */ u16 rx_buf_len; /* 44 2 */ u16 next_to_use; /* 46 2 */ u16 next_to_clean; /* 48 2 */ u8 queue_index; /* 50 1 */ u8 reg_idx; /* 51 1 */ u16 work_limit; /* 52 2 */ /* XXX 2 bytes hole, try to pack */ u8 * tail; /* 56 8 */ /* --- cacheline 1 boundary (64 bytes) --- */ Now we can set the VLAN priority directly and it will be correct. User space can indicate the 802.1Qaz priority using the SO_PRIORITY setsocket() option and QOS layer will steer the skb to the correct rings. Additionally using the multiq qdisc with a queue_mapping action works as well. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB remove ixgbe_fcoe_getapp routineJohn Fastabend2011-03-122-30/+13
| | | | | | | | | | | Remove ixgbe_fcoe_getapp() and use the generic kernel routine instead. Also add application priority to the kernel maintained list on setapp so applications and stacks can query the value. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, implement ieee_setapp dcbnl opsJohn Fastabend2011-03-121-0/+30
| | | | | | | | | | | Implement ieee_setapp dcbnl ops in ixgbe. This is required to setup FCoE which requires dedicated resources. If the app data is not for FCoE then no action is taken in ixgbe except to add it to the dcb_app_list. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: DCB, implement capabilities flagsJohn Fastabend2011-03-123-36/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements dcbnl get and set capabilities ops. The devices supported by ixgbe can be configured to run in IEEE or CEE modes but not both. With the DCBX set capabilities bit we add an explicit signal that must be used to toggle between these modes. This patch adds logic to fail the CEE command set_hw_all() which programs the device with a CEE configuration if the CEE caps bit is not set. Similarly, IEEE set commands will fail if the IEEE caps bit is not set. We allow most CEE config set commands to occur because they do not touch the hardware until set_hw_all() is called. The one exception to the above is the {set|get}app routines. These must always be protected by caps bits to ensure side effects do not corrupt the current configured mode. By requiring the caps bit to be set correctly we can maintain a consistent configuration in the hardware for CEE or IEEE modes and prevent partial hardware configurations that may occur if user space does not send a complete IEEE or CEE configurations. It is expected that user space will signal a DCBX mode before programming device. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix compile failure in ixgbe_init_mbx_params_pfAndy Gospodarek2011-03-081-1/+1
| | | | | | | | | | | | | | | | This commit: commit d7c8a29fc8bd20ba45ec2f52577ed04a988a9500 Author: Emil Tantilov <emil.s.tantilov@intel.com> Date: Thu Mar 3 09:25:02 2011 +0000 ixgbe: improve logic in ixgbe_init_mbx_params_pf incorrectly added a line that accessed mbx->udelay. I'm sure the intent was mbx->usec_delay. This patch fixes the compilation error. Signed-off-by: Andy Gospodarek <andy@greyhouse.net> Signed-off-by: David S. Miller <davem@davemloft.net>
* ixgbe: fix setting and reporting of advertised speedsEmil Tantilov2011-03-071-21/+20
| | | | | | | | | Add the ability to set 100/F on x540. Fix reporting of advertised modes by adding check for phy.autoneg_advertised Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: fix spelling errorsEmil Tantilov2011-03-071-2/+2
| | | | | | Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: improve logic in ixgbe_init_mbx_params_pfEmil Tantilov2011-03-071-15/+12
| | | | | | | | Use if/then instead of an all-inclusive case statement. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: add function descriptionEmil Tantilov2011-03-071-3/+6
| | | | | | | | Add description for ixgbe_init_eeprom_params_X540 and whitespace fix. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: Enable flow control pause parameter auto-negotiation supportEmil Tantilov2011-03-076-199/+281
| | | | | | | | | | This patch enables flow control pause parameters auto-negotiation support to 82599 based 10G Base-T, backplane devices and multi-speed fiber optics modules at 1G speed Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: Add x540 statistic counter definitionsEmil Tantilov2011-03-072-0/+14
| | | | | | | | | Add defines to accumulate and display x540 PHY statistic counters on transmit/receive. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: clear correct counters for flow control on 82599Emil Tantilov2011-03-072-7/+29
| | | | | | | | The 82599 was not correctly having some of it's counters cleared for flow control. This change corrects that. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
* ixgbe: cleanup PHY initEmil Tantilov2011-03-073-59/+114
| | | | | | | | | | This change cleans up several situations in which we were either stepping over possible errors, or calling initialization routines multiple times. Also includes whitespace fixes where applicable. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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