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* [MTD] NAND: Fix breakage all over the placeThomas Gleixner2006-06-202-83/+216
| | | | | | | | | | | | | | | | | | Following problems are addressed: - wrong status caused early break out of nand_wait() - removed the bogus status check in nand_wait() which is a relict of the abandoned support for interrupted erase. - status check moved to the correct place in read_oob - oob support for syndrom based ecc with strange layouts - use given offset in the AUTOOOB based oob operations Partially based on a patch from Vitaly Vool <vwool@ru.mvista.com> Thanks to Savin Zlobec <savin@epico.si> for tracking down the status problem. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [PATCH] NAND: fix remaining OOB length calculationVitaly Wool2006-06-201-2/+2
| | | | | | | | | In nand_read_page_syndrome/nand_write_page_syndrome the calculation of the remaining oob length which is not used by the prepad/ecc/postpad areas is wrong. Signed-off-by: Vitaly Wool <vwool@ru.mvista.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Fixup NDFC merge brokenessThomas Gleixner2006-06-201-9/+4
| | | | | | Remove the remains of a broken merge. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD NAND] S3C2410 driver cleanupBen Dooks2006-06-191-8/+3
| | | | | | | | Fix unused variables and commenting since tglx's new NAND updates Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD NAND] s3c24x0 board: Fix clock handling, ensure proper initialisation.Ben Dooks2006-06-192-5/+81
| | | | | Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD NAND] Fix s3c2410 NAND driver so it at least _looks_ like it compilesDavid Woodhouse2006-06-101-5/+5
| | | | | | | Fix the control bit handling so it even looks like it might work, too. Bad tglx. No biscuit. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] Fix build warnings (and debug build error) in nand_base.cAndrew Morton2006-05-301-4/+4
| | | | | | | | | | | | | | | drivers/mtd/nand/nand_base.c: In function 'nand_transfer_oob': drivers/mtd/nand/nand_base.c:909: warning: comparison of distinct pointer types lacks a cast drivers/mtd/nand/nand_base.c: In function 'nand_do_read_oob': drivers/mtd/nand/nand_base.c:1097: error: 'len' undeclared (first use in this function) drivers/mtd/nand/nand_base.c:1097: error: (Each undeclared identifier is reported only once drivers/mtd/nand/nand_base.c:1097: error: for each function it appears in.) drivers/mtd/nand/nand_base.c: In function 'nand_fill_oob': drivers/mtd/nand/nand_base.c:1411: warning: comparison of distinct pointer types lacks a cast Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] NAND Expose the new raw mode function and status info to userspaceThomas Gleixner2006-05-302-10/+19
| | | | | | | | | | | The raw read/write access to NAND (without ECC) has been changed in the NAND rework. Expose the new way - setting the file mode via ioctl - to userspace. Also allow to read out the ecc statistics information so userspace tools can see that bitflips happened and whether errors where correctable or not. Also expose the number of bad blocks for the partition, so nandwrite can check if the data fits into the parition before writing to it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Signal that a bitflip was corrected by ECCThomas Gleixner2006-05-291-1/+4
| | | | | | | | Return -EUCLEAN on read when a bitflip was detected and corrected, so the clients can react and eventually copy the affected block to a spare one. Make all in kernel users aware of the change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Rework the out of band handling completelyThomas Gleixner2006-05-292-271/+459
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hopefully the last iteration on this! The handling of out of band data on NAND was accompanied by tons of fruitless discussions and halfarsed patches to make it work for a particular problem. Sufficiently annoyed by I all those "I know it better" mails and the resonable amount of discarded "it solves my problem" patches, I finally decided to go for the big rework. After removing the _ecc variants of mtd read/write functions the solution to satisfy the various requirements was to refactor the read/write _oob functions in mtd. The major change is that read/write_oob now takes a pointer to an operation descriptor structure "struct mtd_oob_ops".instead of having a function with at least seven arguments. read/write_oob which should probably renamed to a more descriptive name, can do the following tasks: - read/write out of band data - read/write data content and out of band data - read/write raw data content and out of band data (ecc disabled) struct mtd_oob_ops has a mode field, which determines the oob handling mode. Aside of the MTD_OOB_RAW mode, which is intended to be especially for diagnostic purposes and some internal functions e.g. bad block table creation, the other two modes are for mtd clients: MTD_OOB_PLACE puts/gets the given oob data exactly to/from the place which is described by the ooboffs and ooblen fields of the mtd_oob_ops strcuture. It's up to the caller to make sure that the byte positions are not used by the ECC placement algorithms. MTD_OOB_AUTO puts/gets the given oob data automaticaly to/from the places in the out of band area which are described by the oobfree tuples in the ecclayout data structre which is associated to the devicee. The decision whether data plus oob or oob only handling is done depends on the setting of the datbuf member of the data structure. When datbuf == NULL then the internal read/write_oob functions are selected, otherwise the read/write data routines are invoked. Tested on a few platforms with all variants. Please be aware of possible regressions for your particular device / application scenario Disclaimer: Any whining will be ignored from those who just contributed "hot air blurb" and never sat down to tackle the underlying problem of the mess in the NAND driver grown over time and the big chunk of work to fix up the existing users. The problem was not the holiness of the existing MTD interfaces. The problems was the lack of time to go for the big overhaul. It's easy to add more mess to the existing one, but it takes alot of effort to go for a real solution. Improvements and bugfixes are welcome! Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Replace oobinfo by ecclayoutThomas Gleixner2006-05-296-32/+42
| | | | | | | | | The nand_oobinfo structure is not fitting the newer error correction demands anymore. Replace it by struct nand_ecclayout and fixup the users all over the place. Keep the nand_oobinfo based ioctl for user space compability reasons. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Consolidate oobinfo handlingThomas Gleixner2006-05-291-9/+1
| | | | | | | | | The info structure for out of band data was copied into the mtd structure. Make it a pointer and remove the ability to set it from userspace. The position of ecc bytes is defined by the hardware and should not be changed by software. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Fix platform structure and NDFC driverThomas Gleixner2006-05-291-4/+2
| | | | | | | The platform structure was lacking an oobinfo field. The NDFC driver had some remains from another tree. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] AMD Geode NAND support can depend on X86_32; we won't see it on x86_64David Woodhouse2006-05-291-1/+1
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] NAND Consolidate references and add back default name settingThomas Gleixner2006-05-271-7/+10
| | | | | | | | | | We have a type pointer. Make use of it instead of the error prone nand_ids[i] reference. The NAND driver used to set default name settings from the chip ID string for the device. The feature got lost during the rework. Add it back. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND simplify nand_chip_selectThomas Gleixner2006-05-271-2/+0
| | | | | | | | nCE setting can be done when the first command is issued to the device. We keep the deselect functionality as it makes sense to deassert nCE when the device becomes idle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Fix thinko in nand_write_page_hwecc()David Woodhouse2006-05-261-1/+1
| | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] NAND modularize write functionThomas Gleixner2006-05-266-522/+263
| | | | | | | | Modularize the write function and reorganaize the internal buffer management. Remove obsolete chip options and fixup all affected users. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Remove PCI dependency for Geode CS553[56] NAND controller.David Woodhouse2006-05-262-4/+31
| | | | | | | PCI is faked on these devices by SMM traps. Don't depend on that -- check for the chipset directly instead. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] Fix NAND_VERIFY_WRITE case to build with tglx's recent changesDavid Woodhouse2006-05-251-4/+4
| | | | | | Bad tglx. No biscuit. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] NAND Modularize read functionThomas Gleixner2006-05-253-247/+267
| | | | | | | | Split the core of the read function out and implement seperate handling functions for software and hardware ECC. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Cleanup oob functionsThomas Gleixner2006-05-251-75/+81
| | | | | | | Cleanup the code in the oob related functions and make use of the new NO_READRDY flag. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Introduce NAND_NO_READRDY optionThomas Gleixner2006-05-251-77/+88
| | | | | | | | | | | The nand driver has a superflous read ready / command delay in the read functions. This was added to handle chips which have an automatic read forward. Newer chips do not have this functionality anymore. Add this option to avoid the delay / I/O operation. Mark all large page chips with the new option flag. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND Initialize controller lock and wq only onceThomas Gleixner2006-05-252-4/+9
| | | | | | | | | The lock simplifying patch did not move the lock and waitqueue initialization into the controller allocation patch. This reinitializes waitqueue and spinlocks also for driver supplied controller stuctures. Move it into the allocation path. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND fix cmd_ctrl breakageThomas Gleixner2006-05-241-5/+10
| | | | | | The cmd_ctrl rework lacks some state transition flags. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND coding style and namespace cleanupThomas Gleixner2006-05-241-534/+520
| | | | | | | Cleanup the functions which are not going to change in the next steps. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND LED support cleanupThomas Gleixner2006-05-231-2/+6
| | | | | | | Move the define out of the middle of the code and add an appropriate comment. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] NAND remove write_byte/word function from nand_chipThomas Gleixner2006-05-236-88/+14
| | | | | | | | The previous change of the command / hardware control allows to remove the write_byte/word functions completely, as their only user were nand_command and nand_command_lp. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Refactor NAND hwcontrol to cmd_ctrlThomas Gleixner2006-05-2317-527/+413
| | | | | | | | | | | | The hwcontrol function enforced a step by step state machine for any kind of hardware chip access. Let the hardware driver know which control bits are set and inform it about a change of the control lines. Let the hardware driver write out the command and address bytes directly. This gives a peformance advantage for address bus controlled chips and simplifies the quirks in the hardware drivers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Export nand_write_rawThomas Gleixner2006-05-231-0/+1
| | | | | | | The previous _ecc removal / cleanup broke (i)nftl module usage. Export the missing symbol. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Mark NAND drivers TOTO and PPChameleon brokenThomas Gleixner2006-05-231-2/+2
| | | | | | Both drivers can not be fixed and compiled due to missing header files. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Remove read/write _ecc variantsThomas Gleixner2006-05-232-104/+122
| | | | | | | MTD clients are agnostic of FLASH which needs ECC suppport. Remove the functions and fixup the callers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Remove readv/readv_eccThomas Gleixner2006-05-231-1/+0
| | | | | | | These functions were never implemented and added only bloat to partition and concat code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Remove nand writev supportThomas Gleixner2006-05-231-188/+0
| | | | | | NAND writev(_ecc) support is not longer necessary. Remove it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] ECC rework broke diskonchipThomas Gleixner2006-05-231-1/+1
| | | | | | Fix the diskonchip ecc setup. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* Merge branch 'master' of /home/tglx/work/kernel/git/mtd-2.6/Thomas Gleixner2006-05-236-59/+59
|\ | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * [MTD] Introduce MTD_BIT_WRITEABLEJoern Engel2006-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be cleared. o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for STMicro and Intel Sibley flashes with internal ECC. Those flashes disallow clearing of single bits, unlike regular NOR flashes, so the new flag models their behaviour better. o Remove MTD_ECC. After the STMicro/Sibley merge, this flag is only set and never checked. Signed-off-by: Joern Engel <joern@wh.fh-wedel.de>
| * [MTD] Introduce writesizeJoern Engel2006-05-226-59/+59
| | | | | | | | | | | | | | | | At least two flashes exists that have the concept of a minimum write unit, similar to NAND pages, but no other NAND characteristics. Therefore, rename the minimum write unit to "writesize" for all flashes, including NAND. Signed-off-by: Joern Engel <joern@wh.fh-wedel.de>
* | [MTD] NAND modularize ECCThomas Gleixner2006-05-2315-136/+98
| | | | | | | | | | | | | | | | First step of modularizing ECC support. - Move ECC related functionality into a seperate embedded data structure - Get rid of the hardware dependend constants to simplify new ECC models Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] NAND cleanup nand_scanThomas Gleixner2006-05-231-174/+233
| | | | | | | | | | | | | | | | Seperate functionality out of nand_scan so the code is more readable. No functional change. First step of simplifying the nand driver. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] NAND consolidate data typesThomas Gleixner2006-05-231-53/+53
| | | | | | | | | | | | | | The NAND driver used a mix of unsigned char, u_char amd uint8_t data types. Consolidate to uint8_t usage Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] NAND whitespace and formatting cleanupThomas Gleixner2006-05-231-42/+62
| | | | | | | | Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] Add support for NDFC NAND controllerThomas Gleixner2006-05-233-0/+324
| | | | | | | | | | | | | | NDFC NAND Flash controller is embedded in PPC EP44x SoCs. Add platform driver based support. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] Simplify NAND lockingThomas Gleixner2006-05-231-38/+43
| | | | | | | | | | | | | | | | Replace the chip lock by a the controller lock. For simple drivers a dummy controller structure is created by the scan code. This simplifies the locking algorithm in nand_get/release_chip(). Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | [MTD] Improve software ECC calculationThomas Gleixner2006-05-232-134/+96
|/ | | | | | | | | Unrolling the loops produces denser and much faster code. Add a config switch which allows to select the byte order of the resulting ecc code. The current Linux implementation has a byte swap versus the SmartMedia specification Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* [MTD] Add Amstrad Delta NAND supportJonathan McDowell2006-05-213-0/+245
| | | | | | | | | | The patch below adds support for the NAND device on the Amstrad Delta. This is a 32MiB 8bit Toshiba device, with the data bus connected to the OMAP MPUIO pins and ALE, CLE, NCE, NRE, NWE and NWP all connected to the Delta's latch2 16bit latch. Signed-Off-By: Jonathan McDowell <noodles@earth.li> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* NAND: Fix NAND ECC errors on AMD Au1550Sergei Shtylyov2006-05-161-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | On AMD Au1550 the static bus controller fails to keep -CE asserted during chip ready delay on read commands and the NAND chip being used requires this. So, the current driver allows nand_base.c to drive -CE manually during the entire sector read. When the PCMCIA driver is enabled however, occasionally the ECC errors occur on NAND reads. This happens because the PCMCIA driver polls sockets periodically and reads one of the board's control/status regs (BCSRs) which are on the same static bus as the NAND flash, and just use another chip select (and the NOR flash also resides on that bus), so as the NAND driver forces NAND chip select asserted and the -RE signal is shared, a contention occurs on the static bus when BCSR or NOR flash is read while we're reading from NAND. So, we either can't keep interrupts enabled during the whole NAND sector read (which is hardly acceptable), or have to implement some interlocking scheme between multiple drivers (which is painful, and makes me shudder :-). There's a third way which has proven to work: to force -CE asserted only while we're waiting for a NAND chip to become ready after a read command, disabling interrupts for a maximum of 25 microseconds (according to Toshiba TC58DVM92A1FT00 datasheet -- this chip is mentioned in the board schematics); for Samsung NAND chip which seems to be actually used this delay is even less, 12 us. Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* NAND: AMD Au1550 driver reads write-only registerSergei Shtylyov2006-05-161-4/+2
| | | | | | | | | | | | | | During the last cleanup of the AMD Au1550 NAND driver the old buglet was reintroduced: as the MEM_STNDCTL register is write-only and seem to always read as 0x31, read-modify-write to it done in au1xxx_nand_init() will have the side effect of enabling -RCS0/1 pin override (via bits 4/5 of this reg.), thus possibly causing a contention on the static bus when the NOR flash (using -RCS0) or board control status registers (using -RCS2) are read. Luckily, this goes away with a first NAND access, since au1550_hwcontrol() doesn't try to read this register before writing anymore. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD NAND] Make various initfuncs static, remove #ifdef MODULE from exitfuncsDavid Woodhouse2006-05-167-17/+7
| | | | | | | We all inherited the same error from the original NAND board driver which got copied and changed. Fix them all at once... Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] Add help text for MTD_NAND_CS553X option.David Woodhouse2006-05-161-2/+11
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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