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* [MTD] [NOR] Fix cfi_send_gen_cmd handling of x16 devices in x8 mode (v4)Eric W. Biederman2008-11-052-19/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For "unlock" cycles to 16bit devices in 8bit compatibility mode we need to use the byte addresses 0xaaa and 0x555. These effectively match the word address 0x555 and 0x2aa, except the latter has its low bit set. Most chips don't care about the value of the 'A-1' pin in x8 mode, but some -- like the ST M29W320D -- do. So we need to be careful to set it where appropriate. cfi_send_gen_cmd is only ever passed addresses where the low byte is 0x00, 0x55 or 0xaa. Of those, only addresses ending 0xaa are affected by this patch, by masking in the extra low bit when the device is known to be in compatibility mode. [dwmw2: Do it only when (cmd_ofs & 0xff) == 0xaa] v4: Fix stupid typo in cfi_build_cmd_addr that failed to compile I'm writing this patch way to late at night. v3: Bring all of the work back into cfi_build_cmd_addr including calling of map_bankwidth(map) and cfi_interleave(cfi) So every caller doesn't need to. v2: Only modified the address if we our device_type is larger than our bus width. Cc: stable@kernel.org Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] AT49BV6416 has swapped erase regionsHaavard Skinnemoen2008-10-181-4/+12
| | | | | | | | | | | | | | The CFI information read from AT49BV6416 lists the erase regions in the wrong order, causing problems when trying to erase or update the first or last 64KiB block. Work around this by inverting the "top boot" flag, which will effectively reverse the order of the erase regions. This chip is obsolete, but it's used in some existing designs. Signed-off-by: Håvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] cfi_cmdset_0002.c: Add Macronix CFI V1.0 TopBottom detectionChristopher Moore2008-10-181-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds TopBottom detection for most Macronix chips with CFI V1.0. The main purpose of this patch is to add detection of the MX29LV400C B used on the LaCie Ethernet Disk mini V2 NAS. It detects the following parts correctly:- MX28F640C3B T MX29LV002C B MX29LV002NC B MX29LV004C T MX29LV400C T/B MX29LV800C T/B MX29LV160C T/B MX29SL800C T/B MX29SL802C T/B It detects the following uniform part as bottom but it should work correctly:- MX29LV040C For T parts it causes the erase block table to be reversed correctly. For other parts it avoids the bogus "Assuming top" message. It does not detect the following correctly:- MX28F640C3B B MX29LV002C T MX29LV002NC T MX29LV004C B MX29SL400C T/B MX29SL402C T/B If desired I could supply a more complicated patch to handle these as well. Only the MX29LV400C B has been physically tested; others were checked against their data sheets. Signed-off-by: Christopher Moore <moore@free.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] fix cfi_cmdset_0001 FL_SYNCING race (take 2)Alexander Belyakov2008-09-261-2/+15
| | | | | | | | | | | | The patch fixes CFI issue with multipartitional devices leading to the set of errors or even deadlock. The problem is CFI FL_SYNCING state race with flash operations (e.g. erase suspend). It is reproduced by running intensive writes on one JFFS2 partition and simultaneously performing mount/unmount cycle on another partition of the same chip. Signed-off-by: Alexander Belyakov <abelyako@googlemail.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] Select MTD_CFI_UTIL when MTD_CFI probe routine is enabledDavid Woodhouse2008-09-011-0/+1
| | | | | | | | It requires cfi_qry_mode_on(), which is in cfi_util.c Reported by Russell King Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] Rename and export new cfi_qry_*() functionsDavid Woodhouse2008-08-072-21/+25
| | | | | | | | | | They need to be exported, so let's give them less generic-sounding names while we're at it. Original export patch, along with the suggestion about the nomenclature, from Stephen Rothwell. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] cfi_cmdset_0001: Timeouts for erase, write and unlock operationsAnders Grafström2008-08-061-14/+38
| | | | | | | | | | | | | | | | | | Timeouts are currently given by the typical operation time times 8. It works in the general well-behaved case but not when an erase block is failing. For erase operations, it seems that a failing erase block will keep the device state machine in erasing state until the vendor specified maximum timeout period has passed. By this time the driver would have long since timed out, left erasing state and attempted further operations which all fail. This patch implements timeouts using values from the CFI Query structure when available. The patch also sets a longer timeout for locking operations. The current value used for locking/unlocking given by 1000000/HZ microseconds is too short for devices like J3 and J5 Strataflash which have a typical clear lock-bits time of 0.5 seconds. Signed-off-by: Anders Grafström <grfstrm@users.sourceforge.net> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] Add qry_mode_on()/qry_omde_off() to deal with odd chipsAlexey Korolev2008-08-062-49/+65
| | | | | | | | | | | | | | | | | | | | | | | | | There are some CFI chips which require non standard procedures to get into QRY mode. The possible way to support them would be trying different modes till QRY will be read. This patch introduce two new functions qry_mode_on qry_mode_off. qry_mode_on tries different commands in order switch chip into QRY mode. So if we have one more "odd" chip - we just could add several lines to qry_mode_on. Also using these functions remove unnecessary code duplicaton in porbe procedure. Currently there are two "odd" cases 1. Some old intel chips which require 0xFF before 0x98 2. ST M29DW chip which requires 0x98 to be sent at 0x555 (according to CFI should be 0x55) This patch is partialy based on the patch from Uwe (see "[PATCH 2/4] [RFC][MTD] cfi_probe: remove Intel chip workaround" thread ) Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: Alexander Belyakov <abelyako@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] Add "Spansion" to MTD_CFI_AMDSTD kconfig menu descriptionGeorge G. Davis2008-08-061-1/+1
| | | | | | | | | This long overdue trivial change to the MTD_CFI_AMDSTD kconfig menu description is intended to help clarify that this option also supports Spansion flash devices. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] Use DIV_ROUND_UPJulia Lawall2008-08-022-2/+2
| | | | | | | | The kernel.h macro DIV_ROUND_UP performs the computation (((n) + (d) - 1) / (d)) but is perhaps more readable. Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] dataflash OTP supportDavid Brownell2008-08-011-0/+1
| | | | | | | | | | | | | | | Now that we can tell when we have one of the newer DataFlash chips, optionally expose the 128 bytes of OTP memory they provide. Tested on at45db642 revision B and D chips. Switch mtdchar over to a generic HAVE_MTD_OTP flag instead of adding another #ifdef for each type of chip whose driver has OTP support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Bryan Wu <cooloney@kernel.org> Cc: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] drivers/mtd/chips/jedec_probe.c: fix Am29DL800BB device IDJerry Hicks2008-07-311-1/+1
| | | | | | | | | | | | | | The device id for Am29DL800BB in jedec_probe.c is wrong. Reference: http://www.spansion.com/datasheets/21519c4.pdf I discovered this while working with u-boot. The u-boot folks mentioned Linux as an upstream reference, thought I'd post a heads-up here too. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] jedec_probe: Fix SST 16-bit chip detectionAtsushi Nemoto2008-07-251-4/+10
| | | | | | | | | | | The unlock_addr rework in kernel 2.6.25 breaks 16-bit SST chips. SST 39LF160 and SST 39VF1601 are both 16-bit only chip (do not have BYTE# pin) and new uaddr value is not correct for them. Add MTD_UADDR_0xAAAA_0x5555 for those chips. Tested with SST 39VF1601 chip. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] Fix -ETIMEO errors in CFI driverAlexey Korolev2008-07-251-1/+8
| | | | | | | | | | | | | | | | | | | | | Existing CFI driver has problems with excessive writes during erase. If CFI driver does many writes during one erase cycle we may face the messages with -ETIMEO error on erase operation. It may cause the following data corruption and kernel panics. The reason of the issue is related to specifics of suspend operation: if we write to flash during erase, suspend operation will cost some time to erase procedure (for P30 it could be significant). In current version of cfi driver the problem of many suspends is partially workarounded by adding some time reserv to any operation (8xerase_time) but if we have many writes during one erase the problem appears. This patch detects the suspend and resets timer if suspend occured. It has been well verified on different chips. No problems were found. Could you please include the patch as it is simple and fixes bad issue. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* [MTD] [NOR] gen_probe: No debug message when debugging is disabledJean Delvare2008-07-111-2/+2
| | | | | | | | | Use pr_debug(...) instead of printk(KERN_DEBUG ...) so that the message is only printed when debugging is enabled. Signed-off-by: Jean Delvare <khali@linux-fr.org> Tested-by: John stoffel <john@stoffel.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* MTD/JFFS2: remove CVS keywordsAdrian Bunk2008-06-0411-18/+0
| | | | | | | | | | | | Once upon a time, the MTD repository was using CVS. This patch therefore removes all usages of the no longer updated CVS keywords from the MTD code. This also includes code that printed them to the user. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Add support for Eon EN29SL800B[BT] NOR flash chipsMike Rapoport2008-06-041-0/+35
| | | | | | | | | This patch add support for non-CFI Eon EN29SL800B[BT] NOR flash chips. The Eon chips have manufacturer ID in the first bank, therefore this patch depends on support for flash chips with ID in bank other than 0. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Add support for flash chips with ID in bank other than 0Mike Rapoport2008-06-041-3/+16
| | | | | | | | | | According to JEDEC "Standard Manufacturer's Identification Code" (http://www.jedec.org/download/search/jep106W.pdf) several first banks of NOR flash can contain 0x7f instead of actual ID. This patch adds support for reading manufacturer ID from banks other than 0. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Add support for AMD AM29SL800D[BT] NOR flash chipsMike Rapoport2008-06-041-0/+32
| | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Support for M50FLW080A and M50FLW080BNate Case2008-05-142-0/+36
| | | | | | | | | Add support for M50FLW080A and M50FLW080B revisions of LPC flash devices. Signed-off-by: Aaron Lindner <alindner@xes-inc.com> Signed-off-by: Nate Case <ncase@xes-inc.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Remove cfi_cmdset_0001.c erase suspend fixup typoAlexander Belyakov2008-05-061-1/+1
| | | | | | | | | | | Fix typo in erase suspend while write fixup code leading to compile time error if CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE was defined. drivers/mtd/chips/cfi_cmdset_0001.c: In function 'fixup_intel_strataflash': drivers/mtd/chips/cfi_cmdset_0001.c:212: error: 'struct cfi_pri_amdstd' has no member named 'SuspendCmdSupport' Signed-off-by: Alexander Belyakov <abelyako@googlemail.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD][NOR] Add physical address to point() methodJared Hulbert2008-05-011-6/+8
| | | | | | | | | | | | Adding the ability to get a physical address from point() in addition to virtual address. This physical address is required for XIP of userspace code from flash. Signed-off-by: Jared Hulbert <jaredeh@gmail.com> Reviewed-by: Jörn Engel <joern@logfs.org> Acked-by: Nicolas Pitre <nico@cam.org> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Fix Intel CFI driver for collie flashThomas Kunze2008-04-231-0/+3
| | | | | | | | | | | collie seems to contain LH28F640BF flash chips. According to http://sharp-world.com/products/device/flash/pdf/*FUM00701*@E.pdf (page 83) if they have 0x51 of Extended Query Table (number of hardware partitions) set to zero, they have a single fixed partition. This patch makes those chips work. Signed-off-by: Thomas Kunze <thommycheck@gmx.de> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Fixup for incorrect CFI data in Spansion S29GL064/32N flash chipsTrent Piepho2008-04-221-0/+26
| | | | | | | | | | | | | | | | | | | This is a known erratum confirmed by Spansion. I have an errata document, but I can't find a link to it anywhere on their site to include here. Some of the S29GL064N chips report 64 sectors when they should report 128, and some of S29GL032N chips report 127 sectors when they should report 63. Note that when the chip dies are fixed by Spansion, they will still have the same id. The fix is done in such a way that it won't affect corrected chips. The fixups use the extended id made available by a previous patch. Without that, virtually all newer AMD/Spansion chips will have the same ID (0x227e) and it's not possible to apply the fixup to the correct chips. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Read extended device ID from AMD/Spansion CFI flash chipsTrent Piepho2008-04-221-0/+5
| | | | | | | | | | | | | | | AMD/Spansion use a device id of 0x7e to indicate an extended device is present at offset 0xe and 0xf in the query data. I've verified with Spansion that all their chips (mfr == 0x01) with an id of 0x7e use it to indicate an extended id is present. What's more, there are no chips with a NON-extended id that is the same as a different chip's extended id. In other words, when the extended ID is present, one can replace the normal id with the extended id without losing any information. Which is what I've done. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Add JEDEC support for the SST 36VF3203 flash chipAndrei Dolnikov2008-04-221-0/+13
| | | | | | | | Add support for the SST 36VF3203 flash chip. It is used on Emerson KSI8560 board. Signed-off-by: Andrei Dolnikov <adolnikov@ru.mvista.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] XIP: Use generic xip_iprefetch() instead of asm volatile (...)Paulius Zaleckas2008-04-224-6/+6
| | | | | | | | | Untested, but shouldn't break anything... Makes MTD_XIP arch independent. I guess this is why xip_iprefetch() was made for. Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] cfi_cmdset_0020.c: make a function staticAdrian Bunk2008-04-221-1/+2
| | | | | | | This patch makes the needlessly global cfi_staa_erase_varsize() static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] replace remaining __FUNCTION__ occurrencesHarvey Harrison2008-04-222-12/+12
| | | | | | | | __FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [JEDEC] Fix whitespace noise in chip tableDavid Woodhouse2008-04-221-14/+14
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [JEDEC] add support for the ST M29W400DB flash chipGordon Farquharson2008-04-221-0/+32
| | | | | | | | | | Add support for the ST M29W400DB flash chip. which is used on the GLAN Tank NAS. Signed-off-by: Gordon Farquharson <gordonfarquharson@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* mtd/chips: add missing set_current_state() to cfi_{amdstd,staa}_sync()Dmitry Adamushko2008-04-082-0/+2
| | | | | | | | | | | | | | cfi_amdstd_sync() and cfi_staa_sync() call schedule() without changing task's state appropriately. In case of e.g. chip->state == FL_ERASING, cfi_*_sync() will be busy-looping either redundantly for a fixed interval of time (for SCHED_NORMAL tasks) or possibly endlessly (for RT tasks and UP). Signed-off-by: Dmitry Adamushko <dmitry.adamushko@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mtd: fix broken state in CFI driver caused by FL_SHUTDOWNAlexey Korolev2008-04-041-5/+5
| | | | | | | | | | | | | | | | | | | THe CFI driver in 2.6.24 kernel is broken. Not so intensive read/write operations cause incomplete writes which lead to kernel panics in JFFS2. We investigated the issue - it is caused by bug in FL_SHUTDOWN parsing code. Sometimes chip returns -EIO as if it is in FL_SHUTDOWN state when it should wait in FL_PONT (error in order of conditions). The following patch fixes the bug in state parsing code of CFI. Also I've added comments to notify developers if they want to add new case in future. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Reviewed-by: Joern Engel <joern@logfs.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [MTD] [NOR] fix startup lock when using multiple nor flash chipsRizzo Davide2008-02-071-1/+1
| | | | | | | | | | Taken from http://bugzilla.kernel.org/show_bug.cgi?id=9829 I found and solved the problem, at line 115 of drivers/mtd/chips/gen_probe.c (kernel 2.6.24): mapsize value must be calculated in bytes, not in long. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.gitDavid Woodhouse2008-02-031-2/+5
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| * cache invalidation error for buffered writeMassimo Cirillo2008-01-111-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bug causes corruptions of data read from flash. The original code performs cache invalidation from "adr" to "adr + len" in do_write_buffer(). Since len and adr could be updated in the code before invalidation - it causes improper setting of cache invalidation regions. Signed-off-by: Massimo Cirillo <maxcir@gmail.com> Signed-off-by: Giuseppe D'Eliseo <giuseppedeliseo@gmail.com> Acked-by: Nicolas Pitre <nico@cam.org> Acked-by: Jörn Engel <joern@logfs.org> Signed-off-by: David Woohouse <dwmw2@infradead.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | [MTD] Unlocking all Intel flash that is locked on power up.Justin Treon2008-02-032-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch for unlocking all Intel flash that has instant locking on power up. The patch has been tested on Intel M18, P30 and J3D Strata Flash. 1. The automatic unlocking can be disabled for a particular partition in the map or the command line. a. For the bit mask in the map it should look like: .mask_flags = MTD_POWERUP_LOCK, b. For the command line parsing it should look like: mtdparts=0x80000(bootloader)lk 2. This will only unlock parts with instant individual block locking. Intel parts with legacy unlocking will not be unlocked. Signed-off-by: Justin Treon <justin_treon@yahoo.com> Signed-off-by: Jared Hulbert <jaredeh@gmail.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] jedec probe: drop unnecessary forward declarationsIlpo Järvinen2008-02-031-8/+0
| | | | | | | | | | Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] JEDEC probe: kill some inline bloatIlpo Järvinen2008-02-031-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | $ codiff $OBJ.old $OBJ drivers/mtd/chips/jedec_probe.c: cfi_jedec_setup | -320 jedec_probe_chip | -7073 2 functions changed, 7393 bytes removed, diff: -7393 drivers/mtd/chips/jedec_probe.c: jedec_reset | +1151 1 function changed, 1151 bytes added, diff: +1151 drivers/mtd/chips/jedec_probe.o: 3 functions changed, 1151 bytes added, 7393 bytes removed, diff: -6242 Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@helsinki.fi> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Fix incorrect interface code for x16/x32 chipsBartlomiej Sieka2008-01-102-8/+10
| | | | | | | | | | | | | | | | | | According to "Common Flash Memory Interface Publication 100" dated December 1, 2001, the interface code for x16/x32 chips is 0x0005, and not 0x0004 used so far. Signed-off-by: Bartlomiej Sieka <tur@semihalf.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Attempt to clean up the JEDEC unlock address confusionDavid Woodhouse2007-12-031-61/+24
| | | | | | | | | | | | | | | | | | Use a single unlock address, adjust it for the device type in the knowledge that it'll be adjusted back again. This has the desirable effect of masking out the least significant bit of the address for x16 devices. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Fix overflow check in jedec_probeDavid Woodhouse2007-12-031-1/+1
| | | | | | | | | | | | | | | | | | Having laid the code out so that it's easier to read instead of sticking to the 80-column guideline even when it doesn't make sense, a bug is immediately spotted... we were only checking _one_ of the unlock addresses to see if it runs off the end of the map. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Clean up jedec_probe, remove unlock address arraysDavid Woodhouse2007-12-031-777/+624
| | | | | | | | | | | | | | | | This should have no functional effects -- we've been ignoring all but the first address in the array for a long time, and using it only to indicate which device types are supported. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Prevent erase command invocation on suspended chipAlexander Belyakov2007-11-261-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | while running stress tests we have met cfi_cmdset_0001.c driver issue. Working on multipartitional devices with erase suspend on write feature enabled it is possible to get erase operation invoked on chip with suspended erase. get_chip() looses information about earlier suspended erase and new erase operation gets issued. New erase operations report successful completion, but blocks remain dirty causing, for example, JFFS2 error messages like: ... Newly-erased block contained word 0x20031985 at offset 0x00200000 Newly-erased block contained word 0x20031985 at offset 0x00280000 Newly-erased block contained word 0x20031985 at offset 0x00240000 ... The patch below fixes that issue. Signed-off-by: Alexander Belyakov <alexander.belyakov@intel.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Support Intel P3x flash support with CFI version 1.5Alexey Korolev2007-11-231-1/+1
| | | | | | | | | | Signed-off-by: Alexey Korolev <akorolev@infradead.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] Add support for the SST 39VF1601 flash chipDavid Howells2007-11-091-0/+15
| | | | | | | | | | | | | | Add support for the SST 39VF1601 flash chip. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [MTD] [NOR] More CFI fixups for Atmel chipsHans-Christian Egtvedt2007-10-302-1/+48
|/ | | | | | | | | | | | Convert CFI tables from Atmel cmdset_0001 chips to Intel format and set BufWrite timeouts to 0 for Atmel cmdset_0001 and cmdset_0002 chips. Some chips may indicate support for buffered writes even though they only support dual-word writes. The CFI fixup must run before fixup_use_write_buffers for this to work. Signed-off-by: Håvard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] Fix deadlock in Intel chip driver caused by get_chip recursionAlexey Korolev2007-10-231-69/+77
| | | | | | | | | | This patch solves kernel deadlock issue seen on JFFF2 simultaneous operations. Detailed investigation of the issue showed that the kernel deadlock is caused by tons of recursive get_chip calls. Signed-off-by: Alexey Korolev <akorolev@infradead.org> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] [NOR] fix ctrl-alt-del can't reboot for intel flash bugKevin Hao2007-10-131-3/+6
| | | | | | | | | | | | When we press ctrl-alt-del,kernel_restart_prepare will invoke cfi_intelext_reboot which will set flash to read array mode, but later when device_shutdown is invoked which may put current work queue to sleep and other process may be scheduled to running and programming flash in not FL_READY mode again. So we can't boot up if this flash is used for bootloader. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MTD] fix CFI point method for discontiguous mapsAndy Lowe2007-09-231-4/+11
| | | | | | | | | | | | | | The CFI probe routine is capable of detecting flash banks consisting of identical chips mapped to physically discontiguous addresses. (One common way this can occur is if a flash bank is populated with chips of less capacity than the hardware was designed to support.) The CFI point() routine currently ignores any such gaps. This patch fixes the CFI point() routine so that it truncates any request that would span a gap. Signed-off-by: Andy Lowe <alowe@mvista.com> Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
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