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* coresight: replicator: Add terminate entry for acpi_device_id tablesWei Yongjun2019-06-201-0/+1
| | | | | | | | | | Make sure acpi_device_id tables have terminate entry. Fixes: 115b1aa23307 ("coresight: acpi: Support for platform devices") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: platform: add OF/APCI dependencyArnd Bergmann2019-06-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | When neither CONFIG_OF nor CONFIG_ACPI are set, we get a harmless build warning: drivers/hwtracing/coresight/coresight-platform.c:26:12: error: unused function 'coresight_alloc_conns' [-Werror,-Wunused-function] static int coresight_alloc_conns(struct device *dev, ^ drivers/hwtracing/coresight/coresight-platform.c:46:1: error: unused function 'coresight_find_device_by_fwnode' [-Werror,-Wunused-function] coresight_find_device_by_fwnode(struct fwnode_handle *fwnode) As the code is useless in that configuration anyway, just add a Kconfig dependency that only allows building when at least one of the two is set. This should not hinder compile-testing, as CONFIG_OF can be enabled on any architecture. Fixes: 20961aea982e ("coresight: platform: Use fwnode handle for device search") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Add dummy definition for of_coresight_get_cpu()Suzuki K Poulose2019-06-201-0/+5
| | | | | | | | | | For !CONFIG_OF case, add a dummy definition for the of_coresight_get_cpu(). Reported-by: Mike Leach <mike.leach@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: acpi: Support for platform devicesSuzuki K Poulose2019-06-201-1/+9
| | | | | | | | | | Add support for platform devices which do not appear on the AMBA bus. Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Support for ACPI bindingsSuzuki K Poulose2019-06-201-0/+464
| | | | | | | | | | | | | | Add support for parsing the ACPI platform description for CoreSight. The connections are encoded in a DSD graph property with CoreSight specific variation of the property. The ETMs are listed as the children device of the respective CPU. Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: stm: ACPI support for parsing stimulus baseSuzuki K Poulose2019-06-201-1/+52
| | | | | | | | | | | | | | The stimulus base for STM device must be listed as the second memory resource, followed by the programming base address as described in "Section 2.3 Resources" in ACPI for CoreSightTM 1.0 Platform Design documen (DEN0067). Add support for parsing the information for ACPI. Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Use platform agnostic namesSuzuki K Poulose2019-06-2010-11/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | So far we have reused the name of the "platform" device for the CoreSight device. But this is not very intuitive when we move to ACPI. Also, the ACPI device names have ":" in them (e.g, ARMHC97C:01), which the perf tool doesn't like very much. This patch introduces a generic naming scheme, givin more intuitive names for the devices that appear on the CoreSight bus. The names follow the pattern "prefix" followed by "index" (e.g, etm5). We maintain a list of allocated devices per "prefix" to make sure we don't allocate a new name when it is reprobed (e.g, due to unsatisifed device dependencies). So, we maintain the list of "fwnodes" of the parent devices to allocate a consistent name. All devices except the ETMs get an index allocated in the order of probing. ETMs get an index based on the CPU they are attached to. TMC devices are named using "tmc_etf", "tmc_etb", and "tmc_etr" prefixes depending on the configuration of the device. The replicators and funnels are not classified as dynamic/static anymore. One could easily figure that out by checking the presence of "mgmt" registers under sysfs. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Use fwnode handle instead of device namesSuzuki K Poulose2019-06-203-15/+47
| | | | | | | | | | | | | | | | We rely on the device names to find a CoreSight device on the coresight bus. The device name however is obtained from the platform, which is bound to the real platform/amba device. As we are about to use different naming scheme for the coresight devices, we can't rely on the platform device name to find the corresponding coresight device. Instead we use the platform agnostic "fwnode handle" of the parent device to find the devices. We also reuse the same fwnode as the parent for the Coresight device we create. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: platform: Use fwnode handle for device searchSuzuki K Poulose2019-06-201-7/+9
| | | | | | | | | | We match of_node while searching for a device. Make this more generic in preparation for the ACPI support by using fwnode_handle. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Add support for releasing platform specific dataSuzuki K Poulose2019-06-203-1/+12
| | | | | | | | | | | Add a helper to clean up the platform specific data provided by the firmware. This will be later used for dropping the necessary references when we switch to the fwnode handles for tracking connections. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Rearrange platform data probingSuzuki K Poulose2019-06-209-49/+60
| | | | | | | | | | | | | | | | | | | We are about to introduce methods to clean up the platform data as we switch to tracking the device reference from "name" to "fwnode handles" for device connections. This requires us to drop the fwnode handle references when the data is no longer required - i.e, when the device probe fails or the device gets unregistered. In order to consolidate the invocation of the cleanup, we delay the platform probing to the very last minute, possibly before invoking the coresight_register. Then, we leave the coresight core code to do the clean up. i.e, if the coresight_register fails, it takes care of freeing the data. Otherwise, coresight_unregister will do the necessary operations. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Reuse platform data structure for connection trackingSuzuki K Poulose2019-06-202-25/+25
| | | | | | | | | | | | The platform specific information describes the connections and the ports of a given coresigh device. This information is also recorded in the coresight device as separate fields. Let us reuse the original platform description to streamline the handling of the data. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Cleanup coresight_remove_connsSuzuki K Poulose2019-06-201-2/+13
| | | | | | | | | | | | When a device is unregistered, we remove all connection references to it, by searching the connection records of all devices in the coresight bus, via coresight_remove_conns. We could avoid searching if this device doesn't have an input port (e.g, a source). Also document the purpose of the function. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Remove name from platform descriptionSuzuki K Poulose2019-06-2011-7/+15
| | | | | | | | | | We are about to use a name independent of the parent AMBA device name. As such, there is no need to have it in the platform description. Let us move this to coresight description instead. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Remove cpu field from platform dataSuzuki K Poulose2019-06-203-3/+2
| | | | | | | | | | | CPU field is only used by ETMs and there is a separate API for fetching the same. So, let us use that instead of using the common platform probing helper. Also, remove it from the platform_data. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Make device to CPU mapping genericSuzuki K Poulose2019-06-202-7/+14
| | | | | | | | | | The CoreSight components ETM and CPU-Debug are always associated with CPUs. Replace the of_coresight_get_cpu() with a platform agnostic helper, in preparation to add ACPI support. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Introduce generic platform data helperSuzuki K Poulose2019-06-2010-81/+81
| | | | | | | | | | | So far we have hard coded the DT platform parsing code in every driver. Introduce generic helper to parse the information provided by the firmware in a platform agnostic manner, in preparation for the ACPI support. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Make sure device uses DT for obsolete compatible checkSuzuki K Poulose2019-06-202-2/+4
| | | | | | | | | | As we prepare to add support for ACPI bindings, let us make sure we do the compatible check only if we are sure we are dealing with a DT based system. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: platform: Make memory allocation helper genericSuzuki K Poulose2019-06-201-15/+19
| | | | | | | | | | Rename the of_coresight_alloc_memory() => coresight_alloc_conns() as it is independent of the underlying firmware type. This is in preparation for the ACPI support. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Rename of_coresight to coresight-platformSuzuki K Poulose2019-06-202-3/+3
| | | | | | | | | | | | | Rename the firmware handling file to a more generic name, in preparation for adding ACPI support. Right now we only support DT and we have all the platform handling code in of_coresight.c. Let us rename the file to coresight-platform.c in order to keep the platform handling in a single place for DT and the upcoming ACPI support. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tmc-etr: Rearrange probing default buffer sizeSuzuki K Poulose2019-06-191-9/+12
| | | | | | | | | As we are about to refactor the platform specific handling, make the default buffer size probing generic. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: stm: Rearrange probing the stimulus areaSuzuki K Poulose2019-06-191-4/+19
| | | | | | | | | As we are about to refactor the platform specific handling re-arrange some of the DT specific property handling. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm3x: Rearrange cp14 access detectionSuzuki K Poulose2019-06-191-1/+1
| | | | | | | | | As we are about to refactor the platform specific handling, move the DT property handling to generic helpers. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: Use coresight device names for sinks in PMU attributeMathieu Poirier2019-06-191-4/+4
| | | | | | | | | Move to using the coresight device name instead of the parent device name for SINK attribute for PMU. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etb10: Clean up device specific dataSuzuki K Poulose2019-06-191-16/+16
| | | | | | | | Track the coresight device instead of the real device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etm: Clean up device specific dataSuzuki K Poulose2019-06-195-30/+29
| | | | | | | | Track the coresight device instead of the real device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: stm: Cleanup device specific dataSuzuki K Poulose2019-06-191-11/+10
| | | | | | | | | | Keep track of the STM coresight device which is a child device of the AMBA device. Since we can get to the coresight_device from the "device" instance, remove the explicit field. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tpiu: Clean up device specific dataSuzuki K Poulose2019-06-191-5/+2
| | | | | | | | | Switch to using the coresight device instead of the parent amba device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: catu: Cleanup device specific dataSuzuki K Poulose2019-06-192-7/+7
| | | | | | | | | Switch to using the CoreSight device instead of the real amba device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tmc: Clean up device specific dataSuzuki K Poulose2019-06-195-47/+47
| | | | | | | | | | | | | | | | In preparation to use a consistent device naming scheme, clean up the device link tracking in replicator driver. Use the "coresight" device instead of the "real" parent device for all internal purposes. All other requests (e.g, power management, DMA operations) must use the "real" device which is the parent device. Since the CATU driver also uses the TMC-SG infrastructure, update the callers to ensure they pass the appropriate device argument for the tables. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: replicator: Cleanup device trackingSuzuki K Poulose2019-06-191-5/+2
| | | | | | | | | | | | In preparation to use a consistent device naming scheme, clean up the device link tracking in replicator driver. Use the "coresight" device instead of the "real" parent device for all internal purposes. All other requests (e.g, power management, DMA operations) must use the "real" device which is the parent device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: funnel: Clean up device book keepingSuzuki K Poulose2019-06-191-7/+4
| | | | | | | | | | | | In preparation to use a consistent device naming scheme, clean up the device link tracking in funnel driver. Use the "coresight" device instead of the "real" parent device for all internal purposes. All other requests (e.g, power management, DMA operations) must use the "real" device which is the parent device. Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: perf: Don't set the truncated flag in snapshot modeMathieu Poirier2019-06-193-3/+21
| | | | | | | | | | | | | | This patch avoids setting the truncated flag when operating in snapshot mode since the trace buffer is expected to be truncated and discontinuous from one snapshot to another. Moreover when the truncated flag is set the perf core stops enabling the event, waiting for user space to consume the data. In snapshot mode this is clearly not what we want since it results in stale data. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tmc-etf: Fix snapshot mode update functionMathieu Poirier2019-06-191-2/+4
| | | | | | | | | | | | | | When working in snapshot mode function perf_aux_output_begin() does not set the handle->size because the size is expected to be deduced by the placement of the "head" and "old" pointers in user space. As such there is no point in trying to adjust the amount of data to copy to the ring buffer. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tmc-etf: Properly set AUX buffer head in snapshot modeMathieu Poirier2019-06-191-5/+9
| | | | | | | | | | | Unify amongst sink drivers how the AUX ring buffer head is communicated to user space. That way the same algorithm in user space can be used to determine where the latest data is and how much of it to access. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: tmc-etr: Properly set AUX buffer head in snapshot modeMathieu Poirier2019-06-191-6/+5
| | | | | | | | | | | Unify amongst sink drivers how the AUX ring buffer head is communicated to user space. That way the same algorithm in user space can be used to determine where the latest data is and how much of it to access. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* coresight: etb10: Properly set AUX buffer head in snapshot modeMathieu Poirier2019-06-191-6/+7
| | | | | | | | | | | Unify amongst sink drivers how the AUX ring buffer head is communicated to user space. That way the same algorithm in user space can be used to determine where the latest data is and how much of it to access. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-214-0/+4
| | | | | | | | | | | | | | Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'char-misc-5.2-rc1-part2' of ↵Linus Torvalds2019-05-0724-616/+1459
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc update part 2 from Greg KH: "Here is the "real" big set of char/misc driver patches for 5.2-rc1 Loads of different driver subsystem stuff in here, all over the places: - thunderbolt driver updates - habanalabs driver updates - nvmem driver updates - extcon driver updates - intel_th driver updates - mei driver updates - coresight driver updates - soundwire driver cleanups and updates - fastrpc driver updates - other minor driver updates - chardev minor fixups Feels like this tree is getting to be a dumping ground of "small driver subsystems" these days. Which is fine with me, if it makes things easier for those subsystem maintainers. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.2-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (255 commits) intel_th: msu: Add current window tracking intel_th: msu: Add a sysfs attribute to trigger window switch intel_th: msu: Correct the block wrap detection intel_th: Add switch triggering support intel_th: gth: Factor out trace start/stop intel_th: msu: Factor out pipeline draining intel_th: msu: Switch over to scatterlist intel_th: msu: Replace open-coded list_{first,last,next}_entry variants intel_th: Only report useful IRQs to subdevices intel_th: msu: Start handling IRQs intel_th: pci: Use MSI interrupt signalling intel_th: Communicate IRQ via resource intel_th: Add "rtit" source device intel_th: Skip subdevices if their MMIO is missing intel_th: Rework resource passing between glue layers and core intel_th: SPDX-ify the documentation intel_th: msu: Fix single mode with IOMMU coresight: funnel: Support static funnel dt-bindings: arm: coresight: Unify funnel DT binding coresight: replicator: Add new device id for static replicator ...
| * intel_th: msu: Add current window trackingAlexander Shishkin2019-05-031-30/+49
| | | | | | | | | | | | | | | | | | | | | | Now that we have a way to switch between MSC buffer windows, add code to track the current window. The hardware register NWSA that contains the address of the next window is unfortunately not always usable, and since the driver has full control of the window switching, there is no reason not to keep this on the software side. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Add a sysfs attribute to trigger window switchAlexander Shishkin2019-05-031-0/+28
| | | | | | | | | | | | | | | | Now that we have the means to trigger a window switch for the MSU trace store, add a sysfs file to allow triggering it from userspace. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Correct the block wrap detectionAlexander Shishkin2019-05-031-1/+1
| | | | | | | | | | | | | | | | In multi window mode the MSU will set "window wrap" bit to indicate block wrapping as well. Take this into account when checking data blocks. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: Add switch triggering supportAlexander Shishkin2019-05-034-2/+85
| | | | | | | | | | | | | | | | | | | | Add support for asserting window switch trigger when tracing to MSU output ports. This allows for software controlled switching between windows of the MSU buffer, which can be used for double buffering while exporting the trace data further from the MSU. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: gth: Factor out trace start/stopAlexander Shishkin2019-05-031-29/+64
| | | | | | | | | | | | | | | | | | | | | | | | The trace enable/disable functions of the GTH include the code that starts and stops trace flom from the sources. This start/stop functionality will also be used in the window switch trigger sequence. Factor out start/stop code from the larger trace enable/disable code in preparation for the window switch sequence. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Factor out pipeline drainingAlexander Shishkin2019-05-033-10/+29
| | | | | | | | | | | | | | | | | | | | The code that waits for the pipeline empty condition of the MSU is currently called in the path that disables the trace. We will also need this in the window switch trigger sequence. Therefore, factor out this code and make it accessible to the GTH device. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Switch over to scatterlistAlexander Shishkin2019-05-031-59/+104
| | | | | | | | | | | | | | | | | | | | | | Instead of using a home-grown array of pointers to the DMA pages, switch over to scatterlist data types and accessors, which has all the convenient accessors, can be used to batch-map DMA memory and is convenient for passing around between different layers, which will be useful when MSU buffer management has to cross the boundaries of the MSU driver. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Replace open-coded list_{first,last,next}_entry variantsAlexander Shishkin2019-05-031-10/+10
| | | | | | | | | | | | | | | | | | | | There are a few places in the code where open-coded versions of list entry accessors list_first_entry()/list_last_entry()/list_next_entry() are used. Replace those with the standard macros. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: Only report useful IRQs to subdevicesAlexander Shishkin2019-05-033-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The only type of IRQ triggering event that is useful to us at the moment is the "last block" interrupt of the MSU. This interrupt can only be enabled via "MINTCTL" register that doesn't exist in earlier version of the Intel TH. Enumerate the presence of MINTCTL via per-device driver data structure and only instantiate the IRQ resource for subdevices if this capability is present. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: msu: Start handling IRQsAlexander Shishkin2019-05-034-2/+106
| | | | | | | | | | | | | | | | | | | | | | We intend to use the interrupt to detect Last Block condition in the MSU driver, which we can use for double-buffering software-managed data transfers. Add an interrupt handler to the MSU driver. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * intel_th: pci: Use MSI interrupt signallingAlexander Shishkin2019-05-032-6/+13
| | | | | | | | | | | | | | | | | | | | | | Since Intel TH is capable of MSI interrupt signalling, make use of it. The way it works is, each of the 7 interrupt triggering events has its own vector in this mode, as opposed to interrupt line delivery, where all events are signalled via the same line. Failing to enable MSI, the driver falls back to using an interrupt line. Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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