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* Revert "drm: tegra: protect DC register access with mutex"Dave Airlie2012-12-302-14/+0
| | | | | | | | | This reverts commit 83c0bcb694be31dcd6c04bdd935b96a95a0af548. Lucas pointed out this was a mistake, and I missed the discussion, so just revert it out to save a rebase. Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: program only one window during modesetLucas Stach2012-12-301-2/+1
| | | | | | | | The intention is to program exactly WIN_A, not WIN_A and possibly others. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: clean out old gem prototypesLucas Stach2012-12-301-18/+0
| | | | | | | | There is no gem.c anymore, those functions are implemented by the drm_cma_helpers now. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: remove redundant tegra2_tmds_config entryLucas Stach2012-12-301-16/+3
| | | | | | | | | | The 720p and 1080p entries are completely redundant, as we are matching the table entries against <=pclk. Also generalize the comment, as we are using those table entries even when driving other modes than the standard TV ones. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: protect DC register access with mutexLucas Stach2012-12-302-0/+14
| | | | | | | | | | | Window properties are programmed through a shared aperture and have to happen atomically. Also we do the read-update-write dance on some of the shared regs. To make sure that different functions don't stumble over each other protect the register access with a mutex. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: don't leave clients host1x member uninitializedLucas Stach2012-12-301-0/+2
| | | | | | | | No real problem for now, as nothing is using this, but leaving it unitialized is asking for trouble later on. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: tegra: fix front_porch <-> back_porch mixupLucas Stach2012-12-302-7/+7
| | | | | | | | | | Fixes wrong picture offset observed when using HDMI output with a Technisat HD TV. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Mark Zhang <markz@nvidia.com> Tested-by: Mark Zhang <markz@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge branch 'drm-intel-fixes' of ↵Dave Airlie2012-12-3012-84/+325
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-next Some fixes for 3.8: - Watermark fixups from Chris Wilson (4 pieces). - 2 snb workarounds, seem to be recently added to our internal DB. - workaround for the infamous i830/i845 hang, seems now finally solid! Based on Chris' fix for SNA, now also for UXA/mesa&old SNA. - Some more fixlets for shrinker-pulls-the-rug issues (Chris&me). - Fix dma-buf flags when exporting (you). - Disable the VGA plane if it's enabled on lid open - similar fix in spirit to the one I've sent you last weeek, BIOS' really like to mess with the display when closing the lid (awesome debug work from Krzysztof Mazur). * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915: disable shrinker lock stealing for create_mmap_offset drm/i915: optionally disable shrinker lock stealing drm/i915: fix flags in dma buf exporting i915: ensure that VGA plane is disabled drm/i915: Preallocate the drm_mm_node prior to manipulating the GTT drm_mm manager drm: Export routines for inserting preallocated nodes into the mm manager drm/i915: don't disable disconnected outputs drm/i915: Implement workaround for broken CS tlb on i830/845 drm/i915: Implement WaSetupGtModeTdRowDispatch drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabled drm/i915: Prefer CRTC 'active' rather than 'enabled' during WM computations drm/i915: Clear self-refresh watermarks when disabled drm/i915: Double the cursor self-refresh latency on Valleyview drm/i915: Fixup cursor latency used for IVB lp3 watermarks
| * drm/i915: disable shrinker lock stealing for create_mmap_offsetDaniel Vetter2012-12-201-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmap offset structure is not part of the drm/i915 code, but provided by gem helpers. To avoid leaky abstractions (by either depending upon implementation details of said helper wrt to preallocations, or reimplementing it in our code and so fuzzing around in internal details of that helpr) simply disable the shrinker lock stealing accross calls into the helper functions. This should fix igt/gem_tiled_swapping. v2: Fix cleanup path confusion bemoaned by Chris Wilson. Reported-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: optionally disable shrinker lock stealingDaniel Vetter2012-12-202-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 5774506f157a91400c587b85d1ce4de56f0d32f6 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Nov 21 13:04:04 2012 +0000 drm/i915: Borrow our struct_mutex for the direct reclaim added a nice trick to steal the struct_mutex lock in the shrinker if it's the current task holding it. But this also caused the requirement that every place which allocates memory needs to be careful about the gem state of objects, since the shrinker could have pulled the rug out from under it. We've usually solved this by carefully preallocating things or ensure that buffers are pinned already. But the shrinker also reaps mmap offset, so allocating those needs to be careful, too. Now that code has been factored out into some common helpers, so either we have fragile code depending upon the common helper not doing something we don't want it to do. Or we need to reimplement the mmap offset creation and so also leak implementation details into our code. Since this all results in leaky abstraction, cop out by disabling the lock borrowing trick while calling down into the helpers. That way our craziness is nicely confined to files in drm/i915. v2: Split out the change to create_mmap_offset as request by Chris Wilson. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: fix flags in dma buf exportingDave Airlie2012-12-201-1/+1
| | | | | | | | | | | | | | | | | | As pointed out by Seung-Woo Kim this should have been passing flags like nouveau/radeon have. Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * i915: ensure that VGA plane is disabledKrzysztof Mazur2012-12-191-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Some broken systems (like HP nc6120) in some cases, usually after LID close/open, enable VGA plane, making display unusable (black screen on LVDS, some strange mode on VGA output). We used to disable VGA plane only once at startup. Now we also check, if VGA plane is still disabled while changing mode, and fix that if something changed it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57434 Signed-off-by: Krzysztof Mazur <krzysiek@podlesie.net> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Preallocate the drm_mm_node prior to manipulating the GTT drm_mm ↵Chris Wilson2012-12-181-37/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | manager As we may reap neighbouring objects in order to free up pages for allocations, we need to be careful not to allocate in the middle of the drm_mm manager. To accomplish this, we can simply allocate the drm_mm_node up front and then use the combined search & insert drm_mm routines, reducing our code footprint in the process. Fixes (partially) i-g-t/gem_tiled_swapping Reported-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jani Nikula <jani.nikula@intel.com> [danvet: Again fixup atomic bikeshed.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm: Export routines for inserting preallocated nodes into the mm managerChris Wilson2012-12-181-12/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Required by i915 in order to avoid the allocation in the middle of manipulating the drm_mm lists. Use a pair of stubs to preserve the existing EXPORT_SYMBOLs for backporting; to be removed later. Cc: Dave Airlie <airlied@redhat.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jani Nikula <jani.nikula@intel.com> [danvet: bikeshedded-away the atomic parameter, it's not yet used anywhere.] Acked-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: don't disable disconnected outputsDaniel Vetter2012-12-181-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This piece of neat lore has been ported painstakingly and bug-for-bug compatible from the old crtc helper code. Imo it's utter nonsense. If you disconnected a cable and before you reconnect it, userspace (or the kernel) does an set_crtc call, this will result in that connector getting disabled. Which will result in a nice black screen when plugging in the cable again. There's absolutely no reason the kernel does such policy enforcements - if userspace tries to set up a mode on something disconnected we might fail loudly (since the dp link training fails), but silently adjusting the output configuration behind userspace's back is a recipe for disaster. Specifically I think that this could explain some of our MI_WAIT hangs around suspend, where userspace issues a scanline wait on a disable pipe. This mechanisims here could explain how that pipe got disabled without userspace noticing. Note that this fixes a NULL deref at BIOS takeover when the firmware sets up a disconnected output in a clone configuration with a connected output on the 2nd pipe: When doing the full modeset we don't have a mode for the 2nd pipe and OOPS. On the first pipe this doesn't matter, since at boot-up the fbdev helpers will set up the choosen configuration on that on first. Since this is now the umptenth bug around handling this imo brain-dead semantics correctly, I think it's time to kill it and see whether there's any userspace out there which relies on this. It also nicely demonstrates that we have a tiny window where DP hotplug can still kill the driver. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58396 Cc: stable@vger.kernel.org Tested-by: Peter Ujfalusi <peter.ujfalusi@gmail.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Implement workaround for broken CS tlb on i830/845Daniel Vetter2012-12-176-8/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that Chris Wilson demonstrated that the key for stability on early gen 2 is to simple _never_ exchange the physical backing storage of batch buffers I've tried a stab at a kernel solution. Doesn't look too nefarious imho, now that I don't try to be too clever for my own good any more. v2: After discussing the various techniques, we've decided to always blit batches on the suspect devices, but allow userspace to opt out of the kernel workaround assume full responsibility for providing coherent batches. The principal reason is that avoiding the blit does improve performance in a few key microbenchmarks and also in cairo-trace replays. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: - Drop the hunk which uses HAS_BROKEN_CS_TLB to implement the ring wrap w/a. Suggested by Chris Wilson. - Also add the ACTHD check from Chris Wilson for the error state dumping, so that we still catch batches when userspace opts out of the w/a.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Implement WaSetupGtModeTdRowDispatchDaniel Vetter2012-12-173-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | I'm not really sure, since the w/a entry is as thin on details as ever, and Bspec doesn't say anything about it. But I've figured only dispatching to rows 0&1 instead of all four should be the right thing for GT1. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> [danvet: Add the missing snb server GT1 to the check, spotted by Chris Wilson.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabledDaniel Vetter2012-12-172-0/+5
| | | | | | | | | | | | | | | | | | Quoting from Bspec, 3D_CHICKEN1, bit 10 This bit needs to be set always to "1", Project: DevSNB " Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Prefer CRTC 'active' rather than 'enabled' during WM computationsChris Wilson2012-12-171-7/+7
| | | | | | | | | | | | | | | | | | Only the intel_crtc->active is accurate at the point where we wish to perform WM computations, so use it instead of crtc->enabled. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Clear self-refresh watermarks when disabledChris Wilson2012-12-171-6/+8
| | | | | | | | | | | | | | | | | | | | | | If we elect to disable self-refresh as they require too many FIFO entries, clear the values prior to writing them into the registers. If they are too large they may occupy more bits than available and so corrupt neighbouring WM values. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Double the cursor self-refresh latency on ValleyviewChris Wilson2012-12-171-1/+7
| | | | | | | | | | | | | | | | | | | | | | It operates at twice the declared latency, so double the latency value used for the cursor watermark calculation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50248 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> CC: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * drm/i915: Fixup cursor latency used for IVB lp3 watermarksChris Wilson2012-12-171-5/+112
| | | | | | | | | | | | | | | | | | | | | | It operates at twice the declared latency, so adjust the computation to avoid potential flicker at low power. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50248 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> CC: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | Merge branch 'drm-fixes-3.8' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2012-12-307-24/+122
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Misc fixes for reset and new packets for userspace usage. * 'drm-fixes-3.8' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: add WAIT_UNTIL to evergreen VM safe reg list drm/radeon: add support for MEM_WRITE packet drm/radeon: restore modeset late in GPU reset path drm/radeon: avoid deadlock in pm path when waiting for fence drm/radeon: don't leave fence blocked process on failed GPU reset
| * | drm/radeon: add WAIT_UNTIL to evergreen VM safe reg listAlex Deucher2012-12-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's used in a recent mesa commit: http://cgit.freedesktop.org/mesa/mesa/commit/?id=24b1206ab2dcd506aaac3ef656aebc8bc20cd27a and there may be some other cases in the future where it's required. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Cc: stable@vger.kernel.org
| * | drm/radeon: add support for MEM_WRITE packetJerome Glisse2012-12-193-1/+60
| | | | | | | | | | | | | | | | | | | | | | | | To make it easier to debug some lockup from userspace add support to MEM_WRITE packet. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/radeon: restore modeset late in GPU reset pathJerome Glisse2012-12-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modeset path seems to conflict sometimes with the memory management leading to kernel deadlock. This move modesetting reset after GPU acceleration reset. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: avoid deadlock in pm path when waiting for fenceJerome Glisse2012-12-194-22/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | radeon_fence_wait_empty_locked should not trigger GPU reset as no place where it's call from would benefit from such thing and it actually lead to a kernel deadlock in case the reset is triggered from pm codepath. Instead force ring completion in place where it makes sense or return early in others. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * | drm/radeon: don't leave fence blocked process on failed GPU resetJerome Glisse2012-12-193-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Force all fence to signal if GPU reset failed so no process get stuck on waiting fence. Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | | drm/nve0/graph: fix fuc, and enable acceleration on all known chipsetsBen Skeggs2012-12-235-86/+108
| | | | | | | | | | | | | | | | | | Also adds GK106 to chipsets known by ucode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nvc0/graph: fix fuc, and enable acceleration on GF119Ben Skeggs2012-12-233-83/+85
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau/bios: cache ramcfg strap on later chipsetsBen Skeggs2012-12-232-1/+18
| | | | | | | | | | | | | | | | | | This fixes suspend/resume on at least Quadro 400. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau/mxm: silence output if no bios dataBen Skeggs2012-12-231-1/+1
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau/bios: parse/display extra version componentBen Skeggs2012-12-232-2/+4
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau/bios: implement opcode 0xa9Ben Skeggs2012-12-235-8/+53
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau/bios: update gpio parsing apis to match current designBen Skeggs2012-12-235-61/+90
| | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | drm/nouveau: initial support for GK106Ben Skeggs2012-12-233-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modesetting seems to work alright, as does graphics (using binary driver fuc from nve7...). Lots to be done no doubt, but this'll get an image on the screen for people. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-12-191-1/+1
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | Pull drm bugfix from Dave Airlie: "Just a single urgent regression fix, seeing a few wierd behaviours I'd like not to persist." * 'drm-next' of git://people.freedesktop.org/~airlied/linux: drm/ttm: fix delayed ttm_bo_cleanup_refs_and_unlock delayed handling
| * | drm/ttm: fix delayed ttm_bo_cleanup_refs_and_unlock delayed handlingMaarten Lankhorst2012-12-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix regression introduced by 85b144f860176 "drm/ttm: call ttm_bo_cleanup_refs with reservation and lru lock held, v3" Slowpath ttm_bo_cleanup_refs_and_unlock accidentally tried to increase refcount on &bo->sync_obj instead of bo->sync_obj. The compiler didn't complain since sync_obj_ref takes a void pointer, so it was still valid c. This could result in lockups, memory corruptions, and warnings like these when graphics card VRAM usage is high: ------------[ cut here ]------------ WARNING: at include/linux/kref.h:42 radeon_fence_ref+0x2c/0x40() Hardware name: System Product Name Pid: 157, comm: X Not tainted 3.7.0-rc7-00520-g85b144f-dirty #174 Call Trace: [<ffffffff81058c84>] ? warn_slowpath_common+0x74/0xb0 [<ffffffff8129273c>] ? radeon_fence_ref+0x2c/0x40 [<ffffffff8125e95c>] ? ttm_bo_cleanup_refs_and_unlock+0x18c/0x2d0 [<ffffffff8125f17c>] ? ttm_mem_evict_first+0x1dc/0x2a0 [<ffffffff81264452>] ? ttm_bo_man_get_node+0x62/0xb0 [<ffffffff8125f4ce>] ? ttm_bo_mem_space+0x28e/0x340 [<ffffffff8125fb0c>] ? ttm_bo_move_buffer+0xfc/0x170 [<ffffffff810de172>] ? kmem_cache_alloc+0xb2/0xc0 [<ffffffff8125fc15>] ? ttm_bo_validate+0x95/0x110 [<ffffffff8125ff7c>] ? ttm_bo_init+0x2ec/0x3b0 [<ffffffff8129419a>] ? radeon_bo_create+0x18a/0x200 [<ffffffff81293e80>] ? radeon_bo_clear_va+0x40/0x40 [<ffffffff812a5342>] ? radeon_gem_object_create+0x92/0x160 [<ffffffff812a575c>] ? radeon_gem_create_ioctl+0x6c/0x150 [<ffffffff812a529f>] ? radeon_gem_object_free+0x2f/0x40 [<ffffffff81246b60>] ? drm_ioctl+0x420/0x4f0 [<ffffffff812a56f0>] ? radeon_gem_pwrite_ioctl+0x20/0x20 [<ffffffff810f53a4>] ? do_vfs_ioctl+0x2e4/0x4e0 [<ffffffff810e5588>] ? vfs_read+0x118/0x160 [<ffffffff810f55ec>] ? sys_ioctl+0x4c/0xa0 [<ffffffff810e5851>] ? sys_read+0x51/0xa0 [<ffffffff814b0612>] ? system_call_fastpath+0x16/0x1b Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Reported-by: Markus Trippelsdorf <markus@trippelsdorf.de> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2012-12-17337-14372/+38205
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull DRM updates from Dave Airlie: "This is the one and only next pull for 3.8, we had a regression we found last week, so I was waiting for that to resolve itself, and I ended up with some Intel fixes on top as well. Highlights: - new driver: nvidia tegra 20/30/hdmi support - radeon: add support for previously unused DMA engines, more HDMI regs, eviction speeds ups and fixes - i915: HSW support enable, agp removal on GEN6, seqno wrapping - exynos: IPP subsystem support (image post proc), HDMI - nouveau: display class reworking, nv20->40 z compression - ttm: start of locking fixes, rcu usage for lookups, - core: documentation updates, docbook integration, monotonic clock usage, move from connector to object properties" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (590 commits) drm/exynos: add gsc ipp driver drm/exynos: add rotator ipp driver drm/exynos: add fimc ipp driver drm/exynos: add iommu support for ipp drm/exynos: add ipp subsystem drm/exynos: support device tree for fimd radeon: fix regression with eviction since evict caching changes drm/radeon: add more pedantic checks in the CP DMA checker drm/radeon: bump version for CS ioctl support for async DMA drm/radeon: enable the async DMA rings in the CS ioctl drm/radeon: add VM CS parser support for async DMA on cayman/TN/SI drm/radeon/kms: add evergreen/cayman CS parser for async DMA (v2) drm/radeon/kms: add 6xx/7xx CS parser for async DMA (v2) drm/radeon: fix htile buffer size computation for command stream checker drm/radeon: fix fence locking in the pageflip callback drm/radeon: make indirect register access concurrency-safe drm/radeon: add W|RREG32_IDX for MM_INDEX|DATA based mmio accesss drm/exynos: support extended screen coordinate of fimd drm/exynos: fix x, y coordinates for right bottom pixel drm/exynos: fix fb offset calculation for plane ...
| * | Merge branch 'drm-intel-fixes' of ↵Dave Airlie2012-12-1623-280/+590
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-next Daniel writes: A few leftover fixes for 3.8: - VIC support for hdmi infoframes with the associated drm helper, fixes some black TVs (Paulo Zanoni) - Modeset state check (and fixup if the BIOS messed with the hw) for lid-open. modeset-rework fallout. Somehow the original reporter went awol, so this stalled for way too long until we've found a new victim^Wreporter with broken BIOS. - seqno wrap fixes from Mika and Chris. - Some minor fixes all over from various people. - Another race fix in the pageflip vs. unpin code from Chris. - hsw vga resume support and a few more fdi link fixes (only used for vga on hsw) from Paulo. - Regression fix for DMAR from Zhenyu Wang - I've scavenged memory from my DMAR for a while and it broke right away :( - Regression fix from Takashi Iwai for ivb lvds - some w/a needs to be (partially) moved back into place. Note that these are regressions in -next. - One more fix for ivb 3 pipe support - it now actually seems to work. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (25 commits) drm/i915: Fix missed needs_dmar setting drm/i915: Fix shifted screen on top of LVDS on IVY laptop drm/i915: disable cpt phase pointer fdi rx workaround drm/i915: set the LPT FDI RX polarity reversal bit when needed drm/i915: add lpt_init_pch_refclk drm/i915: add support for mPHY destination on intel_sbi_{read, write} drm/i915: reject modes the LPT FDI receiver can't handle drm/i915: fix hsw_fdi_link_train "retry" code drm/i915: Close race between processing unpin task and queueing the flip drm/i915: fixup l3 parity sysfs access check drm/i915: Clear the existing watermarks for g4x when modifying the cursor sr drm/i915: do not access BLC_PWM_CTL2 on pre-gen4 hardware drm/i915: Don't allow ring tail to reach the same cacheline as head drm/i915: Decouple the object from the unbound list before freeing pages drm/i915: Set sync_seqno properly after seqno wrap drm/i915: Include the last semaphore sync point in the error-state drm/i915: Rearrange code to only have a single method for waiting upon the ring drm/i915: Simplify flushing activity on the ring drm/i915: Preallocate next seqno before touching the ring drm/i915: force restore on lid open ...
| | * drm/i915: Fix missed needs_dmar settingZhenyu Wang2012-12-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Ben's AGP dependence removal change, "needs_dmar" flag has not been properly setup for new chips using new GTT init function. This one adds missed setting of that flag to make sure we do pci mappings with IOMMU enabled. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Fix shifted screen on top of LVDS on IVY laptopTakashi Iwai2012-12-111-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit [23670b322: drm/i915: CPT+ pch transcoder workaround] caused a regression on some HP laptops with IvyBridge. The whole laptop screen is shifted downward for a few pixels constantly. The problem appears only on LVDS while DP and VGA seem unaffected. Also, the problem disappears once when go and back from S3. (S4 resume still shows the same problem.) This patch revives the minimum part the commit above dropped. For fixing this regression, only the setup of CHICKEN2 bit in cpt_init_clock_gating() is needed. Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: disable cpt phase pointer fdi rx workaroundDaniel Vetter2012-12-101-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We've originally added this in commit 291427f5fdadec6e4be2924172e83588880e1539 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Fri Jul 29 12:42:37 2011 -0700 drm/i915: apply phase pointer override on SNB+ too and then copy-pasted it over to ivb/ppt. The w/a was originally added for ilk/ibx in commit 5b2adf897146edeac6a1e438fb67b5a53dbbdf34 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Thu Oct 7 16:01:15 2010 -0700 drm/i915: add Ironlake clock gating workaround for FDI link training and fixed up a bit in commit 6f06ce184c765fd8d50669a8d12fdd566c920859 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Tue Jan 4 15:09:38 2011 -0800 drm/i915: set phase sync pointer override enable before setting phase sync pointer It turns out that this w/a isn't actually required on cpt/ppt and positively harmful on ivb/ppt when using fdi B/C links - it results in a black screen occasionally, with seemingfully everything working as it should. The only failure indication I've found in the hw is that eventually (but not right after the modeset completes) a pipe underrun is signalled. Big thanks to Arthur Runyan for all the ideas for registers to check and changes to test, otherwise I couldn't ever have tracked this down! Cc: "Runyan, Arthur J" <arthur.j.runyan@intel.com> Cc: stable@vger.kernel.org Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: set the LPT FDI RX polarity reversal bit when neededPaulo Zanoni2012-12-104-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we fail to set the bit when needed we get some nice FDI link training failures (AKA "black screen on VGA output"). While we don't really know how to properly choose whether we need to set the bit or not (VBT?), just read the initial value set by the BIOS and store it for later usage. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: add lpt_init_pch_refclkPaulo Zanoni2012-12-104-10/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need this code to init the PCH SSC refclk and the FDI registers. The BIOS does this too and that's why VGA worked before this patch, until you tried to suspend the machine... This patch implements the "Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI/IO" from our documentation. v2: - Squash Damien Lespiau's reset spelling fix on top. - Add a comment that we don't need to bother about the ULT special case Damien noticed, since ULT won't have VGA. - Add a comment to rip out the SDV codepaths once haswell ships for real. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1) Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: add support for mPHY destination on intel_sbi_{read, write}Paulo Zanoni2012-12-103-34/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way we should be able to write mPHY registers using the Sideband Interface in the next commit. Also fixed some syntax oddities in the related code. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: reject modes the LPT FDI receiver can't handlePaulo Zanoni2012-12-083-9/+20
| | | | | | | | | | | | | | | | | | | | | | | | More specifically, the LPT FDI RX only supports 8bpc and a maximum of 2 lanes, so anything above that won't work and should be rejected. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: fix hsw_fdi_link_train "retry" codePaulo Zanoni2012-12-081-16/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were previously doing exactly what the "mode set sequence for CRT" document mandates, but whenever we failed to train the link in the first tentative, all the other subsequent retries always failed. In one of my monitors that has 47 modes, I was usually getting around 3 failures when running "testdisplay -a". After this patch, even if we fail in the first tentative, we can succeed in the next ones. So now when running "testdisplay -a" I see around 3 times the message "FDI link training done on step 1" and no failures. Notice that now the "retry" code looks a lot like the DP retry code. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: Close race between processing unpin task and queueing the flipChris Wilson2012-12-064-11/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before queuing the flip but crucially after attaching the unpin-work to the crtc, we continue to setup the unpin-work. However, should the hardware fire early, we see the connected unpin-work and queue the task. The task then promptly runs and unpins the fb before we finish taking the required references or even pinning it... Havoc. To close the race, we use the flip-pending atomic to indicate when the flip is finally setup and enqueued. So during the flip-done processing, we can check more accurately whether the flip was expected. v2: Add the appropriate mb() to ensure that the writes to the page-flip worker are complete prior to marking it active and emitting the MI_FLIP. On the read side, the mb should be enforced by the spinlocks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org [danvet: Review the barriers a bit, we need a write barrier both before and after updating ->pending. Similarly we need a read barrier in the interrupt handler both before and after reading ->pending. With well-ordered irqs only one barrier in each place should be required, but since this patch explicitly sets out to combat spurious interrupts with is staged activation of the unpin work we need to go full-bore on the barriers, too. Discussed with Chris Wilson on irc and changes acked by him.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| | * drm/i915: fixup l3 parity sysfs access checkDaniel Vetter2012-12-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When l3 parity support for Haswell was enabled in commit f27b92651d72e863c308ea5dca5615fc98e38ca6 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Tue Jul 24 20:47:32 2012 -0700 drm/i915: Expand DPF support to Haswell no one noticed that the patch which introduced this macro commit e1ef7cc299839e68dae3f1843f62e52acda04538 Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Tue Jul 24 20:47:31 2012 -0700 drm/i915: Macro to determine DPF support missed one spot. Fix this. Cc: Ben Widawsky <benjamin.widawsky@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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