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These are now specified directly in the MC subdev.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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v2: remove unneeded pci check
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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v2: rename functions
v3: remove pcie2 accessors
v6: fix alignement and line width, also remove useless code
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
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v5: don't set kepler func pointers
v6: fix alignment and line length
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v5: don't set fermi or kepler func pointers
v6: fix alignment
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v2: rename and group functions
v4: change copyright information
move printing of pcie speeds into oneinit,
rename all pcie functions to nvkm_pcie_*
don't try to raise the pcie version when no higher one is supported
v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version
v6: remove some useless pci_is_pcie checks and rework messages
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
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v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
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v2: change email used in header
v4: change Copyright information
v5: revert Copyright changes
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
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If the hardware supports extended tag field (8-bit ones), then enable it.
This is usually done by the VBIOS, but not on some MBPs (see fdo#86537).
In case extended tag field is not supported, 5-bit tag field is used which
limits the possible number of requests to 32. Apparently bits 7:0 of
0x08841c stores some number of outstanding requests, so cap it to 32 if
extended tag is unsupported.
Fixes: fdo#86537
v2: Restrict changes to chipsets >= 0x84
v3:
* Add nvkm_pci_mask to pci.h
* Mask bit 8 before setting it
v4:
* Rename `add` argument of nvkm_pci_mask to `value`
* Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset
checks
v5:
* Rebase code on latest PCI structure
* Restore PCIe check
* Fix namings in nvkm_pci_mask
* Rephrase part of the commit message
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Was not able to obtain a trace of NVRM due to kernel version annoyances,
however, experimentally confirmed that the WAR we use on NV50/G8x boards
works here too.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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An upcoming patch will implement functionality that we don't use on any
NV40 chipset.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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An upcoming patch will implement functionality that we don't use on the
original NV50.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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SiS 761 chipset does not support AGP cards but has AGP capability (for
the onboard video). At least PC Chips A31G board using this chipset has
an AGP-like AGPro slot that's wired to the PCI bus. Enabling AGP will
fail (GPU lockup and software fbcon, X11 hangs).
Add support for matching just the host bridge in nvkm_device_agp_quirks
and add entry for SiS 761 with mode 0 (AGP disabled).
Signed-off-by: Ondrej Zary <linux@rainbow-software.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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This commit reinstates the pre-DEVINIT AGP fiddling that was broken in
an earlier commit.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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