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path: root/drivers/gpu/drm/nouveau/nvkm/subdev/pci
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* drm/nouveau/core: remove pmc_enable argument from subdev ctorBen Skeggs2016-05-201-1/+1
| | | | | | These are now specified directly in the MC subdev. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci: fix check in nvkm_pcie_set_linkKarol Herbst2016-01-141-1/+1
| | | | | | | v2: remove unneeded pci check Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/nouveau/pci: implement pcie speed change for kepler+Karol Herbst2016-01-111-0/+189
| | | | | | | | v2: rename functions v3: remove pcie2 accessors v6: fix alignement and line width, also remove useless code Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: implement pcie speed change for FermiKarol Herbst2016-01-113-0/+74
| | | | | v5: don't set kepler func pointers v6: fix alignment and line length
* drm/nouveau/pci: implement pcie speed change for teslaKarol Herbst2016-01-113-0/+120
| | | | | v5: don't set fermi or kepler func pointers v6: fix alignment
* drm/nouveau/pci: implement generic code for pcie speed changeKarol Herbst2016-01-114-0/+196
| | | | | | | | | | | | v2: rename and group functions v4: change copyright information move printing of pcie speeds into oneinit, rename all pcie functions to nvkm_pcie_* don't try to raise the pcie version when no higher one is supported v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version v6: remove some useless pci_is_pcie checks and rework messages Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: add gk104 variantKarol Herbst2016-01-112-0/+40
| | | | | | | | v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: add gf106 variantKarol Herbst2016-01-112-0/+40
| | | | | | | | v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: Handle 5-bit and 8-bit tag fieldPierre Moreau2015-11-035-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the hardware supports extended tag field (8-bit ones), then enable it. This is usually done by the VBIOS, but not on some MBPs (see fdo#86537). In case extended tag field is not supported, 5-bit tag field is used which limits the possible number of requests to 32. Apparently bits 7:0 of 0x08841c stores some number of outstanding requests, so cap it to 32 if extended tag is unsupported. Fixes: fdo#86537 v2: Restrict changes to chipsets >= 0x84 v3: * Add nvkm_pci_mask to pci.h * Mask bit 8 before setting it v4: * Rename `add` argument of nvkm_pci_mask to `value` * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset checks v5: * Rebase code on latest PCI structure * Restore PCIe check * Fix namings in nvkm_pci_mask * Rephrase part of the commit message Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci: prepare for chipset-specific initialisation tasksBen Skeggs2015-11-032-0/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci/nv46: attempt to fix msi, and re-enable by defaultBen Skeggs2015-11-034-9/+9
| | | | | | | | Was not able to obtain a trace of NVRM due to kernel version annoyances, however, experimentally confirmed that the WAR we use on NV50/G8x boards works here too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci/g94: split implementation from nv40Ben Skeggs2015-11-034-1/+41
| | | | | | | An upcoming patch will implement functionality that we don't use on any NV40 chipset. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci/g84: split implementation from nv50Ben Skeggs2015-11-034-2/+45
| | | | | | | An upcoming patch will implement functionality that we don't use on the original NV50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/nouveau: Disable AGP for SiS 761Ondrej Zary2015-10-121-2/+6
| | | | | | | | | | | | | SiS 761 chipset does not support AGP cards but has AGP capability (for the onboard video). At least PC Chips A31G board using this chipset has an AGP-like AGPro slot that's wired to the PCI bus. Enabling AGP will fail (GPU lockup and software fbcon, X11 hangs). Add support for matching just the host bridge in nvkm_device_agp_quirks and add entry for SiS 761 with mode 0 (AGP disabled). Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci: merge agp handling from nouveau drmBen Skeggs2015-08-284-0/+216
| | | | | | | This commit reinstates the pre-DEVINIT AGP fiddling that was broken in an earlier commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: move device irq handling to platform-specific codeBen Skeggs2015-08-281-3/+77
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci: new subdevBen Skeggs2015-08-288-0/+362
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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