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path: root/drivers/gpu/drm/nouveau/Makefile
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* drm/gm107/gr: initial supportBen Skeggs2014-03-261-0/+2
| | | | | | | Our ucode only partially works at this point, so requiring binary fw image for now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: parsing of some random table needed to bring up grBen Skeggs2014-03-261-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gf104/gr: rename gf104 (nvc4), it came before gf106 (nvc3)Ben Skeggs2014-03-261-2/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gm100/device: recognise GM107Ben Skeggs2014-03-261-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gm107/disp: initial implementationBen Skeggs2014-03-261-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gm107/ltcg: initial implementationBen Skeggs2014-03-261-1/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gm107/fb: initial implementationBen Skeggs2014-03-261-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gk20a/timer: initial implementationBen Skeggs2014-03-261-0/+1
| | | | | | A bit different from NVIDIA's RFC patch, but I want this now for GM107. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/gm107/devinit: initial implementationBen Skeggs2014-03-261-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv4c/mc: nv4x igp's have a different msi rearm registerIlia Mirkin2014-02-181-0/+1
| | | | | | | | | See https://bugs.freedesktop.org/show_bug.cgi?id=74492 Reported-by: Ronald <ronald645@gmail.com> Suggested-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbiosIlia Mirkin2014-01-231-0/+3
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: make common code to handle ramcfg strap etcBen Skeggs2014-01-231-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv108/gr: initial support (need external fuc)Ben Skeggs2014-01-231-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv108/fifo: initial supportBen Skeggs2014-01-231-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk: Add support for NVAA/NVACRoy Spliet2013-12-031-0/+1
| | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs2013-11-081-0/+4
| | | | | | Not even remotely ready for the vast majority of the world. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: implement a simple sysfs interface to new pm codeBen Skeggs2013-11-081-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/device: initial control object class, with pstate control methodsBen Skeggs2013-11-081-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs2013-11-081-0/+4
| | | | | | User control of this has been hard-coded as disabled for now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt: implement voltage control in coreBen Skeggs2013-11-081-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: parsing for various tables required for power managementBen Skeggs2013-11-081-0/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs2013-11-081-0/+9
| | | | | | Internal use only at this point. Userspace later. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bus: add interfaces/helpers for sequencerBen Skeggs2013-11-081-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pwr: initial implementationBen Skeggs2013-11-081-0/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERMBen Skeggs2013-11-081-3/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-nvaf/fb: split fbram oclass in preparation for reclockingBen Skeggs2013-11-081-0/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-nvaf/fb: split the class definitions up a bitBen Skeggs2013-11-081-0/+4
| | | | | | These will diverge further in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs2013-11-081-0/+1
| | | | | | | | | This is what NVIDIA do on these chipsets, let's hope it works around the reported MSI failures for us on NV86. v2: updated to include G92, as per information provided by NVIDIA. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs2013-11-081-0/+2
| | | | | | | v2. updated to cover GF104, as per information provided by NVIDIA. Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv44/mpeg: create a copy of the nv31/nv40 implsIlia Mirkin2013-11-081-0/+1
| | | | | | | | | The nv31/nv40 impls are actually fairly nv44-specific, since they assume the presence of the instance register/context switching. Create a copy before nv31/nv40 get fixed. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvd7/gr: initial supportMaarten Lankhorst2013-07-051-0/+2
| | | | | Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvc0-/gr: make register lists from initvals functionsBen Skeggs2013-07-051-2/+12
| | | | | | Generated context verified to be the same for all supported chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: xtensa engine base class implementationIlia Mirkin2013-07-011-0/+1
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/vdec: fork vp3 implementations from vp2Ilia Mirkin2013-07-011-0/+2
| | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: move falcon class to engine/Ben Skeggs2013-07-011-1/+1
| | | | | | | | Not really "core" per-se. About to merge Ilia's work adding another similar class for the VP2 xtensa engines, so, seems like a good time to move all these to engine/. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs2013-07-011-0/+11
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/devinit: move simple pll setting routines to devinitBen Skeggs2013-07-011-0/+2
| | | | | | | | | These are pretty much useless for reclocking purposes. Lets make it clearer what they're for and move them to DEVINIT to signify they're for the very simple PLL setting requirements of running the init tables. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nvf0/disp: expose display class 2.2Ben Skeggs2013-05-021-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/device: convert to engine, rather than subdevBen Skeggs2013-04-261-9/+9
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: handle irq-related setup ourselvesBen Skeggs2013-04-261-1/+1
| | | | | | | | We need to be able to process interrupts before the DRM code is able to actually enable them, set it up ourselves. Also, it's less convoluted to *not* use the DRM wrappers it appears... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04/disp: hide all the cruft away in its own little holeBen Skeggs2013-04-261-3/+1
| | | | | | | | | | | | | | | It'd be pretty awesome if someone would care enough to port this all properly to a class interface, perhaps submitting a command stream to the core via a sw object on PFIFO (emulating how EVO works basically, and also what nvidia have done forever..).. But, this seems unlikely given how old this hardware is now, so, lets just hide it away. There's a heap of other bits and pieces laying around that are still tangled. I'll (re)move them in pieces. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/therm: split the nv50 and nv84 codeMartin Peres2013-04-261-0/+1
| | | | | | | | This is needed because temperature management on nv50 can be enabled and it looks about the same as nv40. Signed-off-by: Martin Peres <martin.peres@labri.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: restore debugfs/vbios.rom supportMarcin Slusarz2013-02-201-0/+1
| | | | Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
* nouveau: ACPI support depends on X86 and X86_PLATFORM_DEVICESBen Hutchings2013-02-201-0/+2
| | | | | | | | | | | | | If I build nouveau on ia64, Kconfig warns: warning: (DRM_NOUVEAU) selects ACPI_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI) warning: (DRM_NOUVEAU) selects MXM_WMI which has unmet direct dependencies (X86 && X86_PLATFORM_DEVICES && ACPI_WMI) Make all the ACPI support depend on X86 and select X86_PLATFORM_DEVICES. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c: add support for ddc/aux, and dp link training on anx9805Ben Skeggs2013-02-201-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/disp: initial work towards supporting external encodersBen Skeggs2013-02-201-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv50-/disp: move DP link training to core and train from supervisorBen Skeggs2013-02-201-0/+1
| | | | | | | | | | | | | | | We need to be able to do link training for PIOR-connected ANX9805 from the third supervisor handler (due to script ordering in the bios, can't have the "user" call train because some settings are overwritten from the modesetting bios scripts). This moves link training for SOR-connected DP encoders to the second supervisor interrupt, *before* we call the modesetting scripts (yes, different ordering from PIOR is necessary). This is useful since we should now be able to remove some hacks to workaround races between the supervisor and link training paths. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c: create proper chipset-specific class implementationsBen Skeggs2013-02-201-0/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/i2c: aux channels not necessarily on nvioBen Skeggs2013-02-201-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv17/fence: split from nv10 codeBen Skeggs2013-02-201-1/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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