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* Merge branch 'for-linus' of ↵Linus Torvalds2010-04-1719-849/+871
|\ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Ignore LVDS EDID when it is unavailabe or invalid drm/i915: Add no_lvds entry for the Clientron U800 drm/i915: Rename many remaining uses of "output" to encoder or connector. drm/i915: Rename intel_output to intel_encoder. agp/intel: intel_845_driver is an agp driver! drm/i915: introduce to_intel_bo helper drm/i915: Disable FBC on 915GM and 945GM.
| * drm/i915: Ignore LVDS EDID when it is unavailabe or invalidZhao Yakui2010-04-092-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This trys to shut up complains about invalid LVDS EDID during mode probe, but uses fixed panel mode directly for panels with broken EDID. https://bugs.freedesktop.org/show_bug.cgi?id=23099 https://bugs.freedesktop.org/show_bug.cgi?id=26395 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Add no_lvds entry for the Clientron U800Stefan Bader2010-04-021-0/+8
| | | | | | | | | | | | | | | | | | | | | | BugLink: http://bugs.launchpad.net/ubuntu/bugs/544671 This system claims to have a LVDS but has not. Signed-off-by: Stephane Graber <stgraber@ubuntu.com> Signed-off-by: Stefan Bader <stefan.bader@canonical.com> CC: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Rename many remaining uses of "output" to encoder or connector.Eric Anholt2010-03-252-98/+103
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Rename intel_output to intel_encoder.Eric Anholt2010-03-2511-663/+663
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The intel_output naming is inherited from the UMS code, which had a structure of screen -> CRTC -> output. The DRM code has an additional notion of encoder/connector, so the structure is screen -> CRTC -> encoder -> connector. This is a useful structure for SDVO encoders which can support multiple connectors (each of which requires different programming in the one encoder and could be connected to different CRTCs), or for DVI-I, where multiple encoders feed into the connector for whether it's used for digital or analog. Most of our code is encoder-related, so transition it to talking about encoders before we start trying to distinguish connectors. This patch is produced by sed s/intel_output/intel_encoder/ over the driver. Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: introduce to_intel_bo helperDaniel Vetter2010-03-2510-94/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a purely cosmetic change to make changes in this area easier. And hey, it's not only clearer and typechecked, but actually shorter, too! [anholt: To clarify, this is a change to let us later make drm_i915_gem_object subclass drm_gem_object, instead of having drm_gem_object have a pointer to i915's private data] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Disable FBC on 915GM and 945GM.Robert Hooker2010-03-252-3/+3
| | | | | | | | | | | | | | | | | | | | It is causing hangs after a suspend/resume cycle with the default powersave=1 module option on these chipsets since 2.6.32-rc. BugLink: http://bugs.launchpad.net/bugs/492392 Signed-off-by: Robert Hooker <sarvatt@ubuntu.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-3014-1/+13
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* drm/i915: Stop trying to use ACPI lid status to determine LVDS connection.Eric Anholt2010-03-231-51/+1
| | | | | | | | | | | I've been getting more and more quirk reports about this. It seems clear at this point that other OSes are not using this for determining whether the integrated panel should be turned on, and it is not reliable for doing so. Better to light up an unintended panel than to not light up the only usable output on the system. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/intel: fix up set_tiling for untiled->tiled transitionDaniel Vetter2010-03-181-2/+5
| | | | | | | | | | | | | | | | | | | | | | Bug introduced in commit 10ae9bd25acf394c8fa2f9d795dfa9cec4d19ed6 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Mon Feb 1 13:59:17 2010 +0100 drm/i915: blow away userspace mappings before fence change The problem is that when there's no fence reg assigned and the object is mapped at a fenceable offset in the gtt, the userspace mappings won't be torn down. Which happens on untiled->tiled transition quite often on 4th gen and later because there fencing does not have any special alignment constraints (as opposed to 2nd and 3rd gen on which I've tested the original commit). Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=26993 Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Eric Anholt <eric@anholt.net> (fixes OpenArena) Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Set up the documented clock gating on Sandybridge and Ironlake.Eric Anholt2010-03-182-0/+22
| | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: fix small leak on overlay error pathDan Carpenter2010-03-171-4/+9
| | | | | | | | | We should free "params" before returning. Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Daniel Vetter <daniel@ffwll.ch> Cc: stable@kernel.org (for .33) Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Avoid NULL deref in get_pages() unwind after error.Chris Wilson2010-03-171-9/+12
| | | | | | | | | | | | | | | | | | | | | | Fixes: http://bugzilla.kernel.org/show_bug.cgi?id=15527 NULL pointer dereference in i915_gem_object_save_bit_17_swizzle BUG: unable to handle kernel NULL pointer dereference at (null) IP: [<f82b5d2b>] i915_gem_object_save_bit_17_swizzle+0x5b/0xc0 [i915] Call Trace: [<f82aea55>] ? i915_gem_object_put_pages+0x125/0x150 [i915] [<f82aeb71>] ? i915_gem_object_get_pages+0xf1/0x110 [i915] [<f82b0de8>] ? i915_gem_object_bind_to_gtt+0xb8/0x2a0 [i915] [<c02db74d>] ? drm_mm_get_block_generic+0x4d/0x180 [<f82b11cd>] ? i915_gem_mmap_gtt_ioctl+0x16d/0x240 [i915] [<f82ae786>] ? i915_gem_madvise_ioctl+0x86/0x120 [i915] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reported-by: maciej.rutecki@gmail.com Cc: stable@kernel.org Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Fix check with IS_GEN6Zhenyu Wang2010-03-172-4/+4
| | | | | | | | | IS_GEN6 missed to include SandyBridge mobile chip, which failed in i915_probe_agp() for memory config detection. Fix it with a device info flag. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drivers/gpu/drm/i915/intel_bios.c: fix continuation line formatsJoe Perches2010-03-171-2/+3
| | | | | | | | | | | | | String constants that are continued on subsequent lines with \ will cause spurious whitespace in the resulting output. Signed-off-by: Joe Perches <joe@perches.com> Cc: Dave Airlie <airlied@linux.ie> Cc: Eric Anholt <eric@anholt.net> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> [anholt: whacked it to wrap to 80 columns instead] Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Enable VS timer dispatch.Eric Anholt2010-03-172-0/+9
| | | | | | | | | | | This could resolve HW deadlocks where a unit downstream of the VS is waiting for more input, the VS has one vertex queued up but not dispatched because it hopes to get one more vertex for 2x4 dispatch, and software isn't handing more vertices down because it's waiting for rendering to complete. The B-Spec says you should always have this bit set. Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Rename FBC_C3_IDLE to FBC_CTL_C3_IDLE to match other registersPriit Laes2010-03-172-2/+2
| | | | | Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: remove an unnecessary wait_request()Owain G. Ainsworth2010-03-171-5/+0
| | | | | | | | The continue just after this call with loop around and wait for the request just added just fine. This leads to slightly more compact code. Signed-Off-by: Owain G. Ainsworth <oga@openbsd.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Don't bother with the BKL for GEM ioctls.Eric Anholt2010-03-171-23/+23
| | | | | | | | We probably don't need it for most of the other driver ioctls as well, but we explicitly did locking when doing the GEM pieces. On CPU-bound graphics tasks, the BKL was showing up as 1-2% of CPU time. Signed-off-by: Eric Anholt <eric@anholt.net>
* Merge branch 'gpu-switcher' of /ssd/git//linux-2.6 into drm-next-stageDave Airlie2010-03-014-2/+41
|\ | | | | | | | | | | | | | | | | | | | | * 'gpu-switcher' of /ssd/git//linux-2.6: vga_switcheroo: initial implementation (v15) fb: for framebuffer handover don't exit the loop early. Conflicts: drivers/gpu/drm/i915/i915_dma.c drivers/gpu/drm/radeon/Makefile drivers/gpu/drm/radeon/radeon.h
| * vga_switcheroo: initial implementation (v15)Dave Airlie2010-03-014-2/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many new laptops now come with 2 gpus, one to be used for low power modes and one for gaming/on-ac applications. These GPUs are typically wired to the laptop panel and VGA ports via a multiplexer unit which is controlled via ACPI methods. 4 combinations of systems typically exist - with 2 ACPI methods. Intel/ATI - Lenovo W500/T500 - use ATPX ACPI method ATI/ATI - some ASUS - use ATPX ACPI Method Intel/Nvidia - - use _DSM ACPI method Nvidia/Nvidia - - use _DSM ACPI method. TODO: This patch adds support for the ATPX method and initial bits for the _DSM methods that need to written by someone with access to the hardware. Add a proper non-debugfs interface - need to get some proper testing first. v2: add power up/down support for both devices on W500 puts i915/radeon into D3 and cuts power to radeon. v3: redo probing methods, no DMI list, drm devices call to register with switcheroo, it tries to find an ATPX method on any device and once there is two devices + ATPX it inits the switcher. v4: ATPX msg handling using buffers - should work on more machines v5: rearchitect after more mjg59 discussion - move ATPX handling to radeon driver. v6: add file headers + initial nouveau bits (to be filled out). v7: merge delayed switcher code. v8: avoid suspend/resume of gpu that is off v9: rearchitect - mjg59 is always right. - move all ATPX code to radeon, should allow simpler DSM also proper ATRM handling v10: add ATRM support for radeon BIOS, add mutex to lock vgasr_priv v11: fix bug in resuming Intel for 2nd time. v12: start fixing up nvidia code blindly. v13: blindly guess at finishing nvidia code v14: remove radeon audio hacks - fix up intel resume more like upstream v15: clean up printks + remove unnecessary igd/dis pointers mount debugfs /sys/kernel/debug/vgaswitcheroo/switch - should exist if ATPX detected + 2 cards. DIS - immediate change to discrete IGD - immediate change to IGD DDIS - delayed change to discrete DIGD - delayed change to IGD ON - turn on not in use OFF - turn off not in use Tested on W500 (Intel/ATI) and T500 (Intel/ATI) Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/i915: Use a dmi quirk to skip a broken SDVO TV output.Zhao Yakui2010-02-261-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | This IBM system has a multi-function SDVO card that reports both VGA and TV, but the system has no TV connector. The TV connector always reported as connected, which would lead to poor modesetting choices. https://bugs.freedesktop.org/show_bug.cgi?id=25787 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Tested-by: Vance <liangghv@sg.ibm.com> Cc: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: enable/disable LVDS port at DPMS timeJesse Barnes2010-02-261-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It would be good to disable the LVDS port when we shut down the panel to save power. We haven't done so until now because we had trouble getting the right LVDS parameters from the BIOS. I think we're past that now, so enabling and disabling the port should be safe, though it would probably be made cleaner with some additional changes to the display code, where we also bang on the LVDS reg to set the pairing correctly etc. Seems to save a bit of power (up to 300mW in my basic wattsup meter testing). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: check for multiple write domains in pin_and_relocateDaniel Vetter2010-02-261-0/+10
| | | | | | | | | | | | | | | | | | The assumption that an object has only ever one write domain is deeply threaded into gem (it's even encoded the the singular of the variable name). Don't let userspace screw us over. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: clean-up i915_gem_flush_gpu_write_domainDaniel Vetter2010-02-261-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have an exact gpu write domain tracking, we don't need to move objects to the active list ourself. i915_add_request will take care of that under all circumstances. Idea stolen from a patch by Chris Wilson <chris@chris-wilson.co.uk>. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: reuse i915_gpu_idle helperDaniel Vetter2010-02-261-31/+25
| | | | | | | | | | | | | | | | We have it, so use it. This required moving the function to avoid a forward declaration. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: ensure lru ordering of fence_listDaniel Vetter2010-02-261-23/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fence_list should be lru ordered for otherwise we might try to steal a fence reg from an active object even though there are fences from inactive objects available. lru ordering was obeyed for gpu access everywhere save when moving dirty objects from flushing_list to active_list. Fixing this cause the code to indent way to much, so I've extracted the flushing_list processing logic into its on function. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: extract fence stealing codeDaniel Vetter2010-02-261-47/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spaghetti logic in there tripped up my brain's code parser for a few secs. Prevent this from happening again by extracting the fence stealing code into a seperate functions. IMHO this slightly clears up the code flow. v2: Beautified according to ickle's comments. v3: ickle forgot to flush his comment queue ... Now there's also a we-are-paranoid BUG_ON in there. v4: I've forgotten to switch on my brain when doing v3. Now the BUG_ON actually checks something useful. v5: Clean up a stale comment as noted by Eric Anholt. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: fixup active list locking in object_unbindDaniel Vetter2010-02-261-0/+3
| | | | | | | | | | | | | | All other accesses take this spinlock, so do this here, too. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: reuse i915_gem_object_put_fence_reg for fence stealing codeDaniel Vetter2010-02-261-26/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has a few functional changes against the old code: * a few more unnecessary loads and stores to the drm_i915_fence_reg objects. Also an unnecessary store to the hw fence register. * zaps any userspace mappings before doing other flushes. Only changes anything when userspace does racy stuff against itself. * also flush GTT domain. This is a noop, but still try to keep the bookkeeping correct. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add dependency on the intel agp moduleZhenyu Wang2010-02-261-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | See http://bugzilla.kernel.org/show_bug.cgi?id=15021 Make sure that the appropriate AGP module is loaded and probed before trying to set up the DRM. The DRM already depends on the AGP core, but in this case we know the specific AGP driver we need too, and can help users avoid the trap of loading the AGP driver after the DRM driver. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: More s/IS_IRONLAKE/HAS_PCH_SPLIT for Sandybridge.Eric Anholt2010-02-266-22/+22
| | | | | | | | | | | | I think this is pretty much correct. Not really tested. Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Correct the Sandybridge chipset info structs.Eric Anholt2010-02-261-3/+1
| | | | | | | | | | | | Disables CXSR until it's done, and sets the mobile bit on mobile. Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Disable the hangcheck reset on Sandybridge until we add support.Eric Anholt2010-02-261-1/+5
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add a new mobile Sandybridge PCI ID.Eric Anholt2010-02-261-0/+7
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915, agp/intel: Fix stolen memory size on SandybridgeZhenyu Wang2010-02-262-49/+126
| | | | | | | | | | | | | | | | New memory control config reg at 0x50 should be used for stolen memory size detection on Sandybridge. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Correct locking in the modesetting failure path, fixing a BUG_ON.Eric Anholt2010-02-261-0/+2
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Disable the surface tile swizzling on Sandybridge.Eric Anholt2010-02-261-1/+1
| | | | | | | | | | | | I can't explain this, except that it makes my display correct. Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Fix sandybridge status page setup.Eric Anholt2010-02-263-2/+15
| | | | | | | | | | | | The register's moved to the same location as the one for the BCS, it seems. Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Set up fence registers on sandybridge.Eric Anholt2010-02-262-3/+33
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.Eric Anholt2010-02-2611-56/+87
| | | | | | | | Signed-off-by: Eric Anholt <eric@anholt.net>
* | Merge remote branch 'anholt/drm-intel-next' into drm-next-stageDave Airlie2010-02-2513-307/+1057
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * anholt/drm-intel-next: drm/i915: Record batch buffer following GPU error drm/i915: give up on 8xx lid status drm/i915: reduce some of the duplication of tiling checking drm/i915: blow away userspace mappings before fence change drm/i915: move a gtt flush to the correct place agp/intel: official names for Pineview and Ironlake drm/i915: overlay: drop superflous gpu flushes drm/i915: overlay: nuke readback to flush wc caches drm/i915: provide self-refresh status in debugfs drm/i915: provide FBC status in debugfs drm/i915: fix drps disable so unload & re-load works drm/i915: Fix OGLC performance regression on 945 drm/i915: Deobfuscate the render p-state obfuscation drm/i915: add dynamic performance control support for Ironlake drm/i915: enable memory self refresh on 9xx drm/i915: Don't reserve compatibility fence regs in KMS mode. drm/i915: Keep MCHBAR always enabled drm/i915: Replace open-coded eviction in i915_gem_idle()
| * | drm/i915: Record batch buffer following GPU errorChris Wilson2010-02-225-7/+326
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to improve our diagnostic capabilities following a GPU hang and subsequent reset, we need to record the batch buffer that triggered the error. We assume that the current batch buffer, plus a few details about what else is on the active list, will be sufficient -- at the very least an improvement over nothing. The extra information is stored in /debug/dri/.../i915_error_state following an error, and may be decoded using intel_gpu_tools/tools/intel_error_decode. v2: Avoid excessive work under spinlocks. v3: Include ringbuffer for later analysis. v4: Use kunmap correctly and record more buffer state. v5: Search ringbuffer for current batch buffer v6: Use a work fn for the impossible IRQ error case. v7: Avoid non-atomic paths whilst in IRQ context. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: give up on 8xx lid statusJesse Barnes2010-02-221-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These old machines more often than not lie about their lid state. So don't use it to detect LVDS presence, but leave the event handler to deal with lid open/close, when we might need to reset the mode. Fixes kernel bug #15248 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: reduce some of the duplication of tiling checkingOwain Ainsworth2010-02-223-36/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i915_gem_object_fenceable was mostly just a repeat of the i915_gem_object_fence_offset_ok, but also checking the size (which was checkecd when we allowed that BO to be tiled in the first place). So instead, export the latter function and use it in place. Signed-Off-By: Owain G. Ainsworth <oga@openbsd.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: blow away userspace mappings before fence changeDaniel Vetter2010-02-222-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This aligns it with the other user of i915_gem_clear_fence_reg, which blows away the mapping before changing the fence reg. Only affects userspace if it races against itself when changing tiling parameters, i.e. behaviour is undefined, anyway. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: move a gtt flush to the correct placeDaniel Vetter2010-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change, because gtt flushing is a no-op. Still, try to keep the bookkeeping accurate. The if is still slightly wrong for with execbuf2 even i915-class hw doesn't always need a fence reg for gpu access. But that's for somewhen lateron. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: overlay: drop superflous gpu flushesDaniel Vetter2010-02-221-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Cache-coherency is maintained by gem. Drop these leftover MI_FLUSH commands from the userspace code. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: overlay: nuke readback to flush wc cachesDaniel Vetter2010-02-221-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I retested this and whatever this papered over, the problem doesn't seem to exist anymore. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Eric Anholt <eric@anholt.net> [anholt: fixed up compile warning] Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: provide self-refresh status in debugfsJesse Barnes2010-02-221-0/+21
| | | | | | | | | | | | | | | Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
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