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path: root/drivers/gpu/drm/i915/intel_dp.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: One more drm_connector_property -> drm_object_propertyRob Clark2012-11-301-2/+2
* drm/i915: drm_connector_property -> drm_object_propertyRob Clark2012-11-211-1/+1
* Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel ...Dave Airlie2012-11-201-373/+586
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| * drm/i915: create the DDI encoderPaulo Zanoni2012-11-111-30/+15
| * drm/i915: add intel_ddi_connector_get_hw_statePaulo Zanoni2012-11-111-1/+5
| * drm/i915: add port field to intel_digital_portPaulo Zanoni2012-11-111-9/+12
| * drm/i915: reset intel_encoder->type when DP or HDMI is detectedPaulo Zanoni2012-11-111-0/+4
| * drm/i915: split intel_dp_init into encoder and connector piecesPaulo Zanoni2012-11-111-57/+67
| * drm/i915: create intel_digital_port and use itPaulo Zanoni2012-11-111-23/+36
| * drm/i915: add intel_dp_to_dev and intel_hdmi_to_devPaulo Zanoni2012-11-111-21/+27
| * drm/i915: simplify assignments inside intel_dp.cPaulo Zanoni2012-11-111-20/+21
| * drm/i915: shut up spurious message in intel_dp_get_hw_stateDaniel Vetter2012-11-111-2/+3
| * drm/i915/dp: change eDP default scaling mode to respect aspect ratioYuly Novikov2012-10-261-2/+2
| * drm/i915/dp: allow configuring eDP panel fitting scaling modeYuly Novikov2012-10-261-1/+30
| * drm/i915: debug print all of the DPCD we haveJani Nikula2012-10-261-4/+4
| * drm/i915: turn the eDP DDI panel on/offPaulo Zanoni2012-10-261-7/+4
| * drm/i915: set/unset the DDI eDP backlightPaulo Zanoni2012-10-261-2/+2
| * drm/i915: set the correct eDP aux channel clock divider on DDIPaulo Zanoni2012-10-261-1/+3
| * drm/i915: convert CPU M/N timings to transcoderPaulo Zanoni2012-10-261-4/+6
| * drm/i915: extract intel_dp_init_panel_power_sequencerDaniel Vetter2012-10-241-108/+115
| * drm/i915/dp: compute the pch dp aux divider from the rawclkDaniel Vetter2012-10-241-1/+1
| * drm/i915/eDP: compute the panel power clock divisor from the pch rawclockDaniel Vetter2012-10-241-2/+6
| * drm/i915: enable/disable backlight for eDPDaniel Vetter2012-10-241-0/+5
| * drm/i915: make edp panel power sequence setup more robustDaniel Vetter2012-10-231-11/+60
| * drm/i915/dp: actually nack test requestDaniel Vetter2012-10-231-1/+1
| * drm: extract drm_dp_max_lane_count helperDaniel Vetter2012-10-221-15/+2
| * drm: extract dp link bw helpersDaniel Vetter2012-10-221-4/+1
| * drm/i915: use the new dp train delay helpersDaniel Vetter2012-10-221-3/+3
| * drm: extract dp link train delay functions from radeonDaniel Vetter2012-10-221-1/+0
| * drm: extract helpers to compute new training values from sink requestDaniel Vetter2012-10-221-28/+2
| * drm: dp helper: extract drm_dp_clock_recovery_okDaniel Vetter2012-10-221-27/+2
| * drm: dp helper: extract drm_dp_channel_eq_okDaniel Vetter2012-10-221-33/+2
| * drm/i915: Move cached EDID to intel_connectorJani Nikula2012-10-221-27/+34
| * drm/i915: Move the fixed mode to intel_panelJani Nikula2012-10-221-11/+18
| * drm/i915: Create generic intel_panel for LVDS and eDPJani Nikula2012-10-221-2/+7
| * drm/i915/dp: Initialize eDP fixed mode in intel_dp_initJani Nikula2012-10-221-28/+25
| * drm/i915: Backlight setup requires connector so pass it as parameterJani Nikula2012-10-221-4/+2
| * Merge tag 'v3.7-rc2' into drm-intel-next-queuedDaniel Vetter2012-10-221-17/+12
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| * | drm/i915: set the correct function pointers for Haswell DPPaulo Zanoni2012-10-181-6/+26
| * | drm/i915: implement Haswell DP link train sequencePaulo Zanoni2012-10-181-6/+26
| * | drm/i915: fix Haswell DP M/N registersPaulo Zanoni2012-10-181-1/+6
| * | drm/i915: add DP support to intel_ddi_mode_setPaulo Zanoni2012-10-181-11/+17
| * | drm/i915: fix DP AUX register definitions on HaswellPaulo Zanoni2012-10-181-0/+23
| * | drm/i915: use TU_SIZE macro at intel_dp_set_m_nPaulo Zanoni2012-10-171-5/+2
| * | drm/i915: add basic Haswell DP link train bitsPaulo Zanoni2012-10-171-6/+98
| * | drm/i915: add DP support to intel_ddi_enable_pipe_funcPaulo Zanoni2012-10-171-5/+0
| * | drm/i915: Add eDP support for ValleyviewGajanan Bhat2012-09-281-5/+12
| * | drm/i915: Program correct m n tu register for ValleyviewVijay Purushothaman2012-09-281-0/+5
| * | drm/i915: Set aux clk to 100MHz for ValleyviewVijay Purushothaman2012-09-281-1/+7
| * | drm/dp: Make sink count DP 1.2 awareAdam Jackson2012-09-261-5/+4
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