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* drm/i915: Prevent double dpms onChris Wilson2010-09-071-1/+4
| | | | | | | | | | | Arguably this is a bug in drm-core in that we should not be called twice in succession with DPMS_ON, however this is still occuring and we see FDI link training failures on the second call leading to the occassional blank display. For the time being ignore the repeated call. Original patch by Dave Airlie <airlied@redhat.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
* drm/i915: Avoid use of uninitialised values when disabling panel-fitterChris Wilson2010-09-071-20/+15
| | | | | | | | | We were passing garbage values into the panel-fitter control register when disabling it on Ironlake - those values (filter modes and reserved MBZ bits) would have then be re-used the next time panel-fitting was enabled. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Avoid pageflipping freeze when we miss the flip prepare interruptSimon Farnsworth2010-09-071-10/+4
| | | | | | | | | | | | | | | | When we miss the flip prepare interrupt, we never get into the software state needed to restart userspace, resulting in a freeze of a full-screen OpenGL application (such as a compositor). Work around this by checking DSPxSURF/DSPxBASE to see if the page flip has actually happened. If it has, do the work we would have done when the flip prepare interrupt comes in. Also, add debugfs information to tell us what's going on (based on the patch from Chris Wilson attached to bugs.fdo bug #29798). Signed-off-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915: Tightly scope intel_encoder to prevent invalid useChris Wilson2010-09-071-13/+12
| | | | | | | | | | | | | | We reset intel_encoder for every matching encoder whilst iterating over the encoders attached to this crtc when changing mode. As such in a cloned configuration intel_encoder may not correspond to the correct is_edp encoder. By scoping intel_encoder to the loop, not only is the compiler able to spot this mistake, we also improve readiability for ourselves. [It might not be a mistake, within this function it is unclear as to whether it is permissable for eDP to be cloned...] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* drm/i915/dp: Boost timeout for enabling transcoder to 100msChris Wilson2010-09-071-1/+1
| | | | | | | | | | | | | Adam Hill reported that his Arrandale system required a much longer, up to 200x500us, wait for the panel to initialise or else modesetting would fail. References: https://bugs.freedesktop.org/show_bug.cgi?id=29141 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reported-and-tested-by: Adam Hill <sidepipeuk@yahoo.co.uk>
* drm/i915: Re-use set_base_atomic to share setting of the display registersChris Wilson2010-09-071-71/+9
| | | | | | | Lets try to avoid repeating old bugs. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Fix offset page-flips on i965+Chris Wilson2010-09-071-19/+48
| | | | | | | | | | | | | i965 uses the Display Registers to compute the offset from the display base so the new base does not need adjusting when flipping. The older chipsets use a fence to access the display and so do perceive the surface as linear and have a single base register which is reprogrammed using the flip. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Reported-by: Marty Jack <martyj19@comcast.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Clear the vblank status bit before polling for the next vblankChris Wilson2010-09-061-0/+16
| | | | | | | | | | | | The vblank status bit is a sticky bit that must be cleared with a write of '1' prior to polling for the next vblank. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> jbarnes: I'd still rather see a lock, but I think you're right that we don't generally wait in code that needs not to miss an interrupt. Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: fix vblank wait test conditionJesse Barnes2010-08-241-1/+1
| | | | | | | | | | | | When converting this to the new wait_for macro I inverted the wait condition, which causes all sorts of problems. So correct it to fix several failures caused by the bad wait (flickering, bad output detection, tearing, etc.). Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2010-08-221-230/+289
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (58 commits) drm/i915,intel_agp: Add support for Sandybridge D0 drm/i915: fix render pipe control notify on sandybridge agp/intel: set 40-bit dma mask on Sandybridge drm/i915: Remove the conflicting BUG_ON() drm/i915/suspend: s/IS_IRONLAKE/HAS_PCH_SPLIT/ drm/i915/suspend: Flush register writes before busy-waiting. i915: disable DAC on Ironlake also when doing CRT load detection. drm/i915: wait for actual vblank, not just 20ms drm/i915: make sure eDP PLL is enabled at the right time drm/i915: fix VGA plane disable for Ironlake+ drm/i915: eDP mode set sequence corrections drm/i915: add panel reset workaround drm/i915: Enable RC6 on Ironlake. drm/i915/sdvo: Only set is_lvds if we have a valid fixed mode. drm/i915: Set up a render context on Ironlake drm/i915 invalidate indirect state pointers at end of ring exec drm/i915: Wake-up wait_request() from elapsed hang-check (v2) drm/i915: Apply i830 errata for cursor alignment drm/i915: Only update i845/i865 CURBASE when disabled (v2) drm/i915: FBC is updated within set_base() so remove second call in mode_set() ...
| * drm/i915: wait for actual vblank, not just 20msJesse Barnes2010-08-211-22/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Waiting for a hard coded 20ms isn't always enough to make sure a vblank period has actually occurred, so add code to make sure we really have passed through a vblank period (or that the pipe is off when disabling). This prevents problems with mode setting and link training, and seems to fix a bug like https://bugs.freedesktop.org/show_bug.cgi?id=29278, but on an HP 8440p instead. Hopefully also fixes https://bugs.freedesktop.org/show_bug.cgi?id=29141. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: make sure eDP PLL is enabled at the right timeJesse Barnes2010-08-181-37/+2
| | | | | | | | | | | | | | We need to make sure the eDP PLL is enabled before the pipes or planes, so do it as part of the DP prepare mode set function. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * drm/i915: fix VGA plane disable for Ironlake+Jesse Barnes2010-08-181-28/+27
| | | | | | | | | | | | | | | | | | | | We need to use I/O port instructions to access VGA registers on Ironlake+, and it doesn't hurt on other platforms, so switch the VGA plane disable function over to using them. Move it to init time as well while we're at it, no need to repeatedly disable the VGA plane with every mode set and DPMS event. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * drm/i915: Enable RC6 on Ironlake.Zou Nan hai2010-08-091-3/+6
| | | | | | | | | | | | | | | | RC6 allows the GPU to enter a lower power state when the GPU is idle. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> [anholt: Fixed the !renderctx error path to actually not enable RC6.] Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Set up a render context on IronlakeZou Nan hai2010-08-091-10/+43
| | | | | | | | | | | | | | | | RC6 power state requires a logical render context in place for saving render context. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Apply i830 errata for cursor alignmentChris Wilson2010-08-091-1/+3
| | | | | | | | | | | | | | | | i830 requires 32bpp cursors to be aligned to 16KB, so we have to expose the alignment parameter to i915_gem_attach_phys_object(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Only update i845/i865 CURBASE when disabled (v2)Chris Wilson2010-08-091-29/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | The i845 and i865 have a peculiarlity in that CURBASE is not the trigger for the vsync update of the cursor registers but instead the modification of that register is prohibited whilst the cursor is enabled. Reorder the write sequence for CURPOS, CURCNTR and CURBASE on i845 to i865 to match. v2: Remove the checks for i845/i865 from within i9xx_cursor_update() Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: FBC is updated within set_base() so remove second call in mode_set()Chris Wilson2010-08-091-3/+0
| | | | | | | | | | | | | | | | | | The FBC is dependent upon a few details of the framebuffer so it is required to be updated within set_base(), so remove the redundant call from mode_set(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915/edp: Flush the write before waiting for PLLsChris Wilson2010-08-091-0/+1
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Ensure that while(INREG()) are bounded (v2)Chris Wilson2010-08-091-45/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new macro, wait_for, to simplify the act of waiting on a register to change state. wait_for() takes three arguments, the condition to inspect on every loop, the maximum amount of time to wait and whether to yield the cpu for a length of time after each check. v2: Upgrade failure messages to DRM_ERROR on the suggestion of Eric Anholt. We do not expect to hit these conditions as they reflect programming errors, so if we do we want to be notified. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Update watermarks for Ironlake after dpms changesChris Wilson2010-08-091-14/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously, we only remembered to update the watermarks for i9xx, and incorrectly assumed that the crtc->enabled flag was valid at that point in the dpms cycle. Note that on my x201s this makes a SR bug on pipe 1 much easier to hit. (Since before this patch when disabling pipe 0, we either didn't update the watermarks at all, or when we did we still thought we had two pipes enabled and so disabled SR.) References: Bug 28969 - [Arrandale] Screen flickers, suspect Self-Refresh https://bugs.freedesktop.org/show_bug.cgi?id=28969 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915/display: Add pipe/plane information to dpms debuggingChris Wilson2010-08-091-3/+3
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Write to display base last.Chris Wilson2010-08-091-4/+2
| | | | | | | | | | | | | | | | | | Writing to the DSPBASE register triggers the double-buffered update to all the control registers, so always write it last in the update sequence. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Enable aspect/centering panel fitting for Ironlake.Chris Wilson2010-08-091-9/+7
| | | | | | | | | | | | | | | | v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Disable the cursor for DPMS_OFFChris Wilson2010-08-091-4/+4
| | | | | | | | | | | | | | | | The comments have long desired that we should switch off the cursor along with the display plane, make it so. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: i8xx also doesn't like multiple oustanding pageflipsDaniel Vetter2010-08-091-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | My i855GM suffers from a 80k/s interrupt storm without this. So add 2nd gen to the list of things that don't like more than one outstanding pageflip request. Furthermore I've changed the busy loop into a ringbuffer wait. Busy-loops that don't check whether the chip died are simply evil. And performance should actually improve, because there's usually a decent amount of rendering queued on the gpu, hopefully rendering that MI_WAIT into a noop by the time it's executed. The current code holds dev->struct_mutex while executing this loop, hence stalling all other gem activity anyway. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: resolved against conflict] Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: fixup pageflip ringbuffer commands for i8xxDaniel Vetter2010-08-091-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a new path for 2nd gen chips that uses the commands for i81x chips (where public docs do exist) augmented with the plane bits from i915. It seems to work and doesn't result in a black screen like before. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org [anholt: resolved against conflict] Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Mark the static memory latency tables const.Chris Wilson2010-08-091-6/+8
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Subclass intel_encoder.Chris Wilson2010-08-091-0/+14
| | | | | | | | | | | | | | | | | | | | Subclass intel_encoder to reduce the pointer dance through intel_encoder->dev_priv. 10 files changed, 896 insertions(+), 997 deletions(-) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Do not clobber the contents of TRANS_DP_CTL when enabling.Chris Wilson2010-08-091-3/+4
| | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Remove useless message when disabling "Big FIFO" on PineViewChris Wilson2010-08-091-8/+3
| | | | | | | | | | | | | | | | As we already have appropriate debug and warnings when we activate and deactivate the self-refresh FIFO, having a further INFO is just annoying. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
* | Merge branch 'drm-core-next' of ↵Linus Torvalds2010-08-121-9/+6
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (55 commits) io-mapping: move asm include inside the config option vgaarb: drop vga.h include drm/radeon: Add probing of clocks from device-tree drm/radeon: drop old and broken mesa warning drm/radeon: Fix pci_map_page() error checking drm: Remove count_lock for calling lastclose() after 58474713 (v2) drm/radeon/kms: allow FG_ALPHA_VALUE on r5xx drm/radeon/kms: another r6xx/r7xx CS checker fix DRM: Replace kmalloc/memset combos with kzalloc drm: expand gamma_set drm/edid: Split mode lists out to their own header for readability drm/edid: Rewrite mode parse to use the generic detailed block walk drm/edid: Add detailed block walk for VTB extensions drm/edid: Add detailed block walk for CEA extensions drm: Remove unused fields from drm_display_info drm: Use ENOENT consistently for the error return for an unmatched handle. drm/radeon/kms: mark 3D power states as performance drm: Only set DPMS once on the CRTC not after every encoder. drm/radeon/kms: add additional quirk for Acer rv620 laptop drm: Propagate error code from fb_create() ... Fix up trivial conflicts in drivers/gpu/drm/drm_edid.c
| * drm: expand gamma_setJames Simmons2010-08-101-6/+3
| | | | | | | | | | | | | | | | | | | | Expand the crtc_gamma_set function to accept a starting offset. The reason for this is to eventually use this function for setcolreg from drm_fb_helper.c. The fbdev colormap function can start at any offset in the color map. Signed-by: James Simmons <jsimmons@infradead.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm: Propagate error code from fb_create()Chris Wilson2010-08-101-3/+3
| | | | | | | | | | | | | | | | | | Change the interface to expect a PTR_ERR specifing the real error code as opposed to assuming a NULL return => -EINVAL. Just once the user may not be at fault! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | Merge branch 'drm-core-next' of ↵Linus Torvalds2010-08-051-163/+423
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (204 commits) agp: intel-agp: do not use PCI resources before pci_enable_device() agp: efficeon-agp: do not use PCI resources before pci_enable_device() drm: kill BKL from common code drm/kms: Simplify setup of the initial I2C encoder config. drm,io-mapping: Specify slot to use for atomic mappings drm/radeon/kms: only expose underscan on avivo chips drm/radeon: add new pci ids drm: Cleanup after failing to create master->unique and dev->name drm/radeon: tone down overchatty acpi debug messages. drm/radeon/kms: enable underscan option for digital connectors drm/radeon/kms: fix calculation of h/v scaling factors drm/radeon/kms/igp: sideport is AMD only drm/radeon/kms: handle the case of no active displays properly in the bandwidth code drm: move ttm global code to core drm drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it. drm/radeon/kms: make sure HPD is set to NONE on analog-only connectors drm/radeon/kms: make sure rio_mem is valid before unmapping it drm/agp/i915: trim stolen space to 32M drm/i915: Unset cursor if out-of-bounds upon mode change (v4) drm/i915: Unreference object not handle on creation ...
| * drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it.Eric Anholt2010-08-031-5/+7
| | | | | | | | | | | | | | My fine DisplayPort output was getting ST dithering forever after having had the LVDS enabled at one point. Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Unset cursor if out-of-bounds upon mode change (v4)Chris Wilson2010-08-011-51/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The docs warn that to position the cursor such that no part of it is visible on the pipe is an undefined operation. Avoid such circumstances upon changing the mode, or at any other time, by unsetting the cursor if it moves out of bounds. "For normal high resolution display modes, the cursor must have at least a single pixel positioned over the active screen.” (p143, p148 of the hardware registers docs). Fixes: Bug 24748 - [965G] Graphics crashes when resolution is changed with KMS enabled https://bugs.freedesktop.org/show_bug.cgi?id=24748 v2: Only update the cursor registers if they change. v3: Fix the unsigned comparision of x,y against width,height. v4: Always set CUR.BASE or else the cursor may become corrupt. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reported-by: Christian Eggers <ceggers@gmx.de> Cc: Christopher James Halse Rogers <chalserogers@gmail.com> Cc: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Warn if we run out of FIFO space for a modeChris Wilson2010-08-011-1/+7
| | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Round up the watermark entries (v3)Chris Wilson2010-08-011-24/+20
| | | | | | | | | | | | | | | | | | | | | | | | Even though "we have enough padding that it should be ok", round up the watermark entries to the next unit to be on the safe side... v2: Use the DIV_ROUND_UP macro v3: Spotted a few more missing round-ups. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Enable panel fitting for eDPZhao Yakui2010-08-011-1/+2
| | | | | | | | | | | | | | | | | | | | When trying to set other display mode besides the fixed panel mode, the panel fitting should be enabled. This is similar to LVDS. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915/pch: Set transcoder sync polarity for DP based on actual modeAdam Jackson2010-08-011-3/+6
| | | | | | | | | | Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Initialize LVDS and eDP outputs before anything elseAdam Jackson2010-08-011-5/+12
| | | | | | | | | | | | | | | | | | This makes them sort to the front in X, which makes them likely to be the primary outputs if you haven't specified a preference in your DE, which is likely to be what you want. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * Merge remote branch 'origin/master' into drm-intel-nextEric Anholt2010-08-011-11/+98
| |\ | | | | | | | | | | | | | | | | | | | | | This resolves the conflict in the EDP code, which has been rather popular to hack on recently. Conflicts: drivers/gpu/drm/i915/intel_dp.c
| * | drm/i915: Use 128k alignment for untiled display surface on i965 (v2)Chris Wilson2010-08-011-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original i965, including the revised G35 and Q35, requires an alignment of 128K for the display surface with linear memory, so increase the requirement from 64k for these chipsets. For the later chipsets in the i965 family, only a 4k alignment is required. (So long as we do not start performing asynchronous flips.) Note the impact of this should be slight as on i965 we should be using a tiled frontbuffer for anything up to a 4096x4096 display. v2: compilation fixes and note that the docs do not exclude the G35 from the extra alignment. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915/pch: Cosmetic fix to FDI link trainingAdam Jackson2010-08-011-34/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unmask the bits for link training reporting before starting link training. If stage 1 training finished before we unmask them, then we'd spin around in a loop a few times until smashing on through. Which is harmless, since training _did_ succeed, it just looks ugly in dmesg. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: fix FDI frequency checkJesse Barnes2010-08-011-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since mode->clock is in kHz we should be checking against 2700000 instead of just 27000. This patch gets my x201s working again (well working as well as it ever was anyway). When looking for this I also noticed we set link_bw to 270000, but the calculation is different. Does it also need to use kHz or we using 10kHz internally? Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: Propagate error from i915_gem_object_flush_gpu_write_domain()Chris Wilson2010-08-011-1/+3
| | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: Propagate error from drm_vblank_get() during page-flipping.Chris Wilson2010-08-011-14/+21
| | | | | | | | | | | | | | | Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: Add frame buffer compression support on Ironlake mobileZhao Yakui2010-08-011-1/+92
| | | | | | | | | | | | | | | | | | | | | | | | About 0.2W power can be saved on one HP laptop. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
| * | drm/i915: Calculate cursor watermark under non-SR state for IronlakeZhao Yakui2010-08-011-3/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware team suggest that the "large buffer" method should be used to calculate the cursor watermark under non-SR state as well, which is to avoid the flicker when FBC is enabled on Ironlake. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
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