summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem_tiling.c
Commit message (Expand)AuthorAgeFilesLines
* drm/i915: Clear fence register on tiling stride change.Chris Wilson2009-06-181-16/+51
* drm/i915: enable MCHBAR if neededJesse Barnes2009-06-091-0/+145
* drm/i915: Disable tiling on IGDNG for nowZhenyu Wang2009-06-051-0/+7
* drm/i915: Fix tiling pitch handling on 8xx.Eric Anholt2009-05-261-3/+11
* drm/i915: fix transition to I915_TILING_NONEKeith Packard2009-04-171-1/+0
* drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU.Eric Anholt2009-04-081-2/+109
* drm/i915: fix up tiling/fence reg setup on i8xx class hwDaniel Vetter2009-04-011-0/+16
* drm/i915: Change DCC tiling detection case to cover only mobile parts.Eric Anholt2009-03-271-16/+15
* drm/i915: hold mutex for unreference() in i915_gem_tiling.cChris Wilson2009-02-201-4/+2
* drm/i915: Unref the object after failing to set tiling mode.Chris Wilson2009-02-081-1/+4
* drm/i915: add fence register management to execbufJesse Barnes2009-02-081-1/+87
* drm/i915: add GEM GTT mapping supportJesse Barnes2008-12-291-0/+1
* drm/i915: Respect GM965/GM45 bit-17-instead-of-bit-11 option for swizzling.Eric Anholt2008-12-041-3/+4
* i915: GM45 has GM965-style MCH setup.Eric Anholt2008-10-181-2/+3
* drm: G33-class hardware has a newer 965-style MCH (no DCC register).Eric Anholt2008-10-181-1/+1
* drm: Add GEM ("graphics execution manager") to i915 driver.Eric Anholt2008-10-181-0/+256
OpenPOWER on IntegriCloud