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* drm/amdgpu: ignore digest_size when loading sdma fw for ravenHawking Zhang2017-08-151-14/+0
| | | | | | | | | | digest_size has been retired from sdma v4 fw Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Uninitialized variable in amdgpu_ttm_backend_bind()Dan Carpenter2017-08-151-1/+1
| | | | | | | | | | | | My static checker complains that it's possible for "r" to be uninitialized. It used to be set to zero so this returns it to the old behavior. Fixes: 98a7f88ce9a9 ("drm/amdgpu: bind BOs with GTT space allocated directly v2") Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: don't finish the ring if not initializedTrigger Huang2017-08-151-0/+4
| | | | | | | | | | | | | | If a ring is not initialized, it also should not be finished. For example, in Vega10's SR-IOV environment, UVD's decode ring is not initialized, but will be finnished in amdgpu_uvd_sw_fini, because UVD driver put all the uvd decode ring's finish operation into amdgpu_uvd_sw_fini function, while not uvd_vXXX_0_sw_fini. This will lead to amdgpu module unloading failure. Signed-off-by: Trigger Huang <trigger.huang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix preferred typoKent Russell2017-08-157-16/+16
| | | | | | | | Change "prefered" to "preferred" Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix stolen typoKent Russell2017-08-152-7/+7
| | | | | | | | Change "stollen" to "stolen" Signed-off-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: set gfx_v9_0_ip_funcs as staticHuang Rui2017-08-152-2/+1
| | | | | | | | We won't use this member in other files, so set it static. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: switch to drm_*{get,put} helpersCihangir Akturk2017-08-159-30/+30
| | | | | | | | | | | drm_*_reference() and drm_*_unreference() functions are just compatibility alias for drm_*_get() and drm_*_put() and should not be used by new code. So convert all users of compatibility functions to use the new APIs. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Cihangir Akturk <cakturk@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use 256 bit buffers for all wb allocations (v2)Alex Deucher2017-08-153-126/+20
| | | | | | | | | | May waste a bit of memory, but simplifies the interface significantly. v2: convert internal accounting to use 256bit slots Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Make amdgpu_atif_handler staticJean Delvare2017-08-151-1/+1
| | | | | | | | | | There are no external users of function amdgpu_atif_handler so it can be static. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix amdgpu_pm_acpi_event_handler warningJean Delvare2017-08-152-1/+2
| | | | | | | | | | | | | Include a missing header to get rid of the following warning: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:65:6: warning: no previous prototype for ‘amdgpu_pm_acpi_event_handler’ [-Wmissing-prototypes] void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) ^ Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix dce_v6_0_disable_dce warningJean Delvare2017-08-151-0/+1
| | | | | | | | | | | | | Include a missing header to get rid of the following warning: drivers/gpu/drm/amd/amdgpu/dce_v6_0.c:521:6: warning: no previous prototype for 'dce_v6_0_disable_dce' [-Wmissing-prototypes] void dce_v6_0_disable_dce(struct amdgpu_device *adev) ^ Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix undue fallthroughs in golden registers initializationJean Delvare2017-08-151-0/+2
| | | | | | | | | | | | | | | | | | | | As I was staring at the si_init_golden_registers code, I noticed that the Pitcairn initialization silently falls through the Cape Verde initialization, and the Oland initialization falls through the Hainan initialization. However there is no comment stating that this is intentional, and the radeon driver doesn't have any such fallthrough, so I suspect this is not supposed to happen. Signed-off-by: Jean Delvare <jdelvare@suse.de> Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") Cc: Ken Wang <Qingqing.Wang@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Marek Olšák" <maraeo@gmail.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu/sdma4: move wptr polling setupAlex Deucher2017-08-151-11/+13
| | | | | | | | | Move it up before ring enablement with all of the other engine setup and explicitly disable it for bare metal. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/sdma4: drop allocation of poll_mem_offsAlex Deucher2017-08-152-37/+9
| | | | | | | | | We already allocate this as part of the ring structure, use that instead. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/sdma4: drop hdp flush from wptr shadow updateAlex Deucher2017-08-151-1/+0
| | | | | | | | | The wb buffer is in system memory, not vram so the flush is useless. Cc: Frank Min <Frank.Min@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/sdma4: set wptr shadow atomically (v2)Alex Deucher2017-08-151-2/+3
| | | | | | | | | | | No functional change until wptr polling uses this location (future patch). v2: use WRITE_ONCE Cc: Frank Min <Frank.Min@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix KFD initialization for multi-GPU systemsFelix Kuehling2017-08-153-22/+18
| | | | | | | | | | kfd2kgd is device-specific, so it should not be a global variable. Merge amdgpu_amdkfd_load_interface and amdgpu_amdkfd_device_probe so that it's only needed as a local variable in one function. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/sdma4: drop unused register headerAlex Deucher2017-08-151-1/+0
| | | | | | | | nbio registers are not used in this file. Reviewed-by: Christian König <christian.koenig@amd.com> Cc: Frank Min <Frank.Min@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: drop old ip definitions for gfxhub and mmhubAlex Deucher2017-08-152-5/+0
| | | | | | | | | | The gfxhub and mmhub code are now helpers for gmc rather than standalone IPs. When that changes these were left over. Remove them. Acked-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: make wb 256bit function names consistentAlex Deucher2017-08-153-3/+3
| | | | | | | Use a lower case b to be consistent with the other wb functions. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Support IOMMU on RavenYong Zhao2017-08-152-5/+27
| | | | | | | | | | We achieved that by setting S(SYSTEM) and P(PDE as PTE) bit to 1 for PDEs and setting S bit to 1 for PTEs when the corresponding addresses are not occupied by gpu driver allocated buffers. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add a parameter to amdgpu_bo_create()Yong Zhao2017-08-1514-20/+29
| | | | | | | | | The parameter init_value contains the value to which we initialized VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use amdgpu_bo_free_kernel more oftenChristian König2017-08-155-163/+15
| | | | | | | | Saves us even more loc. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use amdgpu_bo_create_kernel more oftenChristian König2017-08-156-396/+103
| | | | | | | | Saves us quite a bunch of loc. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add amdgpu_bo_create_reservedChristian König2017-08-152-8/+44
| | | | | | | | Same as amdgpu_bo_create_kernel, but keeps the BO reserved. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: improve amdgpu_bo_create_kernelChristian König2017-08-151-8/+14
| | | | | | | | Make allocating the new BO optional. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: shadow and mn list are mutually exclusiveChristian König2017-08-151-2/+5
| | | | | | | | Save some memory because only one of those is used at all times. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move some defines aroundChristian König2017-08-152-68/+67
| | | | | | | | | | Move amdgpu_bo and related structures into amdgpu_object.h. Move amdgpu_bo_list structures to the amdgpu_bo_list functions. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: consistent use u64_to_user_ptrChristian König2017-08-153-6/+6
| | | | | | | | Instead of open coding the conversion from u64 to pointers. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup kptr handlingChristian König2017-08-155-15/+19
| | | | | | | | Don't keep around the same pointer twice. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update vega10 golden settingEvan Quan2017-08-151-0/+2
| | | | | | | Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Ken Wang <ken.wang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/sdma4: Enable sdma poll mem addr on vega10 for SRIOVFrank Min2017-08-152-3/+46
| | | | | | | | | | | While doing flr on VFs, there is possibility to lost the doorbell writing for sdma, so enable poll mem for sdma, then sdma fw would check the pollmem holding wptr. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/uvd7: optimize uvd initialization sequence for SRIOVFrank Min2017-08-151-47/+11
| | | | | | | | | | 1.Since in sriov there is no need of decoding, so skip the related code; 2.Vcpu boot up and umc enable need to take at the end of the init sequence; Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vce4: optimize vce 4.0 init table sequence for SRIOVFrank Min2017-08-151-1/+2
| | | | | | | | | Optimize init table sequence for sriov. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: According hardware design revert vce and uvd doorbell assignmentFrank Min2017-08-153-15/+23
| | | | | | | | | Now uvd doorbell is from 0xf8-0xfb and vce doorbell is from 0xfc-0xff Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Skip uvd and vce ring test for SRIOVFrank Min2017-08-152-2/+5
| | | | | | | | | | Since rptr would not be accessed on later secure asics in sriov, remove the ring test. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vce4: Remove vce interrupt enable related code for sriovFrank Min2017-08-151-4/+6
| | | | | | | | | | Interrupt enable is contained in vce init table and this register could not be accessed in secure ASICs, so just remove it. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Enable uvd and vce gpu re-init for SRIOV gpu resetFrank Min2017-08-153-6/+4
| | | | | | | | | Add uvd and vce re-init after gpu reset. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Clear vce&uvd ring wptr for SRIOVFrank Min2017-08-152-2/+10
| | | | | | | | | | | MMSCH FW need to get the wptr from 0 after it get the mailbox request from driver, since every time kick the mailbox, mmsch thinks that it is the first time engine start to initialize. Signed-off-by: Frank Min <Frank.Min@amd.com> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add support for filling a buffer with 64 bit valueYong Zhao2017-08-152-5/+12
| | | | | | | | | That function will be used later to support setting a page table block with 64 bit value. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable vcn power control for nowLeo Liu2017-08-151-8/+6
| | | | | | | | | | | | The dpm control for vcn has been moved to firmware, kernel always spins "amdgpu: [powerplay] pp_dpm_powergate_uvd was not implemented", each time when application runs, disable it for now till pg/cg. Also remove clock manual setting when dpm disabled, which was inherited from uvd. Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/dce_virtual: remove error message for vega10Xiangliang.Yu2017-08-151-0/+2
| | | | | | | | Vega10 also support virtual display, remove the error message. Signed-off-by: Xiangliang.Yu <Xiangliang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge tag 'drm-misc-next-2017-08-08' of ↵Dave Airlie2017-08-108-129/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next UAPI Changes: - vc4: Add ioctl to allow attaching a label to a bo (Eric) - Add new format/modifier blob plane property (Ben) - armada: Use __u32/__u64 instead of uint32_t/uint64_t (Mikko) - [kinda uapi] fb_helper: Expose display_info size via fb_info (David) Core Changes: - Default gem_dumb_[map_offset|destroy] as mmap/destroy implementations (Noralf) - Simplify atomic properties by removing the helpers and handling in core (Daniel) Driver Changes: - stm: Add STM32 DSI controller driver (Phillipe) - vc4: Add HDMI CEC support (Hans) - rockchip: Refactor register init & soc version handling (Mark) - misc: Remove .load_lut, .gamma_set, .gamma_get dead code (Peter) - dw-hdmi: Add HDMI CEC support (Russell) Cc: Philippe CORNU <philippe.cornu@st.com> Cc: Hans Verkuil <hans.verkuil@cisco.com> Cc: Eric Anholt <eric@anholt.net> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Mark yao <mark.yao@rock-chips.com> Cc: Peter Rosin <peda@axentia.se> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Mikko Rapeli <mikko.rapeli@iki.fi> Cc: David Lechner <david@lechnology.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> * tag 'drm-misc-next-2017-08-08' of git://anongit.freedesktop.org/git/drm-misc: (107 commits) drm: Nuke drm_atomic_legacy_backoff drm: Nuke drm_atomic_helper_connector_dpms drm: Nuke drm_atomic_helper_connector_set_property drm: Nuke drm_atomic_helper_plane_set_property drm: Nuke drm_atomic_helper_crtc_set_property drm: Handle properties in the core for atomic drivers drm: Don't update property values for atomic drivers drm/omap: Rework the rotation-on-crtc hack drm/radeon: Use the drm_driver.dumb_destroy default drm/i915: Use the drm_driver.dumb_destroy default drm/sti: Use .dumb_map_offset and .dumb_destroy defaults drm: bridge: synopsys/dw-hdmi: Provide default configuration function for HDMI 2.0 PHY drm/fb-helper: pass physical dimensions to fbdev uapi drm/armada_drm.h: use __u32 and __u64 instead of uint32_t and uint64_t drm/bridge: dw-hdmi: remove CEC engine register definitions drm/bridge: dw-hdmi: add cec driver drm/bridge: dw-hdmi: add missing cec_notifier_put drm: remove unused and redundant callbacks staging: vboxvideo: remove dead gamma lut code drm: dw-hdmi-i2s: add missing company name on Copyright ...
| * drm: amd: remove dead code and pointless local lut storagePeter Rosin2017-08-047-128/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | The redundant fb helpers .load_lut, .gamma_set and .gamma_get are no longer used. Remove the dead code and hook up the crtc .gamma_set to use the crtc gamma_store directly instead of duplicating that info locally. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Peter Rosin <peda@axentia.se> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20170713162538.22788-5-peda@axentia.se
| * drm/amdgpu: Use the drm_driver.dumb_destroy defaultNoralf Trønnes2017-07-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | drm_gem_dumb_destroy() is the drm_driver.dumb_destroy default, so no need to set it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Acked-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/1500837417-40580-30-git-send-email-noralf@tronnes.org
* | Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-08-0273-1426/+2148
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next - Stop reprogramming the MC, the vbios already does this in asic_init - Reduce internal gart to 256M (this does not affect the ttm GTT pool size) - Initial support for huge pages - Rework bo migration logic - Lots of improvements for vega10 - Powerplay fixes - Additional Raven enablement - SR-IOV improvements - Bug fixes - Code cleanup * 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (138 commits) drm/amdgpu: fix header on gfx9 clear state drm/amdgpu: reduce the time of reading VBIOS drm/amdgpu/virtual_dce: Remove the rmmod error message drm/amdgpu/gmc9: disable legacy vga features in gmc init drm/amdgpu/gmc8: disable legacy vga features in gmc init drm/amdgpu/gmc7: disable legacy vga features in gmc init drm/amdgpu/gmc6: disable legacy vga features in gmc init (v2) drm/radeon: Set depth on low mem to 16 bpp instead of 8 bpp drm/amdgpu: fix the incorrect scratch reg number on gfx v6 drm/amdgpu: fix the incorrect scratch reg number on gfx v7 drm/amdgpu: fix the incorrect scratch reg number on gfx v8 drm/amdgpu: fix the incorrect scratch reg number on gfx v9 drm/amd/powerplay: add support for 3DP 4K@120Hz on vega10. drm/amdgpu: enable huge page handling in the VM v5 drm/amdgpu: increase fragmentation size for Vega10 v2 drm/amdgpu: ttm_bind only when user needs gpu_addr in bo pin drm/amdgpu: correct clock info for SRIOV drm/amdgpu/gmc8: SRIOV need to program fb location drm/amdgpu: disable firmware loading for psp v10 drm/amdgpu:fix gfx fence allocate size ...
| * drm/amdgpu: fix header on gfx9 clear stateAlex Deucher2017-07-271-20/+21
| | | | | | | | | | | | | | | | This got missed when we open sourced this. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: reduce the time of reading VBIOSXiangliang Yu2017-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | VRAM is usually marked write combined, so change ioremap mode from noncache to write combine for reading vbios from VRAM. This will reduce cost time of reading vbios from 188ms to 8ms. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/virtual_dce: Remove the rmmod error messageEmily Deng2017-07-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the error message "[drm:amdgpu_irq_disable_all [amdgpu]] *ERROR* error disabling interrupt (-22)". For virtual dce, it only use AMDGPU_CRTC_IRQ_VBLANK1 - AMDGPU_CRTC_IRQ_VBLANK6, and don't use AMDGPU_CRTC_IRQ_VLINE1 - AMDGPU_CRTC_IRQ_VLINE6. And when rmmod amdgpu, it will disable all interrupts, it will return error when the type of crtc irq interrupt is AMDGPU_CRTC_IRQ_VLINE1 - AMDGPU_CRTC_IRQ_VLINE6. BUG: SWDEV-121607 Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu/gmc9: disable legacy vga features in gmc initAlex Deucher2017-07-251-0/+16
| | | | | | | | | | | | | | | | | | | | Needs to be done when the MC is set up. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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