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* gpio/omap: Fix section warning for omap_mpuio_alloc_gc()Tony Lindgren2012-03-121-1/+1
| | | | | | | | | | | | | | | | Make omap_mpuio_alloc_gc() __devinit as omap_gpio_chip_init() is __devinit. Otherwise we get: WARNING: vmlinux.o(.devinit.text+0xa10): Section mismatch in reference from the function omap_gpio_chip_init() to the function .init.text:omap_mpuio_alloc_gc() The function __devinit omap_gpio_chip_init() references a function __init omap_mpuio_alloc_gc(). If omap_mpuio_alloc_gc is only used by omap_gpio_chip_init then annotate omap_mpuio_alloc_gc with a matching annotation. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: tegra: export tegra_gpio_{en,dis}ableArnd Bergmann2012-03-121-0/+2
| | | | | | | | | | These two functions are used in drivers that can be modules, so they need to be exported. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Alan Ott <alan@signal11.us> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/gpio-stmpe: Fix the value returned by _get_value routineBhupesh Sharma2012-03-121-1/+1
| | | | | | | | | | | | | | | | | | | The present _get_value routine returns the contents of the GPIO Monitor Pin Status Register(GPMR) starting from the bit whose value is requested to BIT 0 (irrelevant bits are replace by 0). For e.g. if we request the value of GPIO 6 in the earlier implementation the value returned is: BIT6 followed by 6 0's whereas it should just return BIT6. This patch addresses the same. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* GPIO: LPC32xx: Add output reading to GPO P3Roland Stigge2012-03-121-0/+17
| | | | | | | | | | | | | | The chip offers the function to detect the current state of output of the GPO P3 pins. Useful for reading GPIO output state in Linux' GPIO API, e.g. via sysfs. Please note that this only reads back the currently programmed output state, not the actual electrical level in terms of a GPI function. Finally, GPO3 is still just an output. Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* GPIO: LPC32xx: Fix missing bit selection maskRoland Stigge2012-03-121-1/+1
| | | | | | | | | Add missing mask to pin bit selection in gpio-lpc32xx.c (#define GPIO3_PIN_IN_SEL) Signed-off-by: Roland Stigge <stigge@antcom.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/omap: fix wakeups on level-triggered GPIOsKevin Hilman2012-03-121-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While both level- and edge-triggered GPIOs are capable of generating interrupts, only edge-triggered GPIOs are capable of generating a module-level wakeup to the PRCM (c.f. 34xx NDA TRM section 25.5.3.2.) In order to ensure that devices using level-triggered GPIOs as interrupts can also cause wakeups (e.g. from idle), this patch enables edge-triggering for wakeup-enabled, level-triggered GPIOs when a GPIO bank is runtime-suspended (which also happens during idle.) This fixes a problem found in GPMC-connected network cards with GPIO interrupts (e.g. smsc911x on Zoom3, Overo, ...) where network booting with NFSroot was very slow since the GPIO IRQs used by the NIC were not generating PRCM wakeups, and thus not waking the system from idle. NOTE: until v3.3, this boot-time problem was somewhat masked because the UART init prevented WFI during boot until the full serial driver was available. Preventing WFI allowed regular GPIO interrupts to fire and this problem was not seen. After the UART runtime PM cleanups, we no longer avoid WFI during boot, so GPIO IRQs that were not causing wakeups resulted in very slow IRQ response times. Tested on platforms using level-triggered GPIOs for network IRQs using the SMSC911x NIC: 3530/Overo and 3630/Zoom3. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/omap: Fix IRQ handling for SPARSE_IRQBenoit Cousson2012-03-051-16/+17
| | | | | | | | | | | | | The driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ. Replace the defines with the proper IRQ base number. Clean some comment style issue. Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: Add DT support to GPIO driverBenoit Cousson2012-03-051-9/+112
| | | | | | | | | | | | | | | Adapt the GPIO driver to retrieve information from a DT file. Allocate the irq_base dynamically and rename bank->virtual_irq_start to bank->irq_base. Change irq_base type to int instead of u16 to match irq_alloc_descs output. Add documentation for GPIO properties specific to OMAP. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
* gpio/omap: Use devm_ API and add request_mem_regionBenoit Cousson2012-03-051-20/+15
| | | | | | | | | | | Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. Add the missing devm_request_mem_region to reserve the region used by the driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: Remove bank->id information and misc cleanupBenoit Cousson2012-03-051-14/+9
| | | | | | | | | | | | The driver does not need anymore any id to identify the GPIO instance. Remove every occurence of the bank->id inside the driver. Remove two trailing spaces. Add a dev variable for better readability in probe. Remove unused variable bank->pbase. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpiolib: Add comments explaining the _cansleep() WARN_ON()sMark Brown2012-03-051-0/+2
| | | | | | | | | | | | | | I've seen users getting very confused by the WARN_ON()s for can_sleep GPIOs in the atomic-safe paths, the discoverability of the non-atomic version of the API seems to be hampered by the fact that it's defined in a header file not the .c file where the warnings are. Add a couple of comments next to the warnings to help people on their way. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio: gpiolib: Support for open source/emitter gpiosLaxman Dewangan2012-03-051-0/+39
| | | | | | | | | | | | | | | | | | Adding support for the open source gpio on which client can specify the open source property through GPIO flag GPIOF_OPEN_SOURCE at the time of gpio request. The open source pins are normally pulled low and it cannot be driven to output with value of 0 and so when client request for setting the pin to LOW, the gpio will be set to input direction to make pin in tristate and hence PULL-DOWN on pins will make the state to LOW. The open source pin can be driven to HIGH by setting output with value of 1. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio: gpiolib: Support for open drain/collector gpiosLaxman Dewangan2012-03-051-2/+42
| | | | | | | | | | | | | | | | | | Adding support for the open drain gpio on which client can specify the open drain property through GPIO flag GPIOF_OPEN_DRAIN at the time of gpio request. The open drain pins are normally pulled high and it cannot be driven to output with value of 1 and so when client request for setting the pin to HIGH, the gpio will be set to input direction to make pin in tristate and hence PULL-UP on pins will make the state to HIGH. The open drain pin can be driven to LOW by setting output with value of 0. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio: constify the data parameter to gpiochip_find()Grant Likely2012-03-021-2/+3
| | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'irqdomain/next' into gpio/nextGrant Likely2012-02-285-35/+22
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| * irq_domain/powerpc: Replace custom xlate functions with library functionsGrant Likely2012-02-161-16/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts a number of the powerpc drivers to use the common library of irq_domain xlate functions, dropping a bunch of lines in the process. v5: - Remove tsi108 changes from patch Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Milton Miller <miltonm@bga.com> Tested-by: Olof Johansson <olof@lixom.net>
| * irq_domain: Replace irq_alloc_host() with revmap-specific initializersGrant Likely2012-02-161-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each revmap type has different arguments for setting up the revmap. This patch splits up the generator functions so that each revmap type can do its own setup and the user doesn't need to keep track of how each revmap type handles the arguments. This patch also adds a host_data argument to the generators. There are cases where the host_data pointer will be needed before the function returns. ie. the legacy map calls the .map callback for each irq before returning. v2: - Add void *host_data argument to irq_domain_add_*() functions - fixed failure to compile - Moved IRQ_DOMAIN_MAP_* defines into irqdomain.c Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Milton Miller <miltonm@bga.com> Tested-by: Olof Johansson <olof@lixom.net>
| * irq_domain/powerpc: Use common irq_domain structure instead of irq_hostGrant Likely2012-02-141-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch drops the powerpc-specific irq_host structures and uses the common irq_domain strucutres defined in linux/irqdomain.h. It also fixes all the users to use the new structure names. Renaming irq_host to irq_domain has been discussed for a long time, and this patch is a step in the process of generalizing the powerpc virq code to be usable by all architecture. An astute reader will notice that this patch actually removes the irq_host structure instead of renaming it. This is because the irq_domain structure already exists in include/linux/irqdomain.h and has the needed data members. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Milton Miller <miltonm@bga.com> Tested-by: Olof Johansson <olof@lixom.net>
| * gpio: Add missing spin_lock_init in gpio-ml-ioh driverAxel Lin2012-02-011-0/+1
| | | | | | | | | | | | | | | | | | This bug was introduced by commit 54be5663 "gpio-ml-ioh: Support interrupt function" which adds a spinlock to struct ioh_gpio but never init the spinlock. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpio: Add missing spin_lock_init in gpio-pch driverAxel Lin2012-02-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | This bug was introduced by commit d568a681 "gpio-pch: add spinlock in suspend/resume processing" which adds a spinlock to struct pch_gpio but never init the spinlock. Reported-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * gpio: samsung: adapt to changes in gpio specifier translator function ↵Thomas Abraham2012-02-011-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | declaration Commit 15c9a0acc3f7 (of: create of_phandle_args to simplify return of phandle parsing data) modifies the parameter list of of_xlate function pointer declaration in gpio_chip. Adapt the gpio specifier translate function for this change. Reported-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Tested-by: Karol Lewandowski <k.lewandowsk@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * Correct bad gpio namingRoland Stigge2012-01-221-1/+1
| | | | | | | | | | | | | | | | One of the GPIO names in drivers/gpio/gpio-lpc32xx.c was bad. Renaming gpi000 -> gpio00 Signed-off-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | Merge branch 'for_3.4/gpio/runtime-pm-cleanup' of ↵Grant Likely2012-02-221-645/+461
|\ \ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into gpio/next
| * | gpio/omap: handle set_dataout reg capable IP on restoreNishanth Menon2012-02-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO IP revisions such as those used in OMAP4 have a set_dataout while the previous revisions used a single dataout register. Depending on what is available restore the dataout settings to the right register. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: restore OE only after setting the output levelNishanth Menon2012-02-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup the dataout register before restoring OE. This is to make sure that we have valid data in dataout register which would be made available in output pins as soon as OE is enabled. Else, there is risk of unknown data getting out into gpio pins. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: enable irq at the end of all configuration in restoreNishanth Menon2012-02-061-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: save and restore debounce registersNishanth Menon2012-02-061-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO debounce registers need to be saved and restored for proper functioning of driver. Signed-off-by: Nishanth Menon <nm@ti.com> tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce() as part of dynamic context save to remove overhead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: remove omap_gpio_save_context overheadTarun Kanti DebBarma2012-02-061-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Context is now saved dynamically in respective functions whenever and whichever registers are modified. This avoid overhead of saving all registers context in the runtime suspend callback. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: fix incorrect access of debounce moduleTarun Kanti DebBarma2012-02-061-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable debounce clock before writing/reading debounce registers. Disable the clock at the end so that it is synchronized with the pm_runtime_get/put_sync calls. Enable debounce clock per module. This call is mandatory because in omap_gpio_request() when *_runtime_get_sync() is called, _gpio_dbck_enable() within runtime callbck fails to turn on dbck because dbck_enable_mask used within _gpio_dbck_enable() is still not initialized at that point. Therefore we have to enable dbck here. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: fix debounce clock handlingTarun Kanti DebBarma2012-02-061-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dbck_enable_mask indicates which all GPIOs within a bank have debounce enabled and dbck is enabled/disabled based upon this. But there is no mechanism to track the dbck state. In order to manage the dbck state we need additional flag and logic so that turning off/on dbck is synchronized with pm_runtime_put/get_sync calls. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: cleanup prepare_for_idle and resume_after_idleTarun Kanti DebBarma2012-02-061-98/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since *_prepare_for_idle() and *_resume_after_idle() are called with interrupts disabled they should be kept as simple as possible. So, moving most of the stuff to *_runtime_suspend/resume() callbacks. To avoid invalid context restore happening in *_runtime_resume() callback as a result of *_get_sync() call in *_gpio_probe(), update bank->context_loss_count. This would make context restore condition check false in the callback and skip restore until further initialization take place. The workaround_enabled static variable is now a member of struct gpio_bank. Unlike most GPIO registers the OE has 0xffffffff as the default value. To make sure invalid context is not restored, updating the OE context with default value. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: optimize suspend and resume functionsTarun Kanti DebBarma2012-02-061-25/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to operate on all the banks every time the function is called. Just operate on the current bank passed by the framework. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: use pm-runtime frameworkTarun Kanti DebBarma2012-02-061-24/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put() for enabling/disabling clocks appropriately. Remove syscore_ops and instead use SET_RUNTIME_PM_OPS macro. There is no more need to call omap_device_disable_idle_on_suspend since driver is PM runtime adapted now. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: remove bank->method & METHOD_* macrosCharulatha V2012-02-061-32/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they need to be handled separately. Identify the same using a flag and remove all METHOD_* macros. mpuio_init() function is defined under #ifdefs. It is required only in case of MPUIO bank type and only when PM operations are supported by it. This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type. For all the other cases it is a dummy function. Hence clean up the same and remove all the OMAP SoC specific #ifdefs. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: remove unnecessary bit-masking for read accessTarun Kanti DebBarma2012-02-061-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: use pinctrl offset instead of macroCharulatha V2012-02-061-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: cleanup omap_gpio_mod_init functionTarun Kanti DebBarma2012-02-061-54/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With register offsets now defined for respective OMAP versions we can get rid of cpu_class_* checks. This function now has common initialization code for all OMAP versions. Initialization specific to OMAP16xx has been moved within omap16xx_gpio_init(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: cleanup set_gpio_triggering functionTarun Kanti DebBarma2012-02-061-114/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Getting rid of ifdefs within the function by adding register offset intctrl and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files. Also, use wkup_status register consistently instead of referring to wakeup clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in set_gpio_trigger() using irqctrl. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: remove hardcoded offsets in context save/restoreTarun Kanti DebBarma2012-02-061-22/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not required to use hard-coded offsets any more in context save and restore functions and instead use the generic offsets which have been correctly initialized during device registration. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: use level/edge detect reg offsetsTarun Kanti DebBarma2012-02-061-82/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By adding level and edge detection register offsets and then initializing them correctly according to OMAP versions during device registrations we can now remove lot of revision checks in these functions. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: further cleanup using wkup_en registerTarun Kanti DebBarma2012-02-061-89/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wakeup enable register offset initialized according to OMAP versions during device registration. Use this to avoid version checks. Starting with OMAP4, legacy registers should not be used in combination with the updated regsiters. Use wkup_en register consistently for all SoCs wherever applicable. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: avoid cpu checks during module ena/disableCharulatha V2012-02-061-30/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio request/free. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: make non-wakeup GPIO part of pdataCharulatha V2012-02-061-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making non_wakeup_gpios as part of pdata. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: handle save/restore context in GPIO driverTarun Kanti DebBarma2012-02-061-73/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions to handle save context & restore context respectively in the OMAP GPIO driver itself instead of calling these functions from pm specific files. For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in gpio_resume_after_idle() call it again. If the count is different, do restore context. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: make gpio_context part of gpio_bank structureCharulatha V2012-02-061-42/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently gpio_context array used to save gpio bank's context, is used only for OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it can be specific to each gpio bank and can be used for any OMAP architecture Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: use flag to identify wakeup domainCharulatha V2012-02-061-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1 is in wakeup domain. Instead of identifying bank's power domain by bank id, use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context() during dev_init. For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used. omap_device_get_pwrdm() could not be used as the pwrdm information needs to be filled in pdata, whereas omap_device_get_pwrdm() could be used only after omap_device_build() call. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * | gpio/omap: remove dependency on gpio_bank_countCharulatha V2012-02-061-83/+80
| |/ | | | | | | | | | | | | | | | | | | | | | | The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this dependency from the driver by using list. Also remove the dependency on array of pointers to gpio_bank struct of all GPIO devices. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* | gpio/gpio-pl061: No need of thaw and poweroff routines for hibernateViresh Kumar2012-02-161-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pl061 uses same routines for suspend/freeze/poweroff and resume/thaw/restore. We are only saving and restoring register values on these routines. During hibernation, in freeze() we take a snapshot of gpio registers. In thaw() we don't actually need to restore these registers, as power was never shut down till now. Similarly, in poweroff() we don't need to take snapshot of these registers again, as it was done during freeze() and by now the image is already saved on disk. This patch passes poweroff() and thaw() routines as NULL to avoid this extra work done. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | Fix circular locking dependency (3.3-rc2)Ming Lei2012-02-151-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hi, On Wed, Feb 8, 2012 at 8:41 PM, Felipe Balbi <balbi@ti.com> wrote: > Hi guys, > > I have just triggered the folllowing: > > [   84.860321] ====================================================== > [   84.860321] [ INFO: possible circular locking dependency detected ] > [   84.860321] 3.3.0-rc2-00026-ge4e8a39 #474 Not tainted > [   84.860321] ------------------------------------------------------- > [   84.860321] bash/949 is trying to acquire lock: > [   84.860321]  (sysfs_lock){+.+.+.}, at: [<c0275358>] gpio_value_store+0x24/0xcc > [   84.860321] > [   84.860321] but task is already holding lock: > [   84.860321]  (s_active#22){++++.+}, at: [<c016996c>] sysfs_write_file+0xdc/0x184 > [   84.911468] > [   84.911468] which lock already depends on the new lock. > [   84.911468] > [   84.920043] > [   84.920043] the existing dependency chain (in reverse order) is: > [   84.920043] > [   84.927886] -> #1 (s_active#22){++++.+}: > [   84.927886]        [<c008f640>] check_prevs_add+0xdc/0x150 > [   84.927886]        [<c008fc18>] validate_chain.clone.24+0x564/0x694 > [   84.927886]        [<c0090cdc>] __lock_acquire+0x49c/0x980 > [   84.951660]        [<c0091838>] lock_acquire+0x98/0x100 > [   84.951660]        [<c016a8e8>] sysfs_deactivate+0xb0/0x100 > [   84.962982]        [<c016b1b4>] sysfs_addrm_finish+0x2c/0x6c > [   84.962982]        [<c016b8bc>] sysfs_remove_dir+0x84/0x98 > [   84.962982]        [<c02590d8>] kobject_del+0x10/0x78 > [   84.974670]        [<c02c29e8>] device_del+0x140/0x170 > [   84.974670]        [<c02c2a24>] device_unregister+0xc/0x18 > [   84.985382]        [<c0276894>] gpio_unexport+0xbc/0xdc > [   84.985382]        [<c02768c8>] gpio_free+0x14/0xfc > [   85.001708]        [<c0276a28>] unexport_store+0x78/0x8c > [   85.001708]        [<c02c5af8>] class_attr_store+0x18/0x24 > [   85.007293]        [<c0169990>] sysfs_write_file+0x100/0x184 > [   85.018981]        [<c0109d48>] vfs_write+0xb4/0x148 > [   85.018981]        [<c0109fd0>] sys_write+0x40/0x70 > [   85.018981]        [<c0013cc0>] ret_fast_syscall+0x0/0x3c > [   85.035003] > [   85.035003] -> #0 (sysfs_lock){+.+.+.}: > [   85.035003]        [<c008f54c>] check_prev_add+0x680/0x698 > [   85.035003]        [<c008f640>] check_prevs_add+0xdc/0x150 > [   85.052093]        [<c008fc18>] validate_chain.clone.24+0x564/0x694 > [   85.052093]        [<c0090cdc>] __lock_acquire+0x49c/0x980 > [   85.052093]        [<c0091838>] lock_acquire+0x98/0x100 > [   85.069885]        [<c047e280>] mutex_lock_nested+0x3c/0x2f4 > [   85.069885]        [<c0275358>] gpio_value_store+0x24/0xcc > [   85.069885]        [<c02c18dc>] dev_attr_store+0x18/0x24 > [   85.087158]        [<c0169990>] sysfs_write_file+0x100/0x184 > [   85.087158]        [<c0109d48>] vfs_write+0xb4/0x148 > [   85.098297]        [<c0109fd0>] sys_write+0x40/0x70 > [   85.098297]        [<c0013cc0>] ret_fast_syscall+0x0/0x3c > [   85.109069] > [   85.109069] other info that might help us debug this: > [   85.109069] > [   85.117462]  Possible unsafe locking scenario: > [   85.117462] > [   85.117462]        CPU0                    CPU1 > [   85.128417]        ----                    ---- > [   85.128417]   lock(s_active#22); > [   85.128417]                                lock(sysfs_lock); > [   85.128417]                                lock(s_active#22); > [   85.142486]   lock(sysfs_lock); > [   85.151794] > [   85.151794]  *** DEADLOCK *** > [   85.151794] > [   85.151794] 2 locks held by bash/949: > [   85.158020]  #0:  (&buffer->mutex){+.+.+.}, at: [<c01698b8>] sysfs_write_file+0x28/0x184 > [   85.170349]  #1:  (s_active#22){++++.+}, at: [<c016996c>] sysfs_write_file+0xdc/0x184 > [   85.170349] > [   85.178588] stack backtrace: > [   85.178588] [<c001b824>] (unwind_backtrace+0x0/0xf0) from [<c008de64>] (print_circular_bug+0x100/0x114) > [   85.193023] [<c008de64>] (print_circular_bug+0x100/0x114) from [<c008f54c>] (check_prev_add+0x680/0x698) > [   85.193023] [<c008f54c>] (check_prev_add+0x680/0x698) from [<c008f640>] (check_prevs_add+0xdc/0x150) > [   85.212524] [<c008f640>] (check_prevs_add+0xdc/0x150) from [<c008fc18>] (validate_chain.clone.24+0x564/0x694) > [   85.212524] [<c008fc18>] (validate_chain.clone.24+0x564/0x694) from [<c0090cdc>] (__lock_acquire+0x49c/0x980) > [   85.233306] [<c0090cdc>] (__lock_acquire+0x49c/0x980) from [<c0091838>] (lock_acquire+0x98/0x100) > [   85.233306] [<c0091838>] (lock_acquire+0x98/0x100) from [<c047e280>] (mutex_lock_nested+0x3c/0x2f4) > [   85.242614] [<c047e280>] (mutex_lock_nested+0x3c/0x2f4) from [<c0275358>] (gpio_value_store+0x24/0xcc) > [   85.261840] [<c0275358>] (gpio_value_store+0x24/0xcc) from [<c02c18dc>] (dev_attr_store+0x18/0x24) > [   85.261840] [<c02c18dc>] (dev_attr_store+0x18/0x24) from [<c0169990>] (sysfs_write_file+0x100/0x184) > [   85.271240] [<c0169990>] (sysfs_write_file+0x100/0x184) from [<c0109d48>] (vfs_write+0xb4/0x148) > [   85.290008] [<c0109d48>] (vfs_write+0xb4/0x148) from [<c0109fd0>] (sys_write+0x40/0x70) > [   85.298400] [<c0109fd0>] (sys_write+0x40/0x70) from [<c0013cc0>] (ret_fast_syscall+0x0/0x3c) > -bash: echo: write error: Operation not permitted > > the way to trigger is: > > root@legolas:~# cd /sys/class/gpio/ > root@legolas:/sys/class/gpio# echo 2 > export > root@legolas:/sys/class/gpio# echo 2 > unexport > root@legolas:/sys/class/gpio# echo 2 > export > root@legolas:/sys/class/gpio# cd gpio2/ > root@legolas:/sys/class/gpio/gpio2# echo 1 > value Looks 'sysfs_lock' needn't to be held for unregister, so the patch below may fix the problem. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | gpio: tps65910: Add sleep control supportLaxman Dewangan2012-02-051-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tps65910/tps65911 supports the sleep functionality in some of gpios. If gpio is configured in output mode and sleep is enabled then during device sleep state, the output of gpio becomes LOW regardless of non-sleep output value. Such gpio can be used to control regulator switch such that output of regulator is off in device sleep state. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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