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* EDAC/mce/amd: Unexport amd_decode_mce()Borislav Petkov2017-01-241-1/+0
| | | | | | | | | | | | | | It is not used outside of the driver anymore. Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Yazen Ghannam <Yazen.Ghannam@amd.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20170123183514.13356-7-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
* x86, mce, severity: Extend the the mce_severity mechanism to handle ↵Chen Yucong2014-11-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | UCNA/DEFERRED error Until now, the mce_severity mechanism can only identify the severity of UCNA error as MCE_KEEP_SEVERITY. Meanwhile, it is not able to filter out DEFERRED error for AMD platform. This patch extends the mce_severity mechanism for handling UCNA/DEFERRED error. In order to do this, the patch introduces a new severity level - MCE_UCNA/DEFERRED_SEVERITY. In addition, mce_severity is specific to machine check exception, and it will check MCIP/EIPV/RIPV bits. In order to use mce_severity mechanism in non-exception context, the patch also introduces a new argument (is_excp) for mce_severity. `is_excp' is used to explicitly specify the calling context of mce_severity. Reviewed-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Signed-off-by: Chen Yucong <slaoub@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* EDAC, MCE, AMD: Remove unneeded exportsBorislav Petkov2013-01-221-7/+2
| | | | | | | | | | | | Initially, those strings describing different parts of an MCE message were shared with amd64_edac and were therefore exported to modules. However, all except pp_msgs are used only in one place right now so hide them and make them static. No functionality change. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Borislav Petkov <bp@alien8.de>
* EDAC, MCE, AMD: Add MCE decoding support for Family 16hJacob Shin2013-01-221-0/+3
| | | | | | | | | | | | Add MCE decoding logic for AMD Family 16h processors. Boris: - drop unneeded uu_msgs export - exit early in cat_mc1_mce and save us an indentation level Signed-off-by: Jacob Shin <jacob.shin@amd.com> Signed-off-by: Borislav Petkov <bp@alien8.de>
* EDAC, MCE, AMD: Make MC2 decoding per-familyJacob Shin2013-01-221-0/+1
| | | | | | | | | Currently only AMD Family 15h processors have special handling for MC2 errors. Since upcoming Family 16h will also need unique handling, let's make MC2 handling part of amd_decoder_ops. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Signed-off-by: Borislav Petkov <bp@alien8.de>
* MCE, AMD: Dump error statusBorislav Petkov2012-11-281-4/+2
| | | | | | | Dump error status after decoding the error which describes the error disposition. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* MCE, AMD: Remove functional unit referencesBorislav Petkov2012-11-281-3/+2
| | | | | | | | | | | | | Having the functional unit names in each bank decode is only misleading as this code supports multiple families and there's no guarantee the mapping between FUs and MCE banks will stay the same. And also, knowing the functional unit name doesn't help much since you end up looking at the respective BKDG anyway. So drop all FU references and use the MC bank numbers instead. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* x86/bitops: Move BIT_64() for a wider useBorislav Petkov2012-05-231-2/+0
| | | | | | | | | | | | | Needed for shifting 64-bit values on 32-bit, like MSR values, for example. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Frank Arnold <frank.arnold@amd.com> Link: http://lkml.kernel.org/r/1337684026-19740-1-git-send-email-bp@amd64.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
* MCE, AMD: Constify error tablesBorislav Petkov2012-03-191-6/+6
| | | | | | | ... so that checkpatch can chill out. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Rework NB MCE signaturesBorislav Petkov2012-03-191-1/+0
| | | | | | | | Correct their formulation, replace per-family functions with a single, unified lookup table. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* EDAC, MCE, AMD: Simplify NB MCE decoder interfaceBorislav Petkov2011-10-061-3/+3
| | | | | | | | Drop third nbcfg argument which is old remains and not required anymore. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Simplify decoding pathBorislav Petkov2011-03-171-12/+0
| | | | | | | | | Use the struct mce directly instead of copying from it into a custom struct err_regs. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup NBSH cruftBorislav Petkov2011-03-171-13/+5
| | | | | | | | | Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Overhaul error fields extraction macrosBorislav Petkov2011-01-071-5/+5
| | | | | | Make macro names shorter thus making code shorter and more clear. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h IC MCE decoderBorislav Petkov2011-01-071-1/+1
| | | | | | Add support for decoding F15h IC MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h DC MCE decoderBorislav Petkov2011-01-071-1/+1
| | | | | | | Add a decoder for F15h DC MCEs to support the new types of DC MCEs introduced by the BD microarchitecture. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add a BIT_64() macroBorislav Petkov2010-10-211-0/+2
| | | | | | Add a macro for 64-bit vectors to use when accessing MSR contents. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Complete NB MCE decodersBorislav Petkov2010-10-211-2/+1
| | | | | | | Add support for decoding F14h BU MCEs and improve decoding of the remaining families. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Adjust IC decoders to F14hBorislav Petkov2010-10-211-0/+1
| | | | | | | Add support for IC MCEs for F14h CPUs. K8 and F10h are almost identical so use one function for both. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Adjust DC decoders to F14hBorislav Petkov2010-10-211-0/+40
| | | | | | | | Add a per-family data cache decoders. Since there is a certain overlap between the different DC MCE signatures, reuse functionality between the families as far as possible. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Rename filesBorislav Petkov2010-10-211-0/+72
Drop "edac_" string from the filenames since they're prefixed with edac/ in their pathname anyway. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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