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path: root/drivers/edac/mce_amd.c
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* MCE, AMD: Drop too granulary family model checksBorislav Petkov2012-04-041-4/+2
| | | | | | | | | | MCA details seldom change inbetween the models of a family so don't be too conservative and enable decoding on everything starting from K8 onwards. Minor adjustments can come in later but most importantly, we have some decoding infrastructure in place for upcoming models by default. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* MCE, AMD: Constify error tablesBorislav Petkov2012-03-191-7/+7
| | | | | | | ... so that checkpatch can chill out. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Correct bank 5 error signaturesBorislav Petkov2012-03-191-4/+1
| | | | | | | ... and remove superfluous ErrorCodeExt check. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Rework NB MCE signaturesBorislav Petkov2012-03-191-128/+48
| | | | | | | | Correct their formulation, replace per-family functions with a single, unified lookup table. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Correct VB data error descriptionBorislav Petkov2012-03-191-1/+1
| | | | | | | Sync with latest BKDG error types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Correct ucode patch buffer descriptionBorislav Petkov2012-03-191-2/+6
| | | | | | | This MC1 error signature is called differently now, fix it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* MCE, AMD: Correct some MC0 error typesBorislav Petkov2012-03-191-3/+2
| | | | | | | | Use "System Read Data Error" as a more general name for MC0 bus errors on F15h and update some error definitions. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Reviewed-by: Andreas Herrmann <andreas.herrmann3@amd.com>
* x86, mce: Add wrappers for registering on the decode chainBorislav Petkov2011-12-141-2/+2
| | | | | | | No functionality change, this is done so that in a follow-on patch all queued-up MCEs can be decoded after registering on the chain. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE, AMD: Simplify NB MCE decoder interfaceBorislav Petkov2011-10-061-10/+10
| | | | | | | | Drop third nbcfg argument which is old remains and not required anymore. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE, AMD: Drop local coreid reportingBorislav Petkov2011-10-061-19/+1
| | | | | | | | | MCE decoding code is reporting the core which encountered the error unconditionally now so drop this piece. Besides, it reported the coreid in the local processor package which is not that valuable as a datapoint. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE, AMD: Print valid addr when reporting an errorBorislav Petkov2011-10-061-1/+3
| | | | | | | | | The MCi_STATUS bank has a AddrV bit which, when set, denotes that the corresponding MCi_ADDR MSR contains a valid address belonging to the MCE currently being reported. Dump it since it is definitely relevant information. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE, AMD: Print CPU number when reporting the errorBorislav Petkov2011-10-061-2/+2
| | | | | | | | | Currently, correctable ECCs go through mcelog and do not print the scary MCE banner. In that case, however, reporting the core where the CECC happened is important information so dump it along with the decoded string albeit at risk of having a minor redundancy. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Enable driver on F15hBorislav Petkov2011-03-171-3/+3
| | | | | | | | | Add the PCI device ids required for driver registration. Remove pvt->ctl_name and use the family descriptor directly, instead. Then, bump driver version and fixup its format. Finally, enable DRAM ECC decoding on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup NBSH cruftBorislav Petkov2011-03-171-1/+1
| | | | | | | | | Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Fix NB error formattingBorislav Petkov2011-01-071-7/+10
| | | | | | | Minor formatting fixup since the information which core was associated with the MCE is not always valid. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Use BIT_64() to eliminate warnings on 32-bitRandy Dunlap2011-01-071-2/+2
| | | | | | | | | | | | | Building for X86_32 produces shift count warnings, so use BIT_64() to eliminate the warnings. drivers/edac/mce_amd.c:778: warning: left shift count >= width of type drivers/edac/mce_amd.c:778: warning: left shift count >= width of type Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Doug Thompson <dougthompson@xmission.com> Cc: bluesmoke-devel@lists.sourceforge.net Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Enable MCE decoding on F15hBorislav Petkov2011-01-071-6/+8
| | | | | | | Now that everything is inplace, enable MCE decoding on F15h. Make initcall routine a bit more readable. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Shorten error report formattingBorislav Petkov2011-01-071-22/+32
| | | | | | | Shorten up MCi_STATUS flags and add BD's new deferred and poison types. Also, simplify formatting. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Overhaul error fields extraction macrosBorislav Petkov2011-01-071-47/+36
| | | | | | Make macro names shorter thus making code shorter and more clear. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h FP MCE decoderBorislav Petkov2011-01-071-0/+44
| | | | | | Add decoder for FP MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15 EX MCE decoderBorislav Petkov2011-01-071-7/+34
| | | | | | | Integrate the single FIROB signature into an expanded table along with the new BD MCE types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add an F15h NB MCE decoderBorislav Petkov2011-01-071-0/+10
| | | | | | by (almost) reusing the F10h one since the signatures are the same. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: No F15h LS MCE decoderBorislav Petkov2011-01-071-1/+1
| | | | | | F15h BD doesn't generate LS MCEs so warn about it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h CU MCE decoderBorislav Petkov2011-01-071-1/+61
| | | | | | | MCE bank 2 is redefined from a BU to a CU (Combined Unit) bank on F15h. Add a decoder function for CU MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h IC MCE decoderBorislav Petkov2011-01-071-3/+50
| | | | | | Add support for decoding F15h IC MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F15h DC MCE decoderBorislav Petkov2011-01-071-18/+61
| | | | | | | Add a decoder for F15h DC MCEs to support the new types of DC MCEs introduced by the BD microarchitecture. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Select extended error code maskBorislav Petkov2011-01-071-4/+9
| | | | | | | | F15h enlarges the extended error code of an MCE to a 5-bit field (MCi_STATUS[20:16]). Add a mask variable which default 0xf is overridden on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Fix shift warning on 32-bitBorislav Petkov2010-10-211-1/+1
| | | | | | | | | | | Fix drivers/edac/mce_amd.c:262: warning: left shift count >= width of type on 32-bit builds. Reported-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Enable MCE decoding on F12hBorislav Petkov2010-10-211-1/+1
| | | | | | Turn on MCE decoding on F12h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F12h NB MCE decoderBorislav Petkov2010-10-211-2/+3
| | | | | | F12h is completely covered by the generic path. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F12h IC MCE decoderBorislav Petkov2010-10-211-0/+1
| | | | | | ... which is the same as for K8 and F10h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add F12h DC MCE decoderBorislav Petkov2010-10-211-7/+17
| | | | | | F12h DC MCE signatures are a subset of F10h's so reuse them. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Add support for F11h MCEsBorislav Petkov2010-10-211-3/+12
| | | | | | | F11h has almost the same MCE signatures as K8 except DRAM ECC and MC5 bank errors. Reuse functionality from the other families. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Enable MCE decoding on F14hBorislav Petkov2010-10-211-4/+5
| | | | | | | | Now that all decoders have been taught about F14h, models < 0x10 MCEs, enable decoding on this family of CPUs. Also, issue a short informational message upon boot that MCE decoding gets enabled. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Fix FR MCEs decodingBorislav Petkov2010-10-211-4/+10
| | | | | | Those are N/A on K8, so don't decode them there. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Complete NB MCE decodersBorislav Petkov2010-10-211-53/+157
| | | | | | | Add support for decoding F14h BU MCEs and improve decoding of the remaining families. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Warn about LS MCEs on F14hBorislav Petkov2010-10-211-5/+13
| | | | | | | F14h CPUs do not generate LS MCEs so exit early and warn the user in case this path is ever hit that something else might be going haywire. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Adjust IC decoders to F14hBorislav Petkov2010-10-211-48/+70
| | | | | | | Add support for IC MCEs for F14h CPUs. K8 and F10h are almost identical so use one function for both. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Adjust DC decoders to F14hBorislav Petkov2010-10-211-27/+131
| | | | | | | | Add a per-family data cache decoders. Since there is a certain overlap between the different DC MCE signatures, reuse functionality between the families as far as possible. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC, MCE: Rename filesBorislav Petkov2010-10-211-0/+414
Drop "edac_" string from the filenames since they're prefixed with edac/ in their pathname anyway. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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