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* dmaengine: st_fdma: use dmaenginem_async_device_register to simplify the codeHuang Shijie2018-08-291-5/+2
| | | | | | | | | Use dmaenginem_async_device_register to simplify the code: remove dma_async_device_unregister. remove label err_dma_dev Signed-off-by: Huang Shijie <sjhuang@iluvatar.ai> Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: st_fdma: Fix the error return code in st_fdma_probe()Wei Yongjun2016-10-191-1/+1
| | | | | | | | | | In case of error, the function st_slim_rproc_alloc() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: st_fdma: fix uninitialized variable accessArnd Bergmann2016-10-191-12/+2
| | | | | | | | | | | | | | | | | | | | | | The newly added st_fdma driver introduces a build warning for allmodconfig when we add '-Wmaybe-uninitialized': drivers/dma/st_fdma.c: In function 'st_fdma_probe': drivers/dma/st_fdma.c:777:5: error: 'ret' may be used uninitialized in this function [-Werror=maybe-uninitialized] The warning is correct, though this can't happen in practice as the check is redundant (we don't get to this function if the pointer is NULL). Even if the function were called with a NULL of_node, the check is not needed because of_property_read_u32 can deal with a NULL argument by returning an error. Removing the unnecessary code simplifies the function and avoids the condition that we get the warning for. Fixes: 6b4cd727eaf1 ("dmaengine: st_fdma: Add STMicroelectronics FDMA engine driver support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: st_fdma: Add STMicroelectronics FDMA engine driver supportPeter Griffin2016-10-181-0/+899
This patch adds support for the Flexible Direct Memory Access (FDMA) core driver. The FDMA is a slim core CPU with a dedicated firmware. It is a general purpose DMA controller capable of supporting 16 independent DMA channels. Data moves maybe from memory to memory or between memory and paced latency critical real time targets and it is found on al STi based chipsets. Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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