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path: root/drivers/clk/ux500/clk.h
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* clk: ux500: Remove clk.h and clkdev.h includesStephen Boyd2015-07-201-1/+2
| | | | | | | | | | | Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Remove the include here because this is a provider driver. Also remove clkdev.h in files that aren't using it. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: ux500: fix mismatched typesMike Turquette2013-04-221-2/+3
| | | | | | | | | | | | | | | As reported by Rob Herring[1] there were some mismatched types between drivers/clk/ux500/clk.h and the corresponding function definitions: drivers/clk/ux500/clk-prcc.c:145:13: error: conflicting types for 'clk_reg_prcc_pclk' drivers/clk/ux500/clk-prcc.c:155:13: error: conflicting types for 'clk_reg_prcc_kclk' [1] http://article.gmane.org/gmane.linux.ports.arm.kernel/232246 Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Rob Herring <robherring2@gmail.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org>
* clk: ux500: Add support for sysctrl clocksUlf Hansson2013-04-101-0/+29
| | | | | | | | | | | | The abx500 sysctrl clocks are using the ab8500 sysctrl driver to modify the clock hardware. Sysctrl clocks are represented by a ab8500 sysctrl register and with a corresponding bitmask. The sysctrl clocks are slow path clocks, which means clk_prepare and clk_unprepare will be used to gate|ungate these clocks. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: ux500: Support for prcmu_scalable_rate clockUlf Hansson2012-11-091-0/+6
| | | | | | | | The prcmu_scalable_rate clock can change rate but is not gateable. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: ux500: Support prcmu ape opp voltage clockUlf Hansson2012-10-291-0/+6
| | | | | | | | | | Some scalable prcmu clocks needs to be handled in conjuction with the ape opp 100 voltage. A new prcmu clock type clk_prcmu_opp_volt_scalable is implemented to handle this. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: ux500: Support for prmcu_rate clockUlf Hansson2012-09-061-0/+5
| | | | | | | | | The prmcu_rate clock is not gateable and has a rate which only can be fetched. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: ux500: Adapt PRCMU and PRCC clocks for common clkUlf Hansson2012-09-061-0/+43
First version of common clock implementation of PRCMU clocks and PRCC clocks for ux500 platforms. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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