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* modules: make arch's use default loader hooksJonas Bonn2011-07-2426-777/+12
| | | | | | | | | | | | This patch removes all the module loader hook implementations in the architecture specific code where the functionality is the same as that now provided by the recently added default hooks. Signed-off-by: Jonas Bonn <jonas@southpole.se> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
* Merge branch 'for-linus' of ↵Linus Torvalds2011-07-23114-2138/+1733
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (43 commits) Blackfin: spi-docs: further clarify GPIO CS behavior with various modes Blackfin: boards: fix pcm device name Blackfin: SMP: punt unused atomic_test_mask helper Blackfin: irqs: do not trace arch_local_{*,irq_*} functions Blackfin: bf526: restrict reboot workaround to 0.0 silicon Blackfin: bf51x: fix alternative portmux options Blackfin: bf54x: fix GPIO resume code Blackfin: dpmc: optimize SDRAM programming slightly Blackfin: dpmc: don't save/restore scratch registers Blackfin: bf538: pull gpio/port logic out of core hibernate paths Blackfin: dpmc: optimize hibernate/resume path Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernating Blackfin: dpmc: relocate hibernate helper macros Blackfin: dpmc: omit RETE/RETN when hibernating Blackfin: dpmc: optimize SIC_IWR programming a little Blackfin: gpio/ints: generalize pint logic Blackfin: dpmc: bind to MMR names and not CPUs Blackfin: debug-mmrs: generalize pint logic Blackfin: bf54x: switch to common pint MMR struct Blackfin: bf54x: tweak MMR pint names ...
| * Blackfin: boards: fix pcm device nameScott Jiang2011-07-232-11/+56
| | | | | | | | | | | | | | The pcm driver name has been changed, but the device name has not. Signed-off-by: Scott Jiang <scott.jiang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: SMP: punt unused atomic_test_mask helperMike Frysinger2011-07-231-5/+0
| | | | | | | | | | | | No one uses this func, so just punt it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: irqs: do not trace arch_local_{*,irq_*} functionsSteven Rostedt2011-07-231-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526: restrict reboot workaround to 0.0 siliconMike Frysinger2011-07-231-1/+3
| | | | | | | | | | | | | | The bug in the BF526 rom when doing a software reset exists only in older silicon versions, so don't clear SWRST on newer parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf51x: fix alternative portmux optionsMike Frysinger2011-07-232-45/+87
| | | | | | | | | | | | | | | | | | The BF51x's alternative portmux Kconfig options were copy & pasted from the BF52x, but never tweaked to reflect it. So drop the old options as they were never used (and were simply wrong), and add the BF51x specific pieces to the Kconfig and header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: fix GPIO resume codeMike Frysinger2011-07-231-2/+2
| | | | | | | | | | | | | | | | | | Back in commit c03c2a87347b849ec927d, we fixed logic in the non-bf54x GPIO resume code to set the data levels properly before the direction to avoid spurious line glitches. But we missed the bf54x code paths. So add the same fix there. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize SDRAM programming slightlyMike Frysinger2011-07-231-9/+10
| | | | | | | | | | | | | | No need to reload these registers constantly since they're always available (we're not making any function calls in between). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: don't save/restore scratch registersMike Frysinger2011-07-231-6/+6
| | | | | | | | | | | | | | The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2 as they are available as scratch registers. So don't bother. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf538: pull gpio/port logic out of core hibernate pathsMike Frysinger2011-07-235-36/+65
| | | | | | | | | | | | | | | | Re-architect how we save/restore the gpio/port logic that only pertains to bf538/bf539 parts by pulling it out of the core code paths and pushing it out to bf538-specific locations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize hibernate/resume pathMike Frysinger2011-07-232-439/+572
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: do not save/restore EVT0/EVT1/EVT4 when hibernatingMike Frysinger2011-07-231-6/+0
| | | | | | | | | | | | | | | | | | | | EVT0 is for emulation, EVT1 is for reset, and EVT4 is the "global int disable" region. None of these are used by software (or even hardware), so don't bother saving/restoring them when we hibernate since nothing ever uses these in Linux (the only thing they would be useful for is core-memory scratch, but that's just crazy talk). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: relocate hibernate helper macrosMike Frysinger2011-07-232-26/+24
| | | | | | | | | | | | | | This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: omit RETE/RETN when hibernatingMike Frysinger2011-07-231-4/+0
| | | | | | | | | | | | | | | | The RETE/RETN registers are only used in emulation(JTAG) and NMI nodes, or as scratch registers, neither of which need to be saved/restored as this code doesn't execute at those core event levels. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: optimize SIC_IWR programming a littleMike Frysinger2011-07-231-9/+6
| | | | | | | | | | | | | | For parts with more than one SIC_IWR, we can optimize the writing a little bit using better Blackfin insns. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gpio/ints: generalize pint logicMike Frysinger2011-07-233-12/+19
| | | | | | | | | | | | | | | | Have the logic that uses peripheral interrupt blocks key off of pint defines rather than CPU names so that things are generalized across families. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: dpmc: bind to MMR names and not CPUsMike Frysinger2011-07-231-4/+3
| | | | | | | | | | | | | | Have the code work off of MMR names rather than CPU defines so there is less code to tweak in the future with new parts. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: generalize pint logicMike Frysinger2011-07-231-19/+31
| | | | | | | | | | | | Don't bind the code to specific CPU defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: switch to common pint MMR structMike Frysinger2011-07-231-18/+5
| | | | | | | | | | | | | | We have a struct in the headers describing the register layout, so drop the local duplicate one. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: tweak MMR pint namesMike Frysinger2011-07-232-2/+2
| | | | | | | | | | | | | | The hardware block uses the name "request" rather than "irq", so update the struct accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf54x: constify pint register arrayMike Frysinger2011-07-231-1/+1
| | | | | | | | | | | | The array of pointers to register blocks never changes, so constify it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gpio: punt unused GPIO_# definesMike Frysinger2011-07-232-52/+3
| | | | | | | | | | | | | | | | These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert unicode space gremlinsMike Frysinger2011-07-237-27/+27
| | | | | | | | | | | | | | | | Not sure how these guys slipped in, but they're annoying me. So bring these unicode space gremlins down to earth to normal ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: pwm: implement linux/pwm.h APIMike Frysinger2011-07-233-0/+111
| | | | | | | | | | | | | | | | For now, this only supports gptimers. Support for dedicated PWM devices as found on newer parts to come. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: add enable/disable by timer idMike Frysinger2011-07-231-0/+10
| | | | | | | | | | | | | | The API is geared around timer ids, except for the act of enabling and disabling timers. So add a small helper to fill out the gap. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: make sure percpu section is aligned in XIP buildsSteven Miao2011-07-231-0/+1
| | | | | | | | | | | | | | | | The alignment is normally handled by PERCPU(), but we need to do it ourselves in the XIP build due to the custom layout. Signed-off-by: Steven Miao <realmz6@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: use bfin read/write helpersMike Frysinger2011-07-231-20/+25
| | | | | | | | | | | | | | Use proper helper macros for reading/writing the MMRs rather than volatile markings on the struct. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: use register structs from common headerMike Frysinger2011-07-231-32/+16
| | | | | | | | | | | | | | Now that asm/gptimers.h has the hardware register struct layout, there's no need to duplicate things locally. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: use new gptimer_group layout to simplify codeMike Frysinger2011-07-231-18/+34
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: prevent macro arg from expandingMike Frysinger2011-07-231-1/+1
| | | | | | | | | | | | | | Passing a non-simple expression in as the addr arg could incorrectly apply the pointer cast resulting in misbehavior. Add proper paren. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: gptimers: add group structure for hardware register layoutMike Frysinger2011-07-231-0/+9
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: exec: remove redundant set_fs(USER_DS)Mathias Krause2011-07-231-1/+0
| | | | | | | | | | | | | | | | The address limit is already set in flush_old_exec() so this set_fs(USER_DS) is redundant. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: update anomaly lists to latest public infoMike Frysinger2011-07-237-211/+290
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf561-ezkit: change parallel flash from M to Y in defconfigMike Frysinger2011-07-231-4/+4
| | | | | | | | | | | | | | These flashes are always on the board, so might as well enable them by default rather than a module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: disable PERIPHERAL_MAP for IMDMA channelsMike Frysinger2011-07-231-1/+2
| | | | | | | | | | | | | | | | The documentation for the IMDMA channels appears to be incorrect. These DMA blocks don't actually have PERIPHERAL_MAP MMRs for us to access. Attempts to do so lead to system mmr hardware errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: debug-mmrs: fix typo in single dmac setupMike Frysinger2011-07-231-1/+1
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert to asm-generic/mutex-dec.h for all systemsMike Frysinger2011-07-231-76/+1
| | | | | | | | | | | | | | The Blackfin mutex.h is merely a copy of an older asm-generic/mutex-dec.h, so punt it and just use the common one directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: optimize double fault boot checkingMike Frysinger2011-07-236-63/+62
| | | | | | | | | | | | | | | | This moves the double fault data used at boot time into a single struct which can then easily be addressed with indexed loads rather than having to explicitly load multiple addresses. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: time: replace magic numbers with definesMike Frysinger2011-07-231-2/+2
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: SMP: optimize start up code a bitMike Frysinger2011-07-231-78/+54
| | | | | | | | | | | | | | This just imports all of the optimization work done in the common startup code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: boards: clean up redundant/dead spi resourcesMike Frysinger2011-07-2326-896/+0
| | | | | | | | | | | | | | | | | | | | | | | | The default for the Blackfin SPI driver is 8 bits and dma disabled, so many of the bfin5xx_spi_chip resources are redundant. So punt those parts. Further, drivers should themselves be declaring 16 bit transfers, so for those that do, and for the ones which no longer do 16 bit transfers, drop the bfin5xx_spi_chip resources. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: net2272: move pin setup to boards filesMike Frysinger2011-07-238-0/+192
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: convert to kbuild asm-generic supportMike Frysinger2011-07-2343-47/+43
| | | | | | | | | | | | No need for one line header stubs. Just declare it in Kbuild. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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*-----------. \ Merge branches 'x86-detect-hyper-for-linus', 'x86-fpu-for-linus', ↵Linus Torvalds2011-07-238-33/+45
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'x86-kexec-for-linus', 'x86-platform-for-linus', 'x86-quirks-for-linus', 'x86-tsc-for-linus' and 'x86-smpboot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-detect-hyper-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, hyper: Change hypervisor detection order * 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86-32, fpu: Fix DNA exception during check_fpu() * 'x86-kexec-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: kexec, x86: Fix incorrect jump back address if not preserving context * 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, config: Introduce an INTEL_MID configuration * 'x86-quirks-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, quirks: Use pci_dev->revision * 'x86-tsc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: tsc: Remove unneeded DMI-based blacklisting * 'x86-smpboot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, boot: Wait for boot cpu to show up if nr_cpus limit is about to hit
| | | | | | | * | x86, boot: Wait for boot cpu to show up if nr_cpus limit is about to hitVivek Goyal2011-07-081-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nr_cpus allows one to specify number of possible cpus in the system. Current assumption seems to be that first cpu to show up is boot cpu and this assumption will be broken in kdump scenario where we can be booting on a non boot cpu with nr_cpus=1. It might happen that first cpu we parse is not the cpu we boot on and later we ignore boot cpu. Though code later seems to recognize this anomaly and forcibly sets boot cpu in physical cpu map with following warning. if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) { printk(KERN_WARNING "weird, boot CPU (#%d) not listed by the BIOS.\n", hard_smp_processor_id()); physid_set(hard_smp_processor_id(), phys_cpu_present_map); } This patch waits for boot cpu to show up and starts ignoring the cpus once we have hit (nr_cpus - 1) number of cpus. So effectively we are reserving one slot out of nr_cpus for boot cpu explicitly. Signed-off-by: Vivek Goyal <vgoyal@redhat.com> Acked-by: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/20110708171926.GF2930@redhat.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| | | | | | * | | x86: tsc: Remove unneeded DMI-based blacklistingTero Roponen2011-05-311-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The blacklist was added in response to my bug report (http://lkml.org/lkml/2006/1/19/362) and has never contained more than the one entry describing my old now dead ThinkPad 380XD laptop. As found out later (http://lkml.org/lkml/2007/11/29/50), this special treatment has been unnecessary for a long time, so it can be removed. Signed-off-by: Tero Roponen <tero.roponen@gmail.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
| | | | | * | | | x86, quirks: Use pci_dev->revisionSergei Shtylyov2011-07-211-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code uses PCI_CLASS_REVISION instead of PCI_REVISION_ID, so it wasn't converted by commit 44c10138fd4bbc ("PCI: Change all drivers to use pci_device->revision") before being moved to arch/x86/... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Dave Jones <davej@redhat.com> Link: http://lkml.kernel.org/r/201107111901.39281.sshtylyov@ru.mvista.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | | | * | | | | x86, config: Introduce an INTEL_MID configurationAlan Cox2011-07-211-2/+13
| | | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to carve up the configuration between: - MID general - Moorestown specific - Medfield specific - Future devices As a base point create an INTEL_MID configuration property. We make the existing MRST configuration a sub-option. This means that the rest of the kernel config can still use X86_MRST checks without anything going backwards. After this is merged future patches will tidy up which devices are MID and which are X86_MRST, as well as add options for Medfield. Signed-off-by: Alan Cox <alan@linux.intel.com> Link: http://lkml.kernel.org/r/20110712164859.7642.84136.stgit@bob.linux.org.uk Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | | * | | | | kexec, x86: Fix incorrect jump back address if not preserving contextHuang Ying2011-07-212-0/+4
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In kexec jump support, jump back address passed to the kexeced kernel via function calling ABI, that is, the function call return address is the jump back entry. Furthermore, jump back entry == 0 should be used to signal that the jump back or preserve context is not enabled in the original kernel. But in the current implementation the stack position used for function call return address is not cleared context preservation is disabled. The patch fixes this bug. Reported-and-tested-by: Yin Kangkai <kangkai.yin@intel.com> Signed-off-by: Huang Ying <ying.huang@intel.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: <stable@kernel.org> Link: http://lkml.kernel.org/r/1310607277-25029-1-git-send-email-ying.huang@intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
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