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* [PATCH] for_each_possible_cpu: sparc64KAMEZAWA Hiroyuki2006-04-113-5/+5
| | | | | | | | | | | | | | | | | | for_each_cpu() actually iterates across all possible CPUs. We've had mistakes in the past where people were using for_each_cpu() where they should have been iterating across only online or present CPUs. This is inefficient and possibly buggy. We're renaming for_each_cpu() to for_each_possible_cpu() to avoid this in the future. This patch replaces for_each_cpu with for_each_possible_cpu. for sparc64. Signed-off-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Acked-by: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] for_each_possible_cpu: sparcKAMEZAWA Hiroyuki2006-04-111-1/+1
| | | | | | | | | | | | | | | | | for_each_cpu() actually iterates across all possible CPUs. We've had mistakes in the past where people were using for_each_cpu() where they should have been iterating across only online or present CPUs. This is inefficient and possibly buggy. We're renaming for_each_cpu() to for_each_possible_cpu() to avoid this in the future. This patch replaces for_each_cpu with for_each_possible_cpu. Signed-off-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Acked-by: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] arch/i386/mach-voyager/voyager_cat.c: named initializersAdrian Bunk2006-04-111-2/+8
| | | | | | | | | | | | | | This patch switches arch/i386/mach-voyager/voyager_cat.c to using named initializers for struct resource. Besides a fixing compile error in Greg's tree, it makes the code more readable. Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-04-1015-125/+72
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3473/1: Use numbers 0-15 for the VFP double registers [ARM] 3472/1: Use the D variants of FLDMIA/FSTMIA on ARMv6 [ARM] 3471/1: FTOSI functions should return 0 for NaN [ARM] 3470/1: Clear the HWCAP bits for the disabled kernel features [ARM] 3469/1: S3C24XX: clkout missing hclk selector [ARM] 3468/1: S3C2410: SMDK common include fix [ARM] 3461/1: ARM: OMAP: Fix clk_get() when using id and name [ARM] 3460/1: ARM: OMAP: Remove unnecessary nop_release() [ARM] 3459/1: ixp23xx: fix debug serial macros for big-endian operation [ARM] Allow decompressor to be built with -ffunction-sections [ARM] Fix SA110/SA1100 cache flushing [ARM] ebsa110: Fix incorrect serial port address [ARM] Fix ebsa110 debug macros [ARM] Move FLUSH_BASE macros to asm/arch/memory.h [ARM] Remove unnecessary extra parens in include/asm-arm/memory.h [ARM] arm's arch_local_page_offset() fix against 2.6.17-rc1
| * [ARM] 3473/1: Use numbers 0-15 for the VFP double registersCatalin Marinas2006-04-103-17/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas This patch changes the double registers numbering to 0-15 from even 0-30, in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO bug (value 16 actually represents the 8th double register with the original numbering). The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of FMRRD/FMDRR. The patch changes to CP11 for the correct instructions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3471/1: FTOSI functions should return 0 for NaNCatalin Marinas2006-04-102-3/+13
| | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas The NaN case was dealed with by the "exponent >= ... + 32" condition but it was not setting the value "d" to 0. Signed-off-by: Ken'ichi Kuromusha <musha@aplix.co.jp> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3470/1: Clear the HWCAP bits for the disabled kernel featuresCatalin Marinas2006-04-101-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas Glibc interprets the HWCAP bits and decides on what features to use. However, even if the features are present in the hardware, they are not always supported by the kernel and hence the corresponding bits have to be cleared from the elf_hwcap variable. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3469/1: S3C24XX: clkout missing hclk selectorBen Dooks2006-04-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | Patch from Ben Dooks The clkout0/1 output parent code is missing the HCLK option, and does not set clk->parent field after updating the clock field Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3468/1: S3C2410: SMDK common include fixBen Dooks2006-04-091-0/+1
| | | | | | | | | | | | | | | | | | | | Patch from Ben Dooks common-smdk.c does not include its own header file defining the exported prototypes. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3461/1: ARM: OMAP: Fix clk_get() when using id and nameTony Lindgren2006-04-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Tony Lindgren Recent change to use both id and name when available was not necessarily returning the right clock as it also searched for clock name afterwards. This caused MMC to break on H2 and H3 boards. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 3460/1: ARM: OMAP: Remove unnecessary nop_release()Tony Lindgren2006-04-093-43/+0
| | | | | | | | | | | | | | | | | | Patch from Tony Lindgren Remove unnecessary omap_nop_release() as noted by RMK. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Allow decompressor to be built with -ffunction-sectionsRussell King2006-04-091-0/+1
| | | | | | | | | | | | | | Arrange for all the text ends up in the right place when -ffunction-sections is used. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Fix SA110/SA1100 cache flushingRussell King2006-04-073-58/+30
| | | | | | | | | | | | | | | | We had two implementations for flushing the cache, which meant StrongARM caches weren't being correctly flushed. Fix this by always using the v4wb_flush_kern_cache_all method, rather than duplicating it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Move FLUSH_BASE macros to asm/arch/memory.hRussell King2006-04-071-3/+4
| | | | | | | | | | | | | | | | | | FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the memory region to be setup. Move these definitions from asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm stuff can see them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [SPARC64]: Set ARCH_SELECT_MEMORY_MODELDavid S. Miller2006-04-091-0/+3
| | | | | | | | | | | | | | | | Otherwise the build breaks with EXPERIMENTAL disabled because SPARSEMEM will not get selected properly. See mm/Kconfig for how that works. Signed-off-by: David S. Miller <davem@davemloft.net>
* | [SPARC64]: smp_call_function() fixups...David S. Miller2006-04-091-20/+15
| | | | | | | | | | | | | | | | | | 1) Take doc-book function comment from i386 implementation. 2) cacheline align call_lock, taken from powerpc 3) Need memory barrier after setting call_data 4) Remove timeout Signed-off-by: David S. Miller <davem@davemloft.net>
* | [SPARC64]: Translate PTRACE_GETEVENTMSG for 32-bit tasks.David S. Miller2006-04-091-0/+16
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | [SPARC64]: Update defconfig.David S. Miller2006-04-091-2/+8
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | [SPARC64]: Print out return PC in cheetah_log_errors().David S. Miller2006-04-091-2/+2
| | | | | | | | | | | | This makes debugging things a little bit easier. Signed-off-by: David S. Miller <davem@davemloft.net>
* | [SPARC64]: Add dummy PTRACE_PEEKUSR for gdb.David S. Miller2006-04-091-0/+7
| | | | | | | | | | | | | | | | GDB uses a PTRACE_PEEKUSR call with offset 0 to see if a thread is alive, so provide a success return for this particular special case. Signed-off-by: David S. Miller <davem@davemloft.net>
* | Move request_standard_resources() back to before PCI probingLinus Torvalds2006-04-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This effectively undoes the PCI resource allocation changes done in commit b408cbc704352eccee301e1103b23203ba1c3a0e, but leaves the cleanups of that commit in place. We're going back to marking the resources reported by e820 busy _before_ doing PCI probing, so that any PCI resource that clashes with the BIOS- reported memory map will be reloacted to a non-clashing area. The reason? Larry Finger reports that his laptop has the cardbus controller set up by the BIOS so that it conflicts with the e820 memory map, and needs to be relocated. See http://bugzilla.kernel.org/show_bug.cgi?id=6337 for more details. We'll have to work out how to handle the fbcon problem that caused that commit in the first place in some other way. Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: Antonino A. Daplas <adaplas@pol.net> Cc: <bjk@luxsci.net> Tested-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Update 32-bit system call tableAndi Kleen2006-04-091-2/+4
| | | | | | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Eliminate IA32_NR_syscalls defineAndi Kleen2006-04-091-9/+8
| | | | | | | | | | | | | | | | | | | | Or rather compute it based on the table length automatically. This also has the intended side effect of not warning for new system calls anymore. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: fix CONFIG_REORDERSam Ravnborg2006-04-091-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix CONFIG_REORDER. The value of cflags-y was assined to CFLAGS before cflags-y was assigned the value used for CONFIG_REORDER. Use cflags-y for all CFLAGS options in the Makefile to avoid this happening again. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Plug GS leak in arch_prctl()John Blackwood2006-04-091-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In linux-2.6.16, we have noticed a problem where the gs base value returned from an arch_prtcl(ARCH_GET_GS, ...) call will be incorrect if: - the current/calling task has NOT set its own gs base yet to a non-zero value, - some other task that ran on the same processor previously set their own gs base to a non-zero value. In this situation, the ARCH_GET_GS code will read and return the MSR_KERNEL_GS_BASE msr register. However, since the __switch_to() code does NOT load/zero the MSR_KERNEL_GS_BASE register when the task that is switched IN has a zero next->gs value, the caller of arch_prctl(ARCH_GET_GS, ...) will get back the value of some previous tasks's gs base value instead of 0. Change the arch_prctl() ARCH_GET_GS code to only read and return the MSR_KERNEL_GS_BASE msr register if the 'gs' register of the calling task is non-zero. Side note: Since in addition to using arch_prctl(ARCH_SET_GS, ...), a task can also setup a gs base value by using modify_ldt() and write an index value into 'gs' from user space, the patch below reads 'gs' instead of using thread.gs, since in the modify_ldt() case, the thread.gs value will be 0, and incorrect value would be returned (the task->thread.gs value). When the user has not set its own gs base value and the 'gs' register is zero, then the MSR_KERNEL_GS_BASE register will not be read and a value of zero will be returned by reading and returning 'task->thread.gs'. The first patch shown below is an attempt at implementing this approach. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386: Remove printk about reboot fixups at rebootAndi Kleen2006-04-091-2/+0
| | | | | | | | | | | | | | Printk doesn't have any value Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Fix drift with HPET timer enabledJordan Hargrave2006-04-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the HPET timer is enabled, the clock can drift by ~3 seconds a day. This is due to the HPET timer not being initialized with the correct setting (still using PIT count). If HZ changes, this drift can become even more pronounced. HPET patch initializes tick_nsec with correct tick_nsec settings for HPET timer. Vojtech comments: "It's not entirely correct (it assumes the HPET ticks totally exactly), but it's significantly better than assuming the PIT error there." Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386/x86-64: Return defined error value for bad PCI config space ↵Andi Kleen2006-04-093-3/+9
| | | | | | | | | | | | | | | | | | | | | | accesses Mostly to get better handling when a extended config space access has to fallback to Type1. Cc: gregkh@suse.de Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386/x86_64: Check if MCFG works for the first 16 bussesAndi Kleen2006-04-092-37/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously only the first bus would be checked against Type 1. Why 16? Checking all would need too much memory and we can assume that systems with more than 16 busses have better than average quality BIOS. This is an additional defense against bad MCFG tables. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Fixup read_mostly section on internode cache line size for vSMPRavikiran G Thirumalai2006-04-092-1/+6
| | | | | | | | | | | | | | | | | | Fixup the read mostly section to start at internode cacheline boundary. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Don't return error for HPET initialization in initcallAndi Kleen2006-04-091-1/+1
| | | | | | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Don't export strlen twiceAndi Kleen2006-04-091-2/+0
| | | | | | | | | | | | | | | | | | | | | | Fix WARNING: vmlinux: 'strlen' exported twice. Previous export was in vmlinux Reported by Mats Johannesson Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: When user could have changed RIP always force IRETAndi Kleen2006-04-091-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel EM64T CPUs handle uncanonical return addresses differently from AMD CPUs. The exception is reported in the SYSRET, not the next instruction. This leads to the kernel exception handler running on the user stack with the wrong GS because the kernel didn't expect exceptions on this instruction. This version of the patch has the teething problems that plagued an earlier version fixed. This is CVE-2006-0744 Thanks to Ernie Petrides and Asit B. Mallick for analysis and initial patches. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Don't run NMI watchdog during machine checksAndi Kleen2006-04-092-1/+14
| | | | | | | | | | | | | | | | Machine checks can stall the machine for a long time and it's not good to trigger the nmi watchdog during that. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Proper null pointer check in powernow_k8_getJacob Shin2006-04-091-1/+10
| | | | | | | | | | | | | | | | | | | | | | This prevents crashes on dual core system when enough ticks are lost. Replaces earlier patch by me. Cc: Dave Jones <davej@redhat.com> Signed-off-by: Thomas Renninger <trenn@suse.de> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Revert earlier powernow-k8 changeAndi Kleen2006-04-091-4/+3
| | | | | | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386: Consolidate modern APIC handlingAndi Kleen2006-04-092-28/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD systems have a modern APIC that supports 8 bit IDs, but don't have a XAPIC version number. Add a new "modern_apic" subfunction that handles this correctly and use it (nearly) everywhere where XAPIC is tested for. I removed one wart: the code specified that external APICs would use an 8bit APIC ID. But I checked a real 82093 data sheet and it says clearly that they only use 4bit. So I removed this special case since it would a bit awkward to implement now. I removed the valid APIC tests in mptable parsing completely. On any modern system they only check against the full field width (8bit) anyways and are no-ops. This also fixes them doing the wrong thing on >8 core Opterons. This makes i386 boot again on 16 core Opterons. Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Clear APIC feature bit when local APIC is disabledAndi Kleen2006-04-091-1/+3
| | | | | | | | | | | | | | | | | | Needed for other checks later in ACPI. Pointed out by Len Brown Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86-64/i386: Don't process APICs/IO-APICs in ACPI when APIC is disabled.Andi Kleen2006-04-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When nolapic was passed or the local APIC was disabled for another reason ACPI would still parse the IO-APICs until these were explicitely disabled with noapic. Usually this resulted in a non booting configuration unless "nolapic noapic" was used. I also disabled the local APIC parsing in this case, although that's only cosmetic (suppresses a few printks) This hopefully makes nolapic work in all cases. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Don't sanity check Type 1 PCI bus access on newer systemsAndi Kleen2006-04-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Horus systems don't have anything on bus 0 which makes the Type 1 sanity checks fail. Use the DMI BIOS year to check for newer systems and always assume Type 1 works on them. I used 2001 as an pretty arbitary cutoff year. Cc: gregkh@suse.de Cc: Navin Boppuri <navin.boppuri@newisys.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Fix compilation with CONFIG_PCI=n / allnoconfigAndi Kleen2006-04-091-0/+2
| | | | | | | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] i386/x86-64: Check that MCFG points to an e820 reserved areaArjan van de Ven2006-04-092-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a user for the e820_all_mapped function: There have been several machines that don't have a working MMCONFIG, often because of a buggy MCFG table in the ACPI bios. This patch adds a simple sanity check that detects a whole bunch of these cases, and when it detects it, linux now boots rather than crash-and-burns. The accuracy of this detection can in principle be improved if there was a "is this entire range in e820 with THIS attribute", but no such function exist and the complexity needed for this is not really worth it; this simple check already catches most cases anyway. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Introduce e820_all_mappedArjan van de Ven2006-04-092-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a e820_all_mapped() function which checks if the entire range <start,end> is mapped with type. This is done by moving the local start variable to the end of each known-good region; if at the end of the function the start address is still before end, there must be a part that's not of the correct type; otherwise it's a good region. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Rename e820_mapped to e820_any_mappedArjan van de Ven2006-04-093-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | Rename e820_mapped to e820_any_mapped since it tests if any part of the range is mapped according to the type. Later steps will introduce e820_all_mapped which will check if the entire range is mapped with the type. Both have their merit. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Handle empty PXMs that only contain hotplug memoryAndi Kleen2006-04-092-9/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The node setup code would try to allocate the node metadata in the node itself, but that fails if there is no memory in there. This can happen with memory hotplug when the hotplug area defines an so far empty node. Now use bootmem to try to allocate the mem_map in other nodes. And if it fails don't panic, but just ignore the node. To make this work I added a new __alloc_bootmem_nopanic function that does what its name implies. TBD should try to use nearby nodes here. Currently we just use any. It's hard to do it better because bootmem doesn't have proper fallback lists yet. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Reserve SRAT hotadd memory on x86-64Andi Kleen2006-04-093-8/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Keith Mannthey, Andi Kleen Implement memory hotadd without sparsemem. The memory in the SRAT hotadd area is just preserved instead and can be activated later. There are a few restrictions: - Only one continuous hotadd area allowed per node The main problem is dealing with the many buggy SRAT tables that are out there. The strategy here is to reject anything suspicious. Originally from Keith Mannthey, with several hacks and changes by AK and also contributions from Andrew Morton [ TBD: Problems pointed out by KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>: 1) Goto's rebuild_zonelist patch will not work if CONFIG_MEMORY_HOTPLUG=n. Rebuilding zonelist is necessary when the system has just memory < 4G at boot, and hot add memory > 4G. because x86_64 has DMA32, ZONE_NORAML is not included into zonelist at boot time if system doesn't have memory >4G at boot. [AK: should just force the higher zones at boot time when SRAT tells us] 2) zone and node's spanned_pages and present_pages are not incremented. They should be. For example, our server (ia64/Fujitsu PrimeQuest) can equip memory from 4G to 1T(maybe 2T in future), and SRAT will *always* say we have possible 1T +memory. (Microsoft requires "write all possible memory in SRAT") When we reserve memmap for possible 1T memory, Linux will not work well in +minimum 4G configuraion ;) [AK: needs limiting to 5-10% of max memory] ] Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Support memory hotadd without sparsememAndi Kleen2006-04-093-3/+37
| | | | | | | | | | | | | | | | | | | | | | Memory hotadd doesn't need SPARSEMEM, but can be handled by just preallocating mem_maps. This only needs some untangling of ifdefs to enable the necessary code even without SPARSEMEM. Originally from Keith Mannthey, hacked by AK. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Clean up execve pathAndi Kleen2006-04-091-16/+0
| | | | | | | | | | | | | | | | | | Just call IRET always, no need for any special cases. Needed for the next bug fix. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Update defconfigAndi Kleen2006-04-091-18/+24
|/ | | | | Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-04-0283-895/+5566
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: (27 commits) [ARM] 3433/1: ARM: OMAP: 8/8 Update board files [ARM] 3455/1: ARM: OMAP: 7/8 Misc updates, take 2 [ARM] 3454/1: ARM: OMAP: 6/8 Update framebuffer low-level init code, take 2 [ARM] 3430/1: ARM: OMAP: 5/8 Update PM [ARM] 3429/1: ARM: OMAP: 4/8 Update GPIO [ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing [ARM] 3427/1: ARM: OMAP: 2/8 Update timers [ARM] 3426/1: ARM: OMAP: 1/8 Update clock framework [ARM] 3396/2: AT91RM9200 Platform devices update [ARM] 3395/2: AT91RM9200 Dataflash Card vs MMC selection [ARM] 3393/2: AT91RM9200 LED support [ARM] 3453/1: Poodle: Correctly set the memory size [ARM] 3446/1: i.MX: MMC/SD SDHC controller registration for i.MX/MX1 MX1ADS board [ARM] 3444/1: i.MX: Scatter-gather DMA emulation for i.MX/MX1 [ARM] 3451/1: ep93xx: use the m48t86 rtc driver on the ts72xx platform [ARM] 3450/1: ep93xx: use the ep93xx rtc driver [ARM] 3452/1: [S3C2410] RX3715 - add nand information [ARM] 3449/1: [S3C2410] Anubis - fix NAND timings [ARM] 3448/1: [S3C2410] Settle delay when _enabling_ USB PLL [ARM] 3442/1: [S3C2410] SMDK: NAND device setup ...
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