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* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-09-3023-38/+29
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| * [ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.SGen FUKATSU2005-09-301-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | Patch from Gen FUKATSU Invalidate BTB entry instruction flushes two instruction at a time. Therefore this instruction should be done four times after invalidate instruction cache line. Signed-off-by: Gen Fukatsu Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2942/1: Fix the warning in arch/arm/common/gic.cCatalin Marinas2005-09-301-0/+2
| | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas The warning is caused by the gic_set_cpu() function being defined but not used if CONFIG_SMP is not defined. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2939/1: Fix compilation error in arch/arm/mm/flush.cCatalin Marinas2005-09-301-18/+18
| | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas When CONFIG_CPU_CACHE_VIPT is defined, the flush_pfn_alias() function is implicitely declared and it later conflicts with its actual definition. This patch moves the function definition to the beginning of the file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Don't include mach-types.h unnecessarilyRussell King2005-09-2918-18/+0
| | | | | | | | | | | | | | | | | | It's pointless to include mach-types.h if you're not going to use anything from it. These references were removed as a result of: grep -lr 'asm/mach-types\.h' . | xargs grep -L 'machine_is_\|MACH_TYPE_\|MACHINE_START\|machine_type' Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Don't include asm/arch/hardware.h directlyRussell King2005-09-291-1/+0
| | | | | | | | | | | | | | Since asm/hardware.h's only reason for existing is to include asm/arch/hardware.h, it's completely pointless to include both. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Fix warning in arch/arm/mach-pxa/generic.cRussell King2005-09-291-0/+1
| | | | | | | | | | | | | | | | Fix arch/arm/mach-pxa/generic.c:242: warning: 'struct i2c_pxa_platform_data' declared inside parameter list caused by missing asm/arch/i2c.h include. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] x86_64: Fix mce_logMike Waychison2005-09-291-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The attempt to fixup the lockless mce log buffer introduced an infinite loop when trying to find a free entry. And: Using rcu_dereference() to load mcelog.next doesn't seem to be sufficient enough to ensure that mcelog.next is loaded each time around the loop in mce_log(). Instead, use an explicit rmb() to ensure that the compiler gets it right. AK: turned the smp_wmbs into true wmbs to make sure they are not reordered by the compiler on UP. Signed-off-by: Mike Waychison <mikew@google.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] Fix up TLB flush filter disablingAndi Kleen2005-09-292-10/+28
| | | | | | | | | | | | | | | | I checked with AMD and they requested to only disable it for family 15. Also disable it for i386 too. And some style fixes. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] Fix thinko in previous ARM 2917/1 patchDeepak Saxena2005-09-291-1/+1
| | | | | | | | | | | | | | Previous patch accidently add IXDP425 mach entry when IXDP465 is configured. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-293-6/+13
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| * | [SPARC64]: Fix bug in unaligned load endianness swappingDavid S. Miller2005-09-281-5/+5
| | | | | | | | | | | | | | | | | | | | | The in-memory value was being swapped, not the value we loaded into the register. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: Add missing IDs for newer cpus.David S. Miller2005-09-272-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | Also, the us3_cpufreq driver can work on Ultra-IV and IV+. They use the SAFARI bus register to control the clock divider just like Ultra-III and III+ do. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | [PATCH] mv64x60 iomem annotationsAl Viro2005-09-291-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] ppc32 ld.script fix for building on ppc64Al Viro2005-09-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/ppc/boot/ld.script we need OUTPUT_ARCH(powerpc:common) for the same reasons why we need it in vmlinux.lds.S; when we build on ppc64 box, we need to be explicit about the target. See http://linus.bkbits.net:8080/linux-2.5/cset@1.1784.8.10 for the corresponding fix in vmlinux.lds.S. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] s390 signal annotationsAl Viro2005-09-292-5/+5
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] arm/versatile iomem annotationsAl Viro2005-09-291-21/+22
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] uml makefiles sanitizedAl Viro2005-09-2933-573/+240
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | UML makefiles sanitized: - number of generated headers reduced to 2 (from user-offsets.c and kernel-offsets.c resp.). The rest is made constant and simply includes those two. - mk_... helpers are gone now that we don't need to generate these headers - arch/um/include2 removed since everything under arch/um/include/sysdep is constant now and symlink can point straight to source tree. - dependencies seriously simplified. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc64: More hugepage fixesBenjamin Herrenschmidt2005-09-282-4/+5
| | | | | | | | | | | | | | | | | | | | | | My previous patch fixing invalidation of huge PTEs wasn't good enough, we still had an issue if a PTE invalidation batch contained both small and large pages. This patch fixes this by making sure the batch is flushed if the page size fed to it changes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc64: Add missing barrier() in kexec codeAnton Blanchard2005-09-281-0/+1
| | | | | | | | | | | | | | | | | | | | Mikey and I were testing kexec and hit a lockup. It turns out gcc 4.0 optimises the kexec_prepare_cpus loop so we avoid reloading paca.hw_cpu_id. A gcc barrier() fixes the problem. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86-64: Fix bad assumption that dualcore cpus have synced TSCsjohn stultz2005-09-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should resolve the issue seen in bugme bug #5105, where it is assumed that dualcore x86_64 systems have synced TSCs. This is not the case, and alternate timesources should be used instead. For more details, see: http://bugzilla.kernel.org/show_bug.cgi?id=5105 Andi's earlier concerns that the TSCs should be synced on dualcore systems have been resolved by confirmation from AMD folks that they can be unsynced. Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc: fix stupid thinko in oprofile fixBenjamin Herrenschmidt2005-09-281-2/+1
|/ | | | | | | | I did something stupid in my oprofile fix, here's the obvious fix: Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-2724-1170/+856
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| * [SPARC64]: Do not do TLB pre-filling any more.David S. Miller2005-09-262-35/+0
| | | | | | | | | | | | | | | | | | | | | | In order to do it correctly on UltraSPARC-III+ and later we'd need to add some complicated code to set the TAG access extension register before loading the TLB. Since this optimization gives questionable gains, it's best to just remove it for now instead of adding the fix for Ultra-III+ Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Simplify Spitfire D-cache page flush.David S. Miller2005-09-261-46/+23
| | | | | | | | | | | | | | | | | | | | It tries to batch up the tag loads and comparisons, and then the stores. And this is just complicated instead of efficient. Also, make the symbol of the Cheetah version more grepable. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Probe D/I/E-cache config and use.David S. Miller2005-09-265-23/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Add CONFIG_DEBUG_PAGEALLOC support.David S. Miller2005-09-255-12/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trick is that we do the kernel linear mapping TLB miss starting with an instruction sequence like this: ba,pt %xcc, kvmap_load xor %g2, %g4, %g5 succeeded by an instruction sequence which performs a full page table walk starting at swapper_pg_dir. We first take over the trap table from the firmware. Then, using this constant PTE generation for the linear mapping area above, we build the kernel page tables for the linear mapping. After this is setup, we patch that branch above into a "nop", which will cause TLB misses to fall through to the full page table walk. With this, the page unmapping for CONFIG_DEBUG_PAGEALLOC is trivial. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix mask formation in tomatillo_wsync_handler()David S. Miller2005-09-241-1/+1
| | | | | | | | | | | | "1" needs to be "1UL", this is a 64-bit mask we're creating. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Mark functions called by paging_init() as __init.David S. Miller2005-09-231-6/+6
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Kill unused variable in setup_arch()David S. Miller2005-09-231-7/+0
| | | | | | | | | | | | 'highest_paddr' is set, but never actually used. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix comment typo in head.SDavid S. Miller2005-09-221-1/+1
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Rewrite bootup sequence.David S. Miller2005-09-2213-625/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of all of this cpu-specific code to remap the kernel to the correct location, use portable firmware calls to do this instead. What we do now is the following in position independant assembler: chosen_node = prom_finddevice("/chosen"); prom_mmu_ihandle_cache = prom_getint(chosen_node, "mmu"); vaddr = 4MB_ALIGN(current_text_addr()); prom_translate(vaddr, &paddr_high, &paddr_low, &mode); prom_boot_mapping_mode = mode; prom_boot_mapping_phys_high = paddr_high; prom_boot_mapping_phys_low = paddr_low; prom_map(-1, 8 * 1024 * 1024, KERNBASE, paddr_low); and that replaces the massive amount of by-hand TLB probing and programming we used to do here. The new code should also handle properly the case where the kernel is mapped at the correct address already (think: future kexec support). Consequently, the bulk of remap_kernel() dies as does the entirety of arch/sparc64/prom/map.S We try to share some strings in the PROM library with the ones used at bootup, and while we're here mark input strings to oplib.h routines with "const" when appropriate. There are many more simplifications now possible. For one thing, we can consolidate the two copies we now have of a lot of cpu setup code sitting in head.S and trampoline.S. This is a significant step towards CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Kill readjust_prom_translations()David S. Miller2005-09-221-35/+0
| | | | | | | | | | | | | | Testing shows that the prom_unmap() calls do absolutely nothing. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Remove unnecessary paging_init() cruft.David S. Miller2005-09-221-99/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because we don't access the PAGE_OFFSET linear mappings any longer before we take over the trap table from the firmware, we don't need to load dummy mappings there into the TLB and we don't need the bootmap_base hack any longer either. While we are here, check for a larger than 8MB kernel and halt the boot with an error message. We know that doesn't work, so instead of failing mysteriously we should let the user know exactly what's wrong. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Do not allocate OBP page tables using bootmemDavid S. Miller2005-09-221-47/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | Just allocate them physically starting from the end of the kernel image. This incredibly simplifies our MM bootstrap in that we don't need any mappings in the linear PAGE_OFFSET area working in order to bootstrap ourselves and take over the trap table from the firmware. Many further simplifications are possible now, and this also sets the stage for CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Break up inherit_prom_mappings() into it's constituent parts.David S. Miller2005-09-221-141/+160
| | | | | | | | | | | | This thing was just a huge monolithic mess, so chop it up. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Do not allocate prom translations using bootmem.David S. Miller2005-09-211-28/+26
| | | | | | | | | | | | Use __initdata instead. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Remove ktlb.S instruction patching.David S. Miller2005-09-212-39/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This was kind of ugly, and actually buggy. The bug was that we didn't handle a machine with memory starting > 4GB. If the 'prompmd' was allocated in physical memory > 4GB we'd croak because the obp_iaddr_patch and obp_daddr_patch things only supported a 32-bit physical address. So fix this by just loading the appropriate values from two variables in the kernel image, which is locked into the TLB and thus accesses to them can't cause a recursive TLB miss. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Kill SZ_BITS define from dtlb_backend.SDavid S. Miller2005-09-211-12/+1
| | | | | | | | | | | | | | This is just a replica of the existing _PAGE_SZBITS, and thus unnecessary. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Move kernel TLB miss handling into a seperate file.David S. Miller2005-09-214-157/+179
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-09-262-260/+322
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| * | [ARM] 2936/1: ixp4xx default config fixesVincent Sanders2005-09-261-259/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders A recent patch which made IXP4xx mach_desc's depend on config options had the effect of not building the kernel for several machines it possibly could be, this patch updates the default config to ensure all possible machines are built for by default. Signed-off-by: Vincent Sanders <vince@arm.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 2935/1: ixp4xx: fix warnings in ixp4xx_set_irq_typeDavid Vrabel2005-09-261-1/+4
| | | | | | | | | | | | | | | | | | | | | Patch from David Vrabel Signed-off-by: David Vrabel <dvrabel@arcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [PATCH] missing dependency on arm O= buildsAl Viro2005-09-261-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arm maketools needs include/asm-arm in place in the build tree. On normal builds it's always there, of course, but on O= it's created (by generic code) too late - when we get to asm-offset.h. We used to get away with that by accident - creation of include/asm-arm/arch symlink creates include/asm-arm and it happened to go before maketools. However, we did not have such dependency, so that luck didn't last - now maketools is picked first and we are screwed. Both the symlink and maketools are prerequisites of the same target (archprepare). This fix is obvious - make the latter explicitly depend on the former and be done with that. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] m32r: more basic __user annotationsAl Viro2005-09-261-8/+8
| | | | | | | | | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] m32r: set CHECKFLAGS properlyAl Viro2005-09-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We do _not_ need "sparse" in sparse arguments ;-) What we do need is __BIG_ENDIAN__; right now unconditional, when m32r starts using CPU_LITTLE_ENDIAN, we'll need to adjust. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] useless includes of linux/irq.h in arch/i386Al Viro2005-09-2629-51/+1
|/ / | | | | | | | | | | | | | | | | | | Most of these guys are simply not needed (pulled by other stuff via asm-i386/hardirq.h). One that is not entirely useless is hilarious - arch/i386/oprofile/nmi_timer_int.c includes linux/irq.h... as a way to get linux/errno.h Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [ARM] Fix compiler warnings for memcpy_toio/memcpy_fromio/memset_ioRussell King2005-09-241-3/+3
| | | | | | | | | | | | | | Add 'volatile' to the __iomem pointers for these functions as per x86. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-09-231-1/+1
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| * | [ARM] Fix context switch with ARMv6 + TLSRussell King2005-09-231-1/+1
| | | | | | | | | | | | | | | | | | | | | We accidentally corrupted the TLS value when clearing out the ARMv6 exclusive monitor. Avoid doing so. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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