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* [ARM] S3C24XX: Split map.h into plat-s3c24xx and mach-s3c2410Ben Dooks2008-12-155-81/+111
| | | | | | | | | | | | Split the map.h definitions into common S3C24XX code by adding arch/arm/plat-s3c24xx/include/plat/map.h and altering the machine specific header for the S3C24A0. As we add a new <plat/map.h> we move the original one in arch/arm/plat-s3c include directory to be called map-base.h to distinguish the two files. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24A0: Serial port definitions and driver support.Sandeep Patil2008-12-151-0/+8
| | | | | | | | | | Add serial support for S3C24A0, based on current S3C2410 UART driver. It adds necessary new defines in regs-serial.h for S3C24A0 and the code to support this device in drivers/serial/s3c24a0.c Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24A0: Debug macro definitionsBen Dooks2008-12-152-1/+29
| | | | | | | | Add the necessary debug macros for the S3C24A0 to enable kernel debugging, and fix a bug with selecting the wrong default debug implementation from the base include. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24A0: Correct S3C2410_PA_GPIO in S3C24XX_VA_GPIOSandeep Patil2008-12-151-1/+1
| | | | | | | | The definition of S3C24XX_VA_GPIO used S3C2410_PA_GPIO where it should have read S3C24XX_PA_GPIO. Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24A0: arch/arm/mach-s3c24a0/include/mach header filesSandeep Patil2008-12-155-0/+325
| | | | | | | | Add initial arch/arm/mach-s3c24a0/include/mach header files for supporting Samsung S3C24A0 SoC. Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Fix scaler1 clock rate informationBen Dooks2008-12-151-2/+4
| | | | | | | | | | | | | The pwm-scaler0 and pwm-scaler1 clocks have their .id field set to -1 as they are not referenced to any specific device. However, parts of the pwm-clock code used the .id field to identify which scaler clock was being used. Fix the problem by comparing against the pointer to the clock to identify the scalers. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Add set_rate/round_rate methods for pwm-scaler clockBen Dooks2008-12-151-4/+47
| | | | | | | Add the set_rate and round_rate methods for the pwm-scaler clock for use with the time code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Reduce code lineage of gpiolib.cBen Dooks2008-12-151-27/+22
| | | | | | | | | | | | | All the s3c24xx gpiolib chips share the same get/set calls and all but one bank shares the same calls for .direction_input and .direction_output methods. Change the initialisation process to use an new call to register the chips that fills in any blank calls with the default values to avoid having to fill them in the structure initialisers. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: BUG_ON() if clock has already been registeredBen Dooks2008-12-151-0/+3
| | | | | | | | | | | Add a simple check when registering a clock on whether the clock has already been added to the list. Any attempt to re-register a clock will cause the clock list to be come looped and thus produces silent failures when looking up clocks. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Move pwm-clock.c to arch/arm/plat-s3cBen Dooks2008-12-153-2/+2
| | | | | | | Move pwm-clock.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Move core clock support to plat-s3cBen Dooks2008-12-153-314/+357
| | | | | | | | Move the core clock registration and definitions in arch/arm/plat-s3c24xx/clock.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Move time.c to arch/arm/plat-s3cBen Dooks2008-12-153-5/+5
| | | | | | | Move time.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Move S3C2410_EXTINT to common regs-irqtype.h headerBen Dooks2008-12-153-7/+22
| | | | | | | Add a common include file (regs-irqtype.h) for the IRQ trigger control register values S3C2410_EXTINT*. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Move headers from plat-s3c24xx to plat-s3cBen Dooks2008-12-153-4/+3
| | | | | | | Move clock.h, cpu.h and devs.h to plat-s3c for use with the s3c64xx support. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Update clock data on resumeBen Dooks2008-12-157-36/+104
| | | | | | | | | Update the clock settings on resume for suspend/resume support so that if the boot loader changes anything or the system's PLL is reset then we return with the correct settings. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Change clock locking to use spinlocks.Ben Dooks2008-12-153-18/+23
| | | | | | | | We cannot sleep if we have cpufreq pm enabled during some of the clock operations, so change to use a spinlock to protect the clock system. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Split pll code out of regs-clock.hBen Dooks2008-12-157-41/+49
| | | | | | | | | | | | Move the PLL calculation code into it's own header file for re-use with the other plat-s3c24xx based systems such as the S3C24A0. Note, we change the name of s3c2410_get_pll to the more generically named s3c24xx_get_pll as well as the related defintions. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Split DCLK/CLKOUT definitions out of clock.cBen Dooks2008-12-156-171/+204
| | | | | | | | | Only certain boards need these clocks, and they are not available on some CPUs (such as the S3C24A0) so remove them from arch/arm/plat-s3c24xx/clock.c and into their own file with appropriate Kconfig entries. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Move initialisation code to arch/arm/plat-s3cBen Dooks2008-12-1513-155/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to add plat-s3c to the build to get the headers that will go in here once moved from include/asm-arm so we may as well put some useful common s3c code in here to stop the errors generated form having nothing built. The cpu setup is now passed the cpu idcode and the table of supported cpus to s3c_init_cpu() to abstract the cpu identification out of the initial io setup. As well as moving the cpu initialisation code, we move the map of the board specific items up to the calling code as none of the map_io() functions actually do anything other than pass this to iotable_init(). This patch does not rename any of the init functions that will be common to s3c24xx and any other s3c architectures as this can be done at a later date as it will touch all the board support files which use functions such as s3c24xx_init_clocks() and s3c24xx_init_uarts(). Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h still has functions that are used by both the cpu and board initialisation functions. This means that each board has definitions specific to the cpu support included and the vice-versa. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Add default <mach/io.h> headerBen Dooks2008-12-151-0/+18
| | | | | | | | Add a default header for <mach/io.h> for systems such as the S3C24A0 which do not need any of the complex code that the S3C2410 uses. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Move vmalloc.h to plat-s3cBen Dooks2008-12-151-1/+1
| | | | | | | | vmalloc.h is common across all the current s3c platforms, so move it to arch/arm/plat-s3c/include/mach to be used for all the targets. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Make <mach/timex.h> commonBen Dooks2008-12-151-0/+0
| | | | | | | Move <mach/timex.h> to arch/arm/plat-s3c/include/mach/timex.h so it can be the default for all S3C based architectures. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C2410: Move base clock code to plat-s3c24xxBen Dooks2008-12-155-6/+9
| | | | | | | | Move the S3C2410 base clock list to arch/arm/plat-s3c24xx as this code is common to the S3C2410, S3C2440 and S3C2442 cpus. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C: Add <plat/cpu-freq.h> for initial cpufreq definitionsBen Dooks2008-12-151-0/+94
| | | | | | | This is the header file that defines the basic cpu frequency scalling support for the Samsung S3C series of SoC. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* [ARM] S3C24XX: Default SPI pin configuration for SPIBen Dooks2008-12-155-0/+105
| | | | | | | | Add a set of default pin configuration routines for setting up the SPI gpio configuration when using the hardware SPI driver. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge git://git.marvell.com/orion into develRussell King2008-12-13102-1010/+3689
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| * [ARM] Kirkwood: update defconfigNicolas Pitre2008-12-111-90/+239
| | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Feroceon: pass proper -mtune argument to gccNicolas Pitre2008-12-111-0/+1
| | | | | | | | | | | | | | | | Compilation for the Feroceon core should use -mtune=marvell-f. This is available in Code Sourcery's 2008Q3 release at the moment. Otherwise fall back to -mtune-=xscale. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: properly handle the WAN port on newer RD88F6281 boardsRonen Shitrit2008-12-111-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | On newer versions of the RD88F6281 board, the WAN port is connected to its own ethernet port on the CPU, via a separate PHY, whereas on older versions of the board, it is connected to one of the PHYs in the ethernet switch. In the RD8F6281 setup code, detect which version of the board we are running on, and instantiate the ethernet ports and switch driver accordingly. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: allow instantiating the second ethernet portRonen Shitrit2008-12-113-0/+60
| | | | | | | | | | | | | | | | | | | | The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports. Add the platform glue that will allow board support files to instantiate the second ethernet port. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] DNS323: Initialise 88F5182 correctlyMatt Palmer2008-12-111-4/+61
| | | | | | | | | | | | | | | | | | | | The 88F5182 found in the DNS-323 rev B1 (and some other devices, such as the CH3SNAS) require different initialisation of the SATA controller and MPP registers. Tested on a DNS-323 rev B1. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
| * [ARM] DNS323: Read MAC address from flashMatt Palmer2008-12-111-16/+95
| | | | | | | | | | | | | | | | | | Based on similar code from the tsx09 series of machines, just rips the MAC address out of flash and stuffs it into the NIC. Tested on a DNS323 rev B1. It's possible (though unlikely) that an A1 will have the MAC in a different location in flash. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
| * [ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit2008-12-044-0/+11
| | | | | | | | | | | | | | | | | | The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
| * frv: fix mmap2 error handlingDavid Howells2008-12-011-9/+8
| | | | | | | | | | | | | | | | | | | | | | Fix the error handling in sys_mmap2(). Currently, if the pgoff check fails, fput() might have to be called (which it isn't), so do the pgoff check first, before fget() is called. Signed-off-by: David Howells <dhowells@redhat.com> Reported-by: Julia Lawall <julia@diku.dk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * spi: fix spi_s3c24xx_gpio num_chipselectBen Dooks2008-12-011-0/+1
| | | | | | | | | | | | | | | | | | | | The spi master driver must have num_chipselect set to allow the bus to initialise. Pass this through the platform data. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * Merge branch 'merge' of ↵Linus Torvalds2008-12-011-0/+2
| |\ | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: powerpc: Fix build for 32-bit SMP configs
| | * powerpc: Fix build for 32-bit SMP configsMilton Miller2008-12-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | attr_smt_snooze_delay is only defined for CONFIG_PPC64, so protect the attribute removal with the same condition. This fixes this build error on 32-bit SMP configurations: /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c: In function ‘unregister_cpu_online’: /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: ‘attr_smt_snooze_delay’ undeclared (first use in this function) /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: (Each undeclared identifier is reported only once /data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: for each function it appears in.) Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | Revert "of_platform_driver noise on sparce"Linus Torvalds2008-12-013-4/+4
| |/ | | | | | | | | | | | | | | | | | | This reverts commit e669dae6141ff97d3c7566207f5de3b487dcf837, since it is incomplete, and clashes with fuller patches and the sparc 32/64 unification effort. Requested-by: David Miller <davem@davemloft.net> Acked-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * Merge branch 'merge' of ↵Linus Torvalds2008-11-3024-560/+2750
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: powerpc: Fix system calls on Cell entered with XER.SO=1 powerpc/cell: Fix GDB watchpoints, again powerpc/mpic: Don't reset affinity for secondary MPIC on boot powerpc/cell/axon-msi: Retry on missing interrupt powerpc: Fix boot freeze on machine with empty memory node powerpc: Fix IRQ assignment for some PCIe devices powerpc/spufs: Fix spinning in spufs_ps_fault on signal powerpc/mpc832x_rdb: fix swapped ethernet ids powerpc: Use generic PHY driver for Marvell 88E1111 PHY on GE Fanuc SBC610 powerpc/85xx: L2 cache size wrong in 8572DS dts powerpc/virtex: Update defconfigs powerpc/52xx: update defconfigs xsysace: Fix driver to use resource_size_t instead of unsigned long powerpc/virtex: fix various format/casting printk mismatches powerpc/mpc5200: fix bestcomm Kconfig dependencies powerpc/44x: Fix 460EX/460GT machine check handling powerpc/40x: Limit allocable DRAM during early mapping
| | * powerpc: Fix system calls on Cell entered with XER.SO=1Paul Mackerras2008-12-011-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that on Cell, on a kernel with CONFIG_VIRT_CPU_ACCOUNTING = y, if a program sets the SO (summary overflow) bit in the XER and then does a system call, the SO bit in CR0 will be set on return regardless of whether the system call detected an error. Since CR0.SO is used as the error indication from the system call, this means that all system calls appear to fail. The reason is that the workaround for the timebase bug on Cell uses a compare instruction. With CONFIG_VIRT_CPU_ACCOUNTING = y, the ACCOUNT_CPU_USER_ENTRY macro reads the timebase, so we end up doing a compare instruction, which copies XER.SO to CR0.SO. Since we were doing this in the system call entry patch after clearing CR0.SO but before saving the CR, this meant that the saved CR image had CR0.SO set if XER.SO was set on entry. This fixes it by moving the clearing of CR0.SO to after the ACCOUNT_CPU_USER_ENTRY call in the system call entry path. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| | * powerpc/cell: Fix GDB watchpoints, againArnd Bergmann2008-12-011-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An earlier patch from Jens Osterkamp attempted to fix GDB watchpoints by enabling the DABRX register at boot time. Unfortunately, this did not work on SMP setups, where secondary CPUs were still using the power-on DABRX value. This introduces the same change for secondary CPUs on cell as well. Reported-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com> Tested-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| | * powerpc/mpic: Don't reset affinity for secondary MPIC on bootArnd Bergmann2008-12-011-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kexec/kdump currently fails on the IBM QS2x blades when the kexec happens on a CPU other than the initial boot CPU. It turns out that this is the result of mpic_init trying to set affinity of each interrupt vector to the current boot CPU. As far as I can tell, the same problem is likely to exist on any secondary MPIC, because they have to deliver interrupts to the first output all the time. There are two potential solutions for this: either not set up affinity at all for secondary MPICs, or assume that a single CPU output is connected to the upstream interrupt controller and hardcode affinity to that per architecture. This patch implements the second approach, defaulting to the first output. Currently, all known secondary MPICs are routed to their upstream port using the first destination, so we hardcode that. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| | * powerpc/cell/axon-msi: Retry on missing interruptArnd Bergmann2008-12-011-5/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSI capture logic for the axon bridge can sometimes lose interrupts in case of high DMA and interrupt load, when it signals an MSI interrupt to the MPIC interrupt controller while we are already handling another MSI. Each MSI vector gets written into a FIFO buffer in main memory using DMA, and that DMA access is normally flushed by the actual interrupt packet on the IOIF. An MMIO register in the MSIC holds the position of the last entry in the FIFO buffer that was written. However, reading that position does not flush the DMA, so that we can observe stale data in the buffer. In a stress test, we have observed the DMA to arrive up to 14 microseconds after reading the register. This patch works around this problem by retrying the access to the FIFO buffer. We can reliably detect the conditioning by writing an invalid MSI vector into the FIFO buffer after reading from it, assuming that all MSIs we get are valid. After detecting an invalid MSI vector, we udelay(1) in the interrupt cascade for up to 100 times before giving up. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| | * powerpc: Fix boot freeze on machine with empty memory nodeDave Hansen2008-12-011-47/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I got a bug report about a distro kernel not booting on a particular machine. It would freeze during boot: > ... > Could not find start_pfn for node 1 > [boot]0015 Setup Done > Built 2 zonelists in Node order, mobility grouping on. Total pages: 123783 > Policy zone: DMA > Kernel command line: > [boot]0020 XICS Init > [boot]0021 XICS Done > PID hash table entries: 4096 (order: 12, 32768 bytes) > clocksource: timebase mult[7d0000] shift[22] registered > Console: colour dummy device 80x25 > console handover: boot [udbg0] -> real [hvc0] > Dentry cache hash table entries: 1048576 (order: 7, 8388608 bytes) > Inode-cache hash table entries: 524288 (order: 6, 4194304 bytes) > freeing bootmem node 0 I've reproduced this on 2.6.27.7. It is caused by commit 8f64e1f2d1e09267ac926e15090fd505c1c0cbcb ("powerpc: Reserve in bootmem lmb reserved regions that cross NUMA nodes"). The problem is that Jon took a loop which was (in pseudocode): for_each_node(nid) NODE_DATA(nid) = careful_alloc(nid); setup_bootmem(nid); reserve_node_bootmem(nid); and broke it up into: for_each_node(nid) NODE_DATA(nid) = careful_alloc(nid); setup_bootmem(nid); for_each_node(nid) reserve_node_bootmem(nid); The issue comes in when the 'careful_alloc()' is called on a node with no memory. It falls back to using bootmem from a previously-initialized node. But, bootmem has not yet been reserved when Jon's patch is applied. It gives back bogus memory (0xc000000000000000) and pukes later in boot. The following patch collapses the loop back together. It also breaks the mark_reserved_regions_for_nid() code out into a function and adds some comments. I think a huge part of introducing this bug is because for loop was too long and hard to read. The actual bug fix here is the: + if (end_pfn <= node->node_start_pfn || + start_pfn >= node_end_pfn) + continue; Signed-off-by: Dave Hansen <dave@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| | * powerpc: Fix IRQ assignment for some PCIe devicesAdhemerval Zanella2008-12-011-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, some PCIe devices on POWER6 machines do not get interrupts assigned correctly. The problem is that OF doesn't create an "interrupt" property for them. The fix is for of_irq_map_pci to fall back to using the value in the PCI interrupt-pin register in config space, as we do when there is no OF device-tree node for the device. I have verified that this works fine with a pair of Squib-E SAS adapter on a P6-570. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| | * Merge branch 'merge' of ↵Paul Mackerras2008-11-241-0/+3
| | |\ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jk/spufs into merge
| | | * powerpc/spufs: Fix spinning in spufs_ps_fault on signalJeremy Kerr2008-11-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we can end up in an infinite loop if we get a signal while the kernel has faulted in spufs_ps_fault. Eg: alarm(1); write(fd, some_spu_psmap_register_address, 4); - the write's copy_from_user will fault on the ps mapping, and signal_pending will be non-zero. Because returning from the fault handler will never clear TIF_SIGPENDING, so we'll just keep faulting, resulting in an unkillable process using 100% of CPU. This change returns VM_FAULT_SIGBUS if there's a fatal signal pending, letting us escape the loop. Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
| | * | Merge branch 'merge' of ↵Paul Mackerras2008-11-242-3/+20
| | |\ \ | | | | | | | | | | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx into merge
| | | * | powerpc/44x: Fix 460EX/460GT machine check handlingBenjamin Herrenschmidt2008-11-131-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those cores use the 440A type machine check (ie, they have MCSRR0/MCSRR1). They thus need to call the appropriate fixup function to hook the right variant of the exception. Without this, all machine checks become fatal due to loss of context when entering the exception handler. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| | | * | powerpc/40x: Limit allocable DRAM during early mappingGrant Erickson2008-11-131-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the size of DRAM is not an exact power of two, we may not have covered DRAM in its entirety with large 16 and 4 MiB pages. If that is the case, we can get non-recoverable page faults when doing the final PTE mappings for the non-large page PTEs. Consequently, we restrict the top end of DRAM currently allocable by updating '__initial_memory_limit_addr' so that calls to the LMB to allocate PTEs for "tail" coverage with normal-sized pages (or other reasons) do not attempt to allocate outside the allowed range. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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