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* Blackfin arch: add read/write IO accessor functions to BlackfinBryan Wu2008-10-161-0/+30
| | | | | | | This is to kill some compiling warning on DM9000 netdev driver. Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - some serial header files set RTS to an input when ↵Sonic Zhang2008-10-132-2/+2
| | | | | | | | they should all be outputs Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2008-10-1526-284/+256
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: MIPS: Kill unused <asm/debug.h> inclusions MIPS: IP32: Add platform device for CMOS RTC; remove dead code RTC: M48T35: new RTC driver MIPS: IP27: Switch over to RTC class driver MIPS: DS1286: New RTC driver MIPS: IP22/28: Switch over to RTC class driver MIPS: PCI: Scan busses when they are registered MIPS: WGT634U: Add reset button support MIPS: BCM47xx: Use the new SSB GPIO API MIPS: BCM47xx: Remove references to BCM947XX MIPS: WGT634U: Add machine detection message MIPS: Align .data.cacheline_aligned based on CONFIG_MIPS_L1_CACHE_SHIFT MIPS: show_cpuinfo prints the type of the calling CPU MIPS: Fix wrong branch target in new spin_lock code. MIPS: Have a heart for a lonely, lost header file ...
| * MIPS: Kill unused <asm/debug.h> inclusionsShinya Kuribayashi2008-10-157-8/+0
| | | | | | | | | | Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP32: Add platform device for CMOS RTC; remove dead codeThomas Bogendoerfer2008-10-152-5/+16
| | | | | | | | | | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP27: Switch over to RTC class driverThomas Bogendoerfer2008-10-151-77/+22
| | | | | | | | | | | | | | | | This patchset removes some dead code and creates a platform device for the RTC class driver. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP22/28: Switch over to RTC class driverThomas Bogendoerfer2008-10-155-87/+15
| | | | | | | | | | | | | | | | This patchset removes some dead code and creates a platform device for the RTC class driver. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: PCI: Scan busses when they are registeredAurelien Jarno2008-10-151-27/+53
| | | | | | | | | | | | | | | | | | | | | | The patch below changes register_pci_controller() such that controllers being added after pcibios_init() has run are be scanned immediately. This is needed for example by the BCM47xx PCI controller, which is located on the SSB bus, which is now initialized after the PCI subsystem. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: WGT634U: Add reset button supportAurelien Jarno2008-10-151-0/+37
| | | | | | | | | | | | | | | | This patch adds support for the reset button of WGT634U machine, using GPIO interrupts. Based on a patch from Michel Lespinasse. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM47xx: Use the new SSB GPIO APIAurelien Jarno2008-10-154-74/+58
| | | | | | | | | | | | | | | | | | This patch simplifies the BCM47xx GPIO code by using the new SSB GPIO API, which does a lot things that were implemented directly in the BCM47xx code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: BCM47xx: Remove references to BCM947XXAurelien Jarno2008-10-151-3/+3
| | | | | | | | | | | | | | | | | | This patch removes the remaining reference to the BCM947xx development board codename. Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: WGT634U: Add machine detection messageAurelien Jarno2008-10-151-0/+3
| | | | | | | | | | | | | | This adds a printk message when a WGT634U machine is detected. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Align .data.cacheline_aligned based on CONFIG_MIPS_L1_CACHE_SHIFTDavid Daney2008-10-151-1/+1
| | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: show_cpuinfo prints the type of the calling CPUJohannes Dickgreber2008-10-151-1/+1
| | | | | | | | | | | | | | It should print the type of the Nth processor. Signed-off-by: Johannes Dickgreber <tanzy@gmx.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix wrong branch target in new spin_lock code.Johannes Dickgreber2008-10-151-1/+1
| | | | | | | | | | Signed-off-by: Johannes Dickgreber <tanzy@gmx.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Have a heart for a lonely, lost header file ...Ralf Baechle2008-10-151-0/+46
| | | | | | | | | | | | | | ... and move it to where all its brothers and sisters reside. Requested by Shane McDonald <mcdonald.shane@gmail.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge branch 'next' of ↵Linus Torvalds2008-10-15281-6171/+12899
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (158 commits) powerpc: Fix CHRP PCI config access for indirect_pci powerpc/chrp: Fix detection of Python PCI host bridge on IBM CHRPs powerpc: Fix 32-bit SMP boot on CHRP powerpc: Fix link errors on 32-bit machines using legacy DMA powerpc/pci: Improve detection of unassigned bridge resources hvc_console: Fix free_irq in spinlocked section powerpc: Get USE_STRICT_MM_TYPECHECKS working again powerpc: Reflect the used arguments in machine_init() prototype powerpc: Fix DMA offset for non-coherent DMA powerpc: fix fsl_upm nand driver modular build powerpc/83xx: add NAND support for the MPC8360E-RDK boards powerpc: FPGA support for GE Fanuc SBC610 i2c: MPC8349E-mITX Power Management and GPIO expander driver powerpc: reserve two DMA channels for audio in MPC8610 HPCD device tree powerpc: document the "fsl,ssi-dma-channel" compatible property powerpc: disable CHRP and PMAC support in various defconfigs OF: add fsl,mcu-mpc8349emitx to the exception list powerpc/83xx: add DS1374 RTC support for the MPC837xE-MDS boards powerpc: remove support for bootmem-allocated memory for the DIU driver powerpc: remove non-dependent load fsl_booke PTE_64BIT ...
| * Merge commit 'origin'Benjamin Herrenschmidt2008-10-151872-28462/+112907
| |\ | | | | | | | | | | | | | | | Manual fixup of conflicts on: arch/powerpc/include/asm/dcr-regs.h drivers/net/ibm_newemac/core.h
| * | powerpc: Fix CHRP PCI config access for indirect_pciBenjamin Herrenschmidt2008-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently, indirect_pci was changed to test if the bus number requested is the one hanging straight off the PHB, then it substitutes the bus number with another one contained in a new "self_busno" field of the pci_controller structure. However, this breaks CHRP which didn't initialize this new field, and which relies on having the right bus number passed to the hardware. This fixes it by initializing this variable properly for all CHRP bridges Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/chrp: Fix detection of Python PCI host bridge on IBM CHRPsBenjamin Herrenschmidt2008-10-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The detection of the IBM "Python" PCI host bridge on IBM CHRP machines such as old RS6000 was broken when we changed of_device_is_compatible() from strncasecmp to strcasecmp (dropped the "n" variant) due to the way IBM encodes the chip version. We fix that by instead doing a match on the model property like we do for others bridges in that file. It should be good enough for those machines. If yours is still broken, let me know. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Fix 32-bit SMP boot on CHRPBenjamin Herrenschmidt2008-10-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | prom_init was changed to take a new argument, the address where the kernel is loaded, which is now used to copy the SMP spin loop down before use. However, only head_64.S was adapted to pass this new value, not head_32.S, thus breaking SMP boot on 32-bit SMP CHRP machines. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Fix link errors on 32-bit machines using legacy DMABenjamin Herrenschmidt2008-10-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new merged DMA code will try to access isa_bridge_pcidev when trying to DMA to/from legacy devices. This is however only defined on 64-bit. Fixes this for now by adding the variable, even if it stays NULL. In the long run, we'll make isa-bridge.c common to 32 and 64-bit. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc/pci: Improve detection of unassigned bridge resourcesBenjamin Herrenschmidt2008-10-151-47/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the powerpc PCI layer is not configured to re-assign everything, it currently fails to detect that a PCI to PCI bridge has been left unassigned by the firmware and tries to allocate resource for the default window values in the bridge (0...X) (with the notable exception of a hack we have in there that detects some Apple firmware unassigned bridge resources). This results in resource allocation failures, which are generally fixed up later on but it causes scary warnings in the logs and we have seen the fixup code fall over in some circumstances (a different issue to fix as well). This code improves that by providing a more complete & useful function to intuit that a bridge was left unassigned by the firmware, and thus force a full re-allocation by the PCI code without trying to allocate the existing useless resources first. The algorithm we use basically considers unassigned a window that starts at 0 (PCI address) if the corresponding address space enable bit is not set. In addition, for memory space, it considers such a resource unassigned also if the host bridge isn't configured to forward cycles to address 0 (ie, the resource basically overlaps main memory). This fixes a range of problems with things like Bare-Metal support on pSeries machines, or attempt to use partial firmware PCI setup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Get USE_STRICT_MM_TYPECHECKS working againDavid Gibson2008-10-146-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The typesafe version of the powerpc pagetable handling (with USE_STRICT_MM_TYPECHECKS defined) has bitrotted again. This patch makes a bunch of small fixes to get it back to building status. It's still not enabled by default as gcc still generates worse code with it for some reason. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Reflect the used arguments in machine_init() prototypeSebastian Andrzej Siewior2008-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The "phys" argument to machine_init() isn't used and isn't likely to ever be so let's remove it. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | powerpc: Fix DMA offset for non-coherent DMABenjamin Herrenschmidt2008-10-142-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Becky's work we can almost have different DMA offsets between on-chip devices and PCI. Almost because there's a problem with the non-coherent DMA code that basically ignores the programmed offset to use the global one for everything. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | Merge commit 'kumar/kumar-next'Benjamin Herrenschmidt2008-10-1460-166/+614
| |\ \
| | * | powerpc: fix fsl_upm nand driver modular buildAnton Vorontsov2008-10-132-48/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fsl_upm nand driver fails to build because fsl_lbc_lock isn't exported, the lock is needed by the inlined fsl_upm_run_pattern() function: ERROR: "fsl_lbc_lock" [drivers/mtd/nand/fsl_upm.ko] undefined! Dave Jones purposed to export the lock, but it is better to just uninline the fsl_upm_run_pattern(). When uninlined we also no longer need the exported fsl_lbc_regs, and both fsl_lbc_lock and fsl_lbc_regs could be marked static. While at it, also add some missing includes that we should have included explicitly. Reported-by: Dave Jones <davej@redhat.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/83xx: add NAND support for the MPC8360E-RDK boardsAnton Vorontsov2008-10-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The StMicro NAND chip (512Mbit, 64MB) is connected to the local bus, the first local bus' user-programmable machine is configured by the firmware to work with NAND chips. QE GPIO pin is used to poll the NAND's Ready-Not-Busy signal. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: FPGA support for GE Fanuc SBC610Martyn Welch2008-10-132-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This patch adds support for the registers held in the devices main FPGA, exposing extra information about the revision of the board through cpuinfo. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: reserve two DMA channels for audio in MPC8610 HPCD device treeTimur Tabi2008-10-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale Elo DMA driver binds to all DMA channels in the device tree that are compatible with "fsl,eloplus-dma-channel". This conflicts with the sound drivers for the MPC8610 HPCD. On this board, the SSI uses two DMA channels and therefore those channels are not available for general purpose use. We change the compatible properties for these channels "fsl,ssi-dma-channel". This works because the sound drivers don't actually check the compatible property when it grabs channels. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: disable CHRP and PMAC support in various defconfigsTimur Tabi2008-10-1321-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because CHRP and PMAC are by default enabled, several non-CHRP and non-PMAC PowerPC defconfigs will have these Kconfig options set erroneously. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/83xx: add DS1374 RTC support for the MPC837xE-MDS boardsAnton Vorontsov2008-10-133-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC is sitting on the I2C1 bus at address 0x68. RTC interrupt signal is connected to the IPIC's EXT3 interrupt line. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: remove support for bootmem-allocated memory for the DIU driverTimur Tabi2008-10-133-46/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Early versions of the Freescale DIU framebuffer driver depended on a bootmem allocation of memory for the video buffer. The need for this feature was removed in commit 6b51d51a, so now we can remove the platform-specific code that allocated that memory. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: remove non-dependent load fsl_booke PTE_64BITMilton Miller2008-10-131-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | b38fd42ff46a4a31dced8533e8a6e549693500b6 added false dependencys to order the load of upper and lower halfs of the pte, but only adjusted whitespace instead of deleting the old load in the iside handler, letting the hardware see the non-dependent load. This patch removes the extra load. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/5121: Add PCI support.John Rigby2008-10-134-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Uses mpc83xx_add_bridge in fsl_pci.c Adds second register tuple to pci node register property as done for 83xx device trees in a previous patch. Signed-off-by: John Rigby <jrigby@freescale.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: 83xx: pci: Remove need for get_immrbase from mpc83xx_add_bridge.John Rigby2008-10-1317-37/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify mpc83xx_add_bridge to get config space register base address from the device tree instead of immr + hardcoded offset. 83xx pci nodes have this change: register properties now contain two address length tuples: First is the pci bridge register base, this has always been there. Second is the config base, this is new. This is documented in dts-bindings/fsl/83xx-512x-pci.txt The changes accomplish these things: mpc83xx_add_bridge no longer needs to call get_immrbase it uses hard coded addresses if the second register value is missing Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/fsl: Hide MPC5121 pci bridge.John Rigby2008-10-131-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The class of the MPC5121 pci host bridge is PCI_CLASS_BRIDGE_OTHER while other freescale host bridges have class set to PCI_CLASS_PROCESSOR_POWERPC. This patch makes fixup_hide_host_resource_fsl match PCI_CLASS_BRIDGE_OTHER in addition to PCI_CLASS_PROCESSOR_POWERPC. Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/83xx: don't probe broken PCI on mpc837x_mds boardsAnton Vorontsov2008-10-131-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the standalone setup the board's CPLD disables the PCI internal arbiter, thus any access to the PCI bus will hang the board. The common way to disable particular devices in the device tree is to put the "status" property with any value other than "ok" or "okay" into the device node we want to disable. So, when there is no PCI arbiter on the bus the u-boot adds status = "broken (no arbiter)" property into the PCI controller's node, and so marks the PCI controller as unavailable. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/QE: move QE_GPIO Kconfig symbol into the platforms/KconfigAnton Vorontsov2008-10-132-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifying user-selectable option in the qe_lib/Kconfig was a bad idea because the qe_lib/Kconfig is included into the top level Kconfig, and thus the QE_GPIO option appears at the top level menu. This patch effectively moves the QE_GPIO option under the platform menu instead. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: make Freescale QE support a selectable Kconfig optionTimur Tabi2008-10-133-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the Kconfig so that Freescale QUICC Engine (QE) support is a selectable option, thereby allowing users to compile kernels without any QE support. The drawback is that QE support is now disabled by default on platforms that have a QE, and so a defconfig is needed to enable QE and QE devices (like UCC GETH). Fortunately, all the current relevant defconfigs do that already. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc: GE Fanuc's FPGA based PIC controller on the SBC610Martyn Welch2008-10-135-6/+327
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the SBC610 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). A number of MPC8641D based route interrupts for on-board interrupts through a FPGA based interrupt controller, which is chained with the MPC8641D's mpic. This patch provides a basic driver to allow basic routing of interrupts to the mpic. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * | powerpc/85xx: Wire up RTC interrupt on MPC8536DSKumar Gala2008-10-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add interrupt info to the MPC8536DS .dts for the RTC Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | Merge commit 'gcl/gcl-next'Benjamin Herrenschmidt2008-10-142-6/+12
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| | * | powerpc/mpc5200: Silence warnings in arch/powerpc/platforms/52xx/mpc52xx_pci.cTony Breeds2008-10-081-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Explicitly cast resource fields to unsigned long long, and match format specifier. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | powerpc/mpc5200: trivial printk-fixes in mpc52xx_commonWolfram Sang2008-10-081-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - one printk was missing a loglevel - remove double space while we are here Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | powerpc/smp: No need to set_need_resched when getting a resched IPIMilton Miller2008-10-131-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment in the code was asking "Do we have to do this?", and according to x86 and s390 the answer is no, the scheduler will do it before calling the arch hook. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/xics: Reduce and comment xics IPI use of memory barriersMilton Miller2008-10-131-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A single full sync (mb()) is requrired to order the mmio to the qirr reg with the set or clear of the message word. However, test_and_clear_bit has the effect of smp_mb() and we are not doing any other io from here, so we don't need a mb per bit processed. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/xics: Make printk format strings fit on one lineMilton Miller2008-10-131-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several printks were broken at word boundaries for line length. Some even referred to old function names. Using __func__ and changing the text slightly for the format allows these printk formats to fit on one line. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/xics: Mark xics IPI interrupt as per-cpuMilton Miller2008-10-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It is physically per-cpu, and we want the irq layer to treat it that way. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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