summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'usb-next' of ↵Linus Torvalds2011-03-1636-400/+1248
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6 * 'usb-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb-2.6: (172 commits) USB: Add support for SuperSpeed isoc endpoints xhci: Clean up cycle bit math used during stalls. xhci: Fix cycle bit calculation during stall handling. xhci: Update internal dequeue pointers after stalls. USB: Disable auto-suspend for USB 3.0 hubs. USB: Remove bogus USB_PORT_STAT_SUPER_SPEED symbol. xhci: Return canceled URBs immediately when host is halted. xhci: Fixes for suspend/resume of shared HCDs. xhci: Fix re-init on power loss after resume. xhci: Make roothub functions deal with device removal. xhci: Limit roothub ports to 15 USB3 & 31 USB2 ports. xhci: Return a USB 3.0 hub descriptor for USB3 roothub. xhci: Register second xHCI roothub. xhci: Change xhci_find_slot_id_by_port() API. xhci: Refactor bus suspend state into a struct. xhci: Index with a port array instead of PORTSC addresses. USB: Set usb_hcd->state and flags for shared roothubs. usb: Make core allocate resources per PCI-device. usb: Store bus type in usb_hcd, not in driver flags. usb: Change usb_hcd->bandwidth_mutex to a pointer. ...
| * ARM: tegra: Add support for Tegra USB PHYsBenoit Goby2011-03-114-0/+885
| | | | | | | | | | | | | | | | Interface used by Tegra's gadget driver and ehci driver to power on and configure the USB PHYs. Signed-off-by: Benoit Goby <benoit@android.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * ARM: s3c24xx: Switch to common GPIO controlled UDC pullup implementationLars-Peter Clausen2011-03-076-129/+7
| | | | | | | | | | | | | | | | | | | | | | Currently all boards using the s3c2410_udc driver use a GPIO to control the state of the pullup, as a result the same code is reimplemented in each board This patch changes these boards to use the common implementation for GPIO controlled pullup in the UDC driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * USB: s3c2410_udc: Add common implementation for GPIO controlled pullupsLars-Peter Clausen2011-03-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | Currently all boards using the s3c2410_udc driver use a GPIO to control the state of the pullup, as a result the same code is reimplemented in each board file. This patch adds support for using a GPIO to control the pullup state to the udc driver, so the boards can use a common implementation. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * arm: omap4: 4430sdp: drop ehci supportAnand Gadiyar2011-03-071-19/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most revisions of the OMAP4 Blaze/SDP platform do not have the EHCI signals routed by default. The pads are routed for the alternate HSI functionality instead, and explicit board modifications are needed to route the signals to the USB PHY on the board. Also, turning on the PHY connected to the EHCI port causes a board reboot during bootup due to an unintended short on the rails - this affects many initial revisions of the board, and needs a minor board mod to fix (or as a workaround, one should not attempt to power on the USB PHY). Given that these boards need explicit board mods to even get EHCI working (separate from the accidental short above), we should not attempt to enable EHCI by default. So drop the EHCI support from the board files for the Blaze/SDP platforms. Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Cc: Keshava Munegowda <keshava_mgowda@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * arm: omap: usb: clock entries for omap3 and omap4Keshava Munegowda2011-03-012-10/+19
| | | | | | | | | | | | | | | | | | | | | | The devices of clocks are set to usbhs, so that only usbhs common driver can invoke these clocks. The dummy per port clocks are added to omap3 clock data base. This helps to invoke common clock get APIs for omap3 and omap4. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap: usb: cleanup ehci and ohci resources and devicesKeshava Munegowda2011-03-012-154/+26
| | | | | | | | | | | | | | | | | | The prototype and defination of functions usb_ehci_init and usb_ohci_init are removed. The ehci and ohci devices are removed since usbhs device contains both ehci and ohci details. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap: usb: Invoke usbhs core device initializationKeshava Munegowda2011-03-0118-18/+18
| | | | | | | | | | | | | | | | The usbhs intialization is invoked by all omap3 and omap4 variant board files. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap: usb: usbhs core device initializationKeshava Munegowda2011-03-012-14/+183
| | | | | | | | | | | | | | | | | | | | | | A new usbhs platform device is defined; this device will be the parent device of ehci and ohci platform devices. the usbhs_init function is defined which does the usbhs device initialization and I/O mux of ehci and ohci. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: host: omap: common usb host core driverKeshava Munegowda2011-03-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | enabling and disabling the common clocks for ehci and ohci is implemented. usbhs is a common parent platform driver for EHCI and OHCI driver. This driver receives the clock enable and disable requests from ehci and ohci drivers.The UHH and TLL initialization is also performed. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap: usb: create common enums and structures for ehci and ohciKeshava Munegowda2011-03-0120-136/+152
| | | | | | | | | | | | | | | | Create the ehci and ohci specific platform data structures. The port enum values are made common for both ehci and ohci. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap2: usb: rename usb-ehci.c to usb-host.cFelipe Balbi2011-03-012-5/+5
| | | | | | | | | | | | | | | | We already have both EHCI and OHCI there, so let's rename to be sure everybody will understand the entire USB HOST functionality is setup on this file. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * arm: omap: usb: host: add names to resourcesFelipe Balbi2011-03-011-0/+9
| | | | | | | | | | | | | | | | add names to EHCI and OHCI resources. That will help us identify the resource correctly when moving to a setup where OHCI and EHCI play well together. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: musb: OMAP4430: Power down the PHY during board initHema HK2011-03-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | Powerdown the internal PHY during board init for OMAP44xx. So that when musb is disabled core transition to retention/off is not blocked. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: otg: OMAP4430: Save/restore the contextHema HK2011-03-011-0/+7
| | | | | | | | | | | | | | | | | | | | Add the context save/restore for the control module register used for OMAP4430 musb with UTMI embedded PHY interface. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: otg: OMAP4430: Introducing suspend function for power managementHema HK2011-02-184-7/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduced the suspend/resume function for the OMAP4430 internal PHY. This will be used by the twl6030-usb transceiver driver. Moved the clock enable/disable function calls and power on/off of the PHY code from power on/off functions to suspend/resume function. Pass the suspend function through board data for OMAP4430sdp and OMAP4panda. This will be used by the twl6030-usb transceiver driver. Signed-off-by: Hema HK <hemahk@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* | Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegraLinus Torvalds2011-03-1642-1039/+3784
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://android.git.kernel.org/kernel/tegra: (61 commits) ARM: tegra: trimslice: initialize PCI-e only when running on TrimSlice ARM: tegra: add PCI Express power gating ARM: tegra: PCIE minor code refactoring ARM: Tegra: DMA: Fail safe if initialization fails ARM: Tegra: Rename clk_dev1/2 to cdev1/2 ARM: Tegra: Rename I2S clocks to match driver name ARM: Tegra: Make tegra_dma_init a postcore_initcall ARM: tegra: add seaboard, wario and kaen boards ARM: tegra: harmony: fix pinmux for MMC slot ARM: tegra: harmony: register sdhci devices ARM: tegra: remove stale nvidia atag handler ARM: tegra: common device resources ARM: tegra: harmony: move over to tegra_gpio_config ARM: tegra: add tegra_gpio_table and tegra_gpio_config ARM: tegra: Hide EMC scaling config behind ARCH_TEGRA ARM: tegra: Fix typo in TEGRA_IRQ_TO_GPIO ARM: tegra: common: Enable core clocks ARM: tegra: timer: Enable timer and rtc clocks ARM: tegra: Move tegra_common_init to tegra_init_early ARM: tegra: clock: prevent accidental disables of cpu clock ...
| * | ARM: tegra: trimslice: initialize PCI-e only when running on TrimSliceMike Rapoport2011-03-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently tegra_pcie_init is effectively called as subsys_initcall. With multiplatform kernel this may cause hangs on boards that don't intend to support Tegra2 PCI-e. Ensure that TrimSlice board code initializes PCI-e only when actually running on the TrimSlice. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: add PCI Express power gatingMike Rapoport2011-03-031-2/+20
| | | | | | | | | | | | | | | Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: PCIE minor code refactoringMike Rapoport2011-03-031-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Move tegra_pcie_power_off before tegra_pcie_power_on for clean addition of PCIE power gating Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: Tegra: DMA: Fail safe if initialization failsStephen Warren2011-02-231-12/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tegra_dma_init currently simply bails out early if any initialization fails. This skips various data-structure initialization. In turn, this means that tegra_dma_allocate_channel can still hand out channels. In this case, when tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking on ch->list will OOPS since the list's next/prev pointers may still be NULL. To solve this, add an explicit "initialized" flag, only set this once _init has fully completed successfully, and have _allocate_channel refuse to hand out channels if this is not set. While at it, simplify _init: * Remove redundant memsets * Use bitmap_fill to mark all channels as in-use up-front, and remove some now-redundant bitmap initialization loops. * Only mark a channel as free once all channel-related initialization has completed. Finally, the successful exit path from _init always has ret==0, so just hard-code that return. The error path still returns ret. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: Tegra: Rename clk_dev1/2 to cdev1/2Stephen Warren2011-02-231-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ASoC machine driver was written assuming my previous patch to add complete support for these clocks, which named them cdev1/2. Rename the clocks to match that, to avoid churn in the ASoC driver. This rename also makes the clocks more consistent with other Tegra clocks irrespective of any of that. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: Tegra: Rename I2S clocks to match driver nameStephen Warren2011-02-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The driver is tegra-i2s not just i2s. Rename the clocks to match, so that clk_get_sys can look up by driver name. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: Tegra: Make tegra_dma_init a postcore_initcallStephen Warren2011-02-232-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit makes the Tegra APB DMA engine fail to initialize correctly: 0cf6230af909a86f81907455eca2a5c9b8f68fe6 ARM: tegra: Move tegra_common_init to tegra_init_early The reason is that tegra_init_early_ calls tegra_dma_init which calls request_threaded_irq, which fails since the IRQ hasn't yet been marked valid; that only happens in tegra_init_irq, which gets called after tegra_init_early. This used to work OK, since tegra_init_early was tegra_common_init, which got called after tegra_init_irq, basically from the beginning of tegra_harmony_init. Solve this by converting tegra_dma_init to a postcore_initcall. This makes it execute late enough that IRQs are marked valid, and avoids having to add it back to every machine's init function. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: add seaboard, wario and kaen boardsOlof Johansson2011-02-225-0/+435
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds board support for the Seaboard eval platform and some of the derivatives that are very similar. Since they only differ in some very minor ways, most of the code is shared. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: harmony: fix pinmux for MMC slotOlof Johansson2011-02-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Turns out MMC2 (the bayonet 4-lane port) wasn't enabled in the original pinmux. Fix that. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: harmony: register sdhci devicesOlof Johansson2011-02-221-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the 3 sdhci devices that are available on Harmony as platform devices. Two go to slots (one 4-lane, one 8-lane), and one goes to onboard wifi. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: remove stale nvidia atag handlerOlof Johansson2011-02-221-25/+0
| | | | | | | | | | | | | | | | | | | | | Remove dead atag handling code for nvidia-specific tags. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: common device resourcesOlof Johansson2011-02-223-0/+552
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common location to register resources for used on-chip devices that are commonly configured on boards. Devices will be added to this file as more drivers are added that can make use of them. This is based on work contributed by several people, most of it from Colin Cross and Erik Gilling. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: harmony: move over to tegra_gpio_configOlof Johansson2011-02-221-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move harmony over to use the new gpio config table instead of having separate settings in various parts of the code. (The tegra sdhci driver should have the tegra_gpio_* ops removed, but that will be done separately from this change.) Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Erik Gilling <konkers@android.com>
| * | ARM: tegra: add tegra_gpio_table and tegra_gpio_configOlof Johansson2011-02-222-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To give one place to setup the pins that are used as GPIOs instead of as their pinmuxed functions. Specifying enabled as false explicitly disables the gpio mode of that pin (if left on by firmware). This should remove the need for calling these from specific drivers and thus reduce tegra-specific code from them. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Erik Gilling <konkers@android.com>
| * | ARM: tegra: Hide EMC scaling config behind ARCH_TEGRAMark Brown2011-02-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The option isn't terribly useful on other ARM platforms. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: Fix typo in TEGRA_IRQ_TO_GPIOStephen Warren2011-02-221-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: common: Enable core clocksColin Cross2011-02-221-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the cpu, emc (memory controller) and csite (debug and trace controller) clocks during init to prevent them from being disabled by the bootloader clock disabling code. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: timer: Enable timer and rtc clocksColin Cross2011-02-221-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | Enable the timer and rtc clocks to prevent them being turned off by the bootloader clock disabling code. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: Move tegra_common_init to tegra_init_earlyColin Cross2011-02-224-10/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move tegra_common_init to tegra_init_early, and set it as the init_early entry in the machine struct. Initializes the clocks earlier so that timers can enable their clocks. Also reorders the members in the Harmony and Trimslice boards' machine structs to match the order they are called in. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: clock: prevent accidental disables of cpu clockColin Cross2011-02-221-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Peripheral clocks that have no clock enable bit in the enable registers have their clk_num set to 0. Bit 0 in the clock enable registers is the CPU clock. Prevent disables on these peripheral clocks from accidentally disabling the CPU clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: clock: Round rate before setting rateColin Cross2011-02-222-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call the clock's round_rate op, if it exists, before calling the set_rate op. This will help later when dvfs is added, dvfs needs to know what the final rate will be before the frequency changes. Also requires fixes to the round rate functions to ensure calling round rate and then set rate will not cause the frequency to be rounded down twice. When picking clock divider values, the clock framework picks the closest frequency that is lower than the requested frequency. If the new frequency calculated from the divider value is rounded down, and then passed to set_rate, it will get rounded down again, possibly resulting in a frequency two steps lower than the original requested frequency. Fix the problem by rounding up when calculating the frequency coming out of a clock divider, so if that frequency is requested again, the same divider value will be picked. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: clock: Refcount periph clock enablesColin Cross2011-02-221-6/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some peripheral clocks share enable bits. Refcount the enables so that calling clk_disable on one clock will not turn off another clock. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
| * | ARM: tegra: clock: Miscellaneous clock updatesColin Cross2011-02-211-31/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct max rates for pclk and sclk (Originally fixed by Dima Zavin <dima@android.com>) Correct max rate for plla (Originally fixed by Stephen Warren <swarren@nvidia.com>) Remove unnecessary no-op set_rate on audio clocks Add clock lookup entries for grhost, bsea, and vde clocks Update clock clookup entries for vcp, bsea, and vde clocks Add shared clock entries for sclk and emc Add a virtual cop clock to provide a reset op (Originally fixed by Dima Zavin <dima@android.com>) Pass set_rate on super clocks through to parent Fix pllx frequency table entry for 608 MHz Remove incorrect plla frequency table entries Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Fix clock issues in suspendColin Cross2011-02-211-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PLLP registers are now being restored by the low-level resume code, and the CPU may be running off PLLP, so don't touch them during clock resume. Save plld, plls, pllu, and audio clock during suspend (originally fixed by Mayuresh Kulkarni <mkulkarni@nvidia.com>) The lock time for plld is 1000 us, so increase the delay after setting the PLLs. Add a BUG_ON to ensure the size of the suspend context area is correct. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Add function to set SDMMC tap delayColin Cross2011-02-214-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SDMMC controllers have extra bits in the clock source register that adjust the delay between the clock and data to compenstate for delays on the PCB. The values need to be set from the clock code so the clock can be locked during the read-modify-write on the clock source register. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: cpufreq: Adjust memory frequency with cpu frequencyColin Cross2011-02-211-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adjusts the minimum memory frequency when the cpu frequency changes. The values are currently hardcoded to a reasonable default. If memory frequency scaling is not enabled this patch will have no effect. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clocks: Add emc scalingColin Cross2011-02-211-1/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock ops on the emc peripheral clock that call into the emc driver to update the memory controller registers for the new frequency. Tegra has an interlock between the clock controller and the memory controller that prevents the new register values from taking effect until the clock frequency update occurs. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: Add external memory controller driverColin Cross2011-02-214-0/+209
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The frequency memory bus on Tegra can be adjusted without disabling accesses to memory by updating the memory configuration registers from a per-board table, and then changing the clock frequency. The clock controller and memory controller have an interlock that prevents the new memory registers from taking effect until the clock frequency change. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Minor cleanupsColin Cross2011-02-213-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary uses of #ifdef CONFIG_DEBUG_FS Convert bool assignments from 1 to true Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Add shared bus clock typeColin Cross2011-02-212-0/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some clocks may have multiple downstream users that need to request a higher clock rate. Shared bus clocks provide a unique shared_bus_user clock to each user. The frequency of the bus is set to the highest enabled shared_bus_user clock, with a minimum value set by the shared bus. Drivers can use clk_enable and clk_disable to enable or disable their requirement, and clk_set_rate to set the minimum rate. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: cpufreq: Take an extra reference to pllxColin Cross2011-02-212-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During cpu frequency changes, take an extra reference to pllx so that it doesn't turn off and on while the cpu is temporarily on pllp. If the cpu is moved to pllp permanently, pllx will be turned off. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Convert global lock to a lock per clockColin Cross2011-02-214-167/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Give each clock its own lock, and remove all lock traversals from parent to child clocks to prevent AB-BA deadlocks. This brings the locking in line with the common struct clk patches and should make conversion simple. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
| * | ARM: tegra: clock: Move unshared clk struct members into unionColin Cross2011-02-212-143/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | Creates a union of a struct for each type of clock to reduce memory usage and clarify which members are used by all clocks and which are used by a single type. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
OpenPOWER on IntegriCloud