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* OMAP3630: PM: Erratum i608: disable RTANishanth Menon2010-12-215-2/+56
| | | | | | | | | | | | | | | | | | | | | | | | | Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: pm: introduce errata handlingNishanth Menon2010-12-212-0/+16
| | | | | | | | | Introduce errata handling for OMAP3. This patch introduces errata variable and stub for initialization which will be filled up by follow-on patches. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Erratum i581 support: dll kick strategyPeter 'p2' De Schrijver2010-12-211-5/+50
| | | | | | | | | | | | | | | | | | | | | | | | | Erratum i581 impacts OMAP3 platforms. PRCM DPLL control FSM removes SDRC_IDLEREQ before DPLL3 locks causing the DPLL not to be locked at times. IMPORTANT: *) This is not a complete workaround implementation as recommended by the silicon erratum. This is a support logic for detecting lockups and attempting to recover where possible and is known to provide stability in multiple platforms. *) This code is mostly important for inactive and retention. The ROM code waits for the maximum DLL lock time when resuming from off mode. So for off mode this code isn't really needed. *) counters are introduced here for eventual export to userspace once the cleanups are completed. This should eventually get refactored as part of cleanups to sleep34xx.S Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Update clean_l2 to use v7_flush_dcache_allRichard Woodruff2010-12-211-66/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Analysis in TI kernel with ETM showed that using cache mapped flush in kernel instead of SO mapped flush cost drops by 65% (3.39mS down to 1.17mS) for clean_l2 which is used during sleep sequences. Overall: - speed up - unfortunately there isn't a good alternative flush method today - code reduction and less maintenance and potential bug in unmaintained code This also fixes the bug with the clean_l2 function usage. Reported-by: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: ported rkw's proposal to 2.6.37-rc2] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Richard Woodruff <r-woodruff2@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP: pm.c correct the initcall for an early init.Thara Gopinath2010-12-211-1/+1
| | | | | | | | | | | | | | | omap2_common_pm_init is the API where generic system devices like mpu, l3 etc get initialized. This has to happen really early on during the boot and not at a later time. This is especially important with the new opp changes as these devices need to be built before the opp tables init happen. Today both are device initcalls and it works just because of the order of compilation. Making this postcore_initcall is ideal because the omap device layer init happens as a core_initcall and typically rest of the driver/device inits are arch_initcall or something lower. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2+: disable idle early in the suspend sequenceJean Pihet2010-12-213-41/+6
| | | | | | | | | | | | | | | | | Some bad interaction between the idle and the suspend paths has been identified: the idle code is called during the suspend enter and exit sequences. This could cause corruption or lock-up of resources. The solution is to move the calls to disable_hlt at the very beginning of the suspend sequence (ex. in omap3_pm_begin instead of omap3_pm_prepare), and the call to enable_hlt at the very end of the suspend sequence (ex. in omap3_pm_end instead of omap3_pm_finish). Tested with RET and OFF on Beagle and OMAP3EVM. Signed-off-by: Jean Pihet <j-pihet@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* Merge branch 'rmobile-fixes-for-linus' of ↵Linus Torvalds2010-12-202-5/+27
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 * 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: ARM: mach-shmobile: INTC interrupt priority level demux fix ARM: mach-shmobile: fix compile warning in mm/init.c
| * ARM: mach-shmobile: INTC interrupt priority level demux fixMagnus Damm2010-12-171-4/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix interrupt priority level handling on SH-Mobile ARM. SH-Mobile ARM platforms using multiple interrupt priority levels need this patch to fix a potential dead lock that may occur if multiple interrupts with different levels are pending simultaneously. The default INTC configuration is to use the same priority level for all interrupts, so this issue does not trigger by default. It is however common for board code to override the interrupt priority for certain interrupt sources depending on the application. Without this fix such boards may lock up. In detail, this patch updates the INTC code in entry-macro.S to make sure that the INTLVLA register gets set as expected. To trigger this bug modify the board specific code to adjust the interrupt priority level for the ethernet chip. After changing the priority level simply use flood ping to drown the board with interrupts. This patch applies to INTCA-based processors such as sh7372, sh7377 and sh7372. GIC-based processors are not affected. Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36. Cc: stable@kernel.org Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * ARM: mach-shmobile: fix compile warning in mm/init.cMagnus Damm2010-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Turn down the warning noise from the compiler, basically a SH-Mobile specific version of the patch located in the RMK patch tracker: 6484/1: "fix compile warning in mm/init.c", Without this patch the following warning triggers: CC arch/arm/kernel/sys_arm.o arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:606: warning: format '%08lx' expects type 'long unsigned int', but argument 12 has type 'unsigned int' CC arch/arm/kernel/traps.o Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | Merge branch 's5p-fixes-for-linus' of ↵Linus Torvalds2010-12-206-2/+23
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung * 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S5PV210: update MAX8998 platform data to get rid of WARN() ARM S3C24XX: Fix compilation of PM code for S3C2416 ARM: S3C24XX: Fix CONFIG_S3C_DEV_NAND Kconfig entry
| * | ARM: S5PV210: update MAX8998 platform data to get rid of WARN()Marek Szyprowski2010-12-172-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds new entries required by the new version of MAX8998 driver. Without them, the driver fails to init. See commit 50f19a4596 Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM S3C24XX: Fix compilation of PM code for S3C2416Yauhen Kharuzhy2010-12-173-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | S3C2416 PM code uses low-level sleep routines from S3C2412 code, but these routines are compiled only for S3C2412 SoC. Split S3C2412_PM to two parts: S3C2412_PM, S3C2412_PM_SLEEP and select last in S3C2416's Kconfig. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S3C24XX: Fix CONFIG_S3C_DEV_NAND Kconfig entryKukjin Kim2010-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | Should be CONFIG_S3C_DEV_NAND instead of CONFIG_S3C_DEVICE_NAND. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | clarify a usage constraint for cnt32_to_63()Nicolas Pitre2010-12-201-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cnt32_to_63 algorithm relies on proper counter data evaluation ordering to work properly. This was missing from the provided documentation. Let's augment the documentation with the missing usage constraint and fix the only instance that got it wrong. Signed-off-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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*-. \ \ Merge branches 'x86-fixes-for-linus' and 'perf-fixes-for-linus' of ↵Linus Torvalds2010-12-198-28/+38
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86-32: Make sure we can map all of lowmem if we need to x86, vt-d: Handle previous faults after enabling fault handling x86: Enable the intr-remap fault handling after local APIC setup x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode x86, vt-d: Quirk for masking vtd spec errors to platform error handling logic x86, xsave: Use alloc_bootmem_align() instead of alloc_bootmem() bootmem: Add alloc_bootmem_align() x86, gcc-4.6: Use gcc -m options when building vdso x86: HPET: Chose a paranoid safe value for the ETIME check x86: io_apic: Avoid unused variable warning when CONFIG_GENERIC_PENDING_IRQ=n * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf: Fix off by one in perf_swevent_init() perf: Fix duplicate events with multiple-pmu vs software events ftrace: Have recordmcount honor endianness in fn_ELF_R_INFO scripts/tags.sh: Add magic for trace-events tracing: Fix panic when lseek() called on "trace" opened for writing
| * | | | x86-32: Make sure we can map all of lowmem if we need toH. Peter Anvin2010-12-162-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A relocatable kernel can be anywhere in lowmem -- and in the case of a kdump kernel, is likely to be fairly high. Since the early page tables map everything from address zero up we need to make sure we allocate enough brk that we can map all of lowmem if we need to. Reported-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Tested-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4D0AD3ED.8070607@kernel.org>
| * | | | x86: Enable the intr-remap fault handling after local APIC setupKenji Kaneshige2010-12-132-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt-remapping gets enabled very early in the boot, as it determines the apic mode that the processor can use. And the current code enables the vt-d fault handling before the setup_local_APIC(). And hence the APIC LDR registers and data structure in the memory may not be initialized. So the vt-d fault handling in logical xapic/x2apic modes were broken. Fix this by enabling the vt-d fault handling in the end_local_APIC_setup() A cleaner fix of enabling fault handling while enabling intr-remapping will be addressed for v2.6.38. [ Enabling intr-remapping determines the usage of x2apic mode and the apic mode determines the fault-handling configuration. ] Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> LKML-Reference: <20101201062244.541996375@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: stable@kernel.org [v2.6.32+] Acked-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | | | x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic modeKenji Kaneshige2010-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In x2apic mode, we need to set the upper address register of the fault handling interrupt register of the vt-d hardware. Without this irq migration of the vt-d fault handling interrupt is broken. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> LKML-Reference: <1291225233.2648.39.camel@sbsiddha-MOBL3> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: stable@kernel.org [v2.6.32+] Acked-by: Chris Wright <chrisw@sous-sol.org> Tested-by: Takao Indoh <indou.takao@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| * | | | x86, xsave: Use alloc_bootmem_align() instead of alloc_bootmem()Suresh Siddha2010-12-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alignment of alloc_bootmem() depends on the value of L1_CACHE_SHIFT. What we need here, however, is 64 byte alignment. Use alloc_bootmem_align() and explicitly specify the alignment instead. This fixes a kernel boot crash reported by Jody when the cpu in .config is set to MPENTIUMII but the kernel is booted on a xsave-capable CPU. Reported-by: Jody Bruchon <jody@nctritech.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> LKML-Reference: <20101116212442.059967454@sbsiddha-MOBL3.sc.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: <stable@kernel.org>
| * | | | x86, gcc-4.6: Use gcc -m options when building vdsoH. Peter Anvin2010-12-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vdso Makefile passes linker-style -m options not to the linker but to gcc. This happens to work with earlier gcc, but fails with gcc 4.6. Pass gcc-style -m options, instead. Note: all currently supported versions of gcc supports -m32, so there is no reason to conditionalize it any more. Reported-by: H. J. Lu <hjl.tools@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> LKML-Reference: <tip-*@git.kernel.org> Cc: <stable@kernel.org>
| * | | | x86: HPET: Chose a paranoid safe value for the ETIME checkThomas Gleixner2010-12-131-10/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 995bd3bb5 (x86: Hpet: Avoid the comparator readback penalty) chose 8 HPET cycles as a safe value for the ETIME check, as we had the confirmation that the posted write to the comparator register is delayed by two HPET clock cycles on Intel chipsets which showed readback problems. After that patch hit mainline we got reports from machines with newer AMD chipsets which seem to have an even longer delay. See http://thread.gmane.org/gmane.linux.kernel/1054283 and http://thread.gmane.org/gmane.linux.kernel/1069458 for further information. Boris tried to come up with an ACPI based selection of the minimum HPET cycles, but this failed on a couple of test machines. And of course we did not get any useful information from the hardware folks. For now our only option is to chose a paranoid high and safe value for the minimum HPET cycles used by the ETIME check. Adjust the minimum ns value for the HPET clockevent accordingly. Reported-Bistected-and-Tested-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <alpine.LFD.2.00.1012131222420.2653@localhost6.localdomain6> Cc: Simon Kirby <sim@hostway.ca> Cc: Borislav Petkov <bp@alien8.de> Cc: Andreas Herrmann <Andreas.Herrmann3@amd.com> Cc: John Stultz <johnstul@us.ibm.com>
| * | | | x86: io_apic: Avoid unused variable warning when CONFIG_GENERIC_PENDING_IRQ=nThomas Gleixner2010-12-091-2/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/x86/kernel/apic/io_apic.c: In function 'ack_apic_level': arch/x86/kernel/apic/io_apic.c:2433: warning: unused variable 'desc' Signed-off-by: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <201010272107.o9RL7rse018212@imap1.linux-foundation.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2010-12-185-13/+37
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: handle rt_sigreturn() more cleanly arch/tile: handle CLONE_SETTLS in copy_thread(), not user space
| * | | | arch/tile: handle rt_sigreturn() more cleanlyChris Metcalf2010-12-174-13/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current tile rt_sigreturn() syscall pattern uses the common idiom of loading up pt_regs with all the saved registers from the time of the signal, then anticipating the fact that we will clobber the ABI "return value" register (r0) as we return from the syscall by setting the rt_sigreturn return value to whatever random value was in the pt_regs for r0. However, this breaks in our 64-bit kernel when running "compat" tasks, since we always sign-extend the "return value" register to properly handle returned pointers that are in the upper 2GB of the 32-bit compat address space. Doing this to the sigreturn path then causes occasional random corruption of the 64-bit r0 register. Instead, we stop doing the crazy "load the return-value register" hack in sigreturn. We already have some sigreturn-specific assembly code that we use to pass the pt_regs pointer to C code. We extend that code to also set the link register to point to a spot a few instructions after the usual syscall return address so we don't clobber the saved r0. Now it no longer matters what the rt_sigreturn syscall returns, and the pt_regs structure can be cleanly and completely reloaded. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | | | arch/tile: handle CLONE_SETTLS in copy_thread(), not user spaceChris Metcalf2010-12-171-0/+8
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we were just setting up the "tp" register in the new task as started by clone() in libc. However, this is not quite right, since in principle a signal might be delivered to the new task before it had its TLS set up. (Of course, this race window still exists for resetting the libc getpid() cached value in the new task, in principle. But in any case, we are now doing this exactly the way all other architectures do it.) This change is important for 2.6.37 since the tile glibc we will be submitting upstream will not set TLS in user space any more, so it will only work on a kernel that has this fix. It should also be taken for 2.6.36.x in the stable tree if possible. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Cc: stable <stable@kernel.org>
* | | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2010-12-181-0/+4
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: MIPS: Fix build errors in sc-mips.c
| * | | | MIPS: Fix build errors in sc-mips.cKevin Cernekee2010-12-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Seen with malta_defconfig on Linus' tree: CC arch/mips/mm/sc-mips.o arch/mips/mm/sc-mips.c: In function 'mips_sc_is_activated': arch/mips/mm/sc-mips.c:77: error: 'config2' undeclared (first use in this function) arch/mips/mm/sc-mips.c:77: error: (Each undeclared identifier is reported only once arch/mips/mm/sc-mips.c:77: error: for each function it appears in.) arch/mips/mm/sc-mips.c:81: error: 'tmp' undeclared (first use in this function) make[2]: *** [arch/mips/mm/sc-mips.o] Error 1 make[1]: *** [arch/mips/mm] Error 2 make: *** [arch/mips] Error 2 [Ralf: Cosmetic changes to minimize the number of arguments passed to mips_sc_is_activated] Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1752/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | | | Merge branch 'for-linus' of ↵Linus Torvalds2010-12-185-14/+57
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: x86: avoid high BIOS area when allocating address space x86: avoid E820 regions when allocating address space x86: avoid low BIOS area when allocating address space resources: add arch hook for preventing allocation in reserved areas Revert "resources: support allocating space within a region from the top down" Revert "PCI: allocate bus resources from the top down" Revert "x86/PCI: allocate space from the end of a region, not the beginning" Revert "x86: allocate space within a region top-down" Revert "PCI: fix pci_bus_alloc_resource() hang, prefer positive decode" PCI: Update MCP55 quirk to not affect non HyperTransport variants
| * | | | x86: avoid high BIOS area when allocating address spaceBjorn Helgaas2010-12-172-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This prevents allocation of the last 2MB before 4GB. The experiment described here shows Windows 7 ignoring the last 1MB: https://bugzilla.kernel.org/show_bug.cgi?id=23542#c27 This patch ignores the top 2MB instead of just 1MB because H. Peter Anvin says "There will be ROM at the top of the 32-bit address space; it's a fact of the architecture, and on at least older systems it was common to have a shadow 1 MiB below." Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | | x86: avoid E820 regions when allocating address spaceBjorn Helgaas2010-12-171-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we allocate address space, e.g., to assign it to a PCI device, don't allocate anything mentioned in the BIOS E820 memory map. On recent machines (2008 and newer), we assign PCI resources from the windows described by the ACPI PCI host bridge _CRS. On many Dell machines, these windows overlap some E820 reserved areas, e.g., BIOS-e820: 00000000bfe4dc00 - 00000000c0000000 (reserved) pci_root PNP0A03:00: host bridge window [mem 0xbff00000-0xdfffffff] If we put devices at 0xbff00000, they don't work, probably because that's really RAM, not I/O memory. This patch prevents that by removing the 0xbfe4dc00-0xbfffffff area from the "available" resource. I'm not very happy with this solution because Windows solves the problem differently (it seems to ignore E820 reserved areas and it allocates top-down instead of bottom-up; details at comment 45 of the bugzilla below). That means we're vulnerable to BIOS defects that Windows would not trip over. For example, if BIOS described a device in ACPI but didn't mention it in E820, Windows would work fine but Linux would fail. Reference: https://bugzilla.kernel.org/show_bug.cgi?id=16228 Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | | x86: avoid low BIOS area when allocating address spaceBjorn Helgaas2010-12-173-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements arch_remove_reservations() so allocate_resource() can avoid any arch-specific reserved areas. This currently just avoids the BIOS area (the first 1MB), but could be used for E820 reserved areas if that turns out to be necessary. We previously avoided this area in pcibios_align_resource(). This patch moves the test from that PCI-specific path to a generic path, so *all* resource allocations will avoid this area. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | | Revert "x86/PCI: allocate space from the end of a region, not the beginning"Bjorn Helgaas2010-12-171-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit dc9887dc02e37bcf83f4e792aa14b07782ef54cf. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | | Revert "x86: allocate space within a region top-down"Bjorn Helgaas2010-12-171-1/+0
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 1af3c2e45e7a641e774bbb84fa428f2f0bf2d9c9. Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | | | Merge branch 'for_linus' of git://github.com/at91linux/linux-2.6-at91Linus Torvalds2010-12-175-136/+55
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | * 'for_linus' of git://github.com/at91linux/linux-2.6-at91: at91: Refactor Stamp9G20 and PControl G20 board file at91: Fix uhpck clock rate in upll case
| * | | | at91: Refactor Stamp9G20 and PControl G20 board fileChristian Glindkamp2010-12-174-135/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As PControl G20 is a carrier board for the Stamp9G20 SoM, some code can be shared. Therefore board-stamp9g20.c is refactored to allow reusing the SoM initialization and board-pcontrol-g20.c is modified to use it. Signed-off-by: Christian Glindkamp <christian.glindkamp@taskit.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | at91: Fix uhpck clock rate in upll caseRyan Mallon2010-12-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The uhpck clock should be divided from the utmi clock, not its parent (main). This change is mostly cosmetic as the uhpck rate value is not used anywhere except for the debugfs clock output. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
* | | | | Merge branch 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2010-12-175-12/+15
|\ \ \ \ \ | |/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.37' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: Fix preemption counter leak in kvm_timer_init() KVM: enlarge number of possible CPUID leaves KVM: SVM: Do not report xsave in supported cpuid KVM: Fix OSXSAVE after migration
| * | | | KVM: Fix preemption counter leak in kvm_timer_init()Avi Kivity2010-12-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch from Thomas Meyer. Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | KVM: enlarge number of possible CPUID leavesAndre Przywara2010-12-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the number of CPUID leaves KVM handles is limited to 40. My desktop machine (AthlonII) already has 35 and future CPUs will expand this well beyond the limit. Extend the limit to 80 to make room for future processors. KVM-Stable-Tag. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | KVM: SVM: Do not report xsave in supported cpuidJoerg Roedel2010-12-084-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support xsave properly for the guest the SVM module need software support for it. As long as this is not present do not report the xsave as supported feature in cpuid. As a side-effect this patch moves the bit() helper function into the x86.h file so that it can be used in svm.c too. KVM-Stable-Tag. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * | | | KVM: Fix OSXSAVE after migrationSheng Yang2010-12-081-0/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPUID's OSXSAVE is a mirror of CR4.OSXSAVE bit. We need to update the CPUID after migration. KVM-Stable-Tag. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* | | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2010-12-1628-146/+339
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (28 commits) MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option. MIPS: LD/SD o32 macro GAS fix update MIPS: Alchemy: fix build with SERIAL_8250=n MIPS: Rename mips_dma_cache_sync back to dma_cache_sync MIPS: MT: Fix typo in comment. SSB: Fix nvram_get on BCM47xx platform MIPS: BCM47xx: Swap serial console if ttyS1 was specified. MIPS: BCM47xx: Use sscanf for parsing mac address MIPS: BCM47xx: Fill values for b43 into SSB sprom MIPS: BCM47xx: Do not read config from CFE MIPS: FDT size is a be32 MIPS: Fix CP0 COUNTER clockevent race MIPS: Fix regression on BCM4710 processor detection MIPS: JZ4740: Fix pcm device name MIPS: Separate two consecutive loads in memset.S MIPS: Send proper signal and siginfo on FP emulator faults. MIPS: AR7: Fix loops per jiffies on TNETD7200 devices MIPS: AR7: Fix double ar7_gpio_init declaration MIPS: Rework GENERIC_HARDIRQS Kconfig. MIPS: Alchemy: Add return value check for strict_strtoul() ...
| * | | MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option.David Daney2010-12-161-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For huge page support with base page size of 16K or 32K, we have to increase the MAX_ORDER so that huge pages can be allocated. [Ralf: I don't think a user should have to configure obscure constants like this but for the time being this will have to suffice.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1685/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: LD/SD o32 macro GAS fix updateMaciej W. Rozycki2010-12-162-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I am about to commit: http://sourceware.org/ml/binutils/2010-10/msg00033.html that fixes a problem with the LD/SD macro currently implemented by GAS for the o32 ABI in an inconsistent way. This is best illustrated with a simple program, which I'm copying here from the message above for easier reference: $ cat ld.s ld $5,32767($4) ld $5,32768($4) This gets assebled into the following output: $ mips-linux-as -32 -mips3 -o ld.o ld.s $ mips-linux-objdump -d ld.o ld.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: dc857fff ld a1,32767(a0) 4: 3c010001 lui at,0x1 8: 00810821 addu at,a0,at c: 8c258000 lw a1,-32768(at) 10: 8c268004 lw a2,-32764(at) ... Oops! The GAS fix makes the macro behave in a consistent way and pairs of LW/SW instructions to be output as appropriate regardless of the size of the offset associated with the address used. The machine instruction is still available, but to reach it macros have to be disabled first. This has a side effect of requiring the use of a machine-addressable memory operand. As some platforms require 64-bit operations for accesses to some I/O registers LD/SD instructions are used in a couple of places in Linux regardless of the ABI selected. Here's a fix for some pieces of code affected I've been able to track down. The fix should be backwards compatible with all supported binutils releases in existence and can be used as a reference for any other places or off-tree code. The use of the "R" constraint guarantees a machine-addressable operand. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1680/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Alchemy: fix build with SERIAL_8250=nManuel Lauss2010-12-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 7d172bfe ("Alchemy: Add UART PM methods") I introduced platform PM methods which call a function of the 8250 driver; this patch works around link failures when the kernel is built without 8250 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/1737/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: Rename mips_dma_cache_sync back to dma_cache_syncRalf Baechle2010-12-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | This fixes IP22 and IP28 build errors. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: MT: Fix typo in comment.Ralf Baechle2010-12-161-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: BCM47xx: Swap serial console if ttyS1 was specified.Hauke Mehrtens2010-12-161-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices like the Netgear WGT634U are using ttyS1 for default console output. We should switch to that console if it was given in the kernel_args parameters. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1848/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: BCM47xx: Use sscanf for parsing mac addressHauke Mehrtens2010-12-162-20/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of writing own function for parsing the mac address we now use sscanf. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | MIPS: BCM47xx: Fill values for b43 into SSB spromHauke Mehrtens2010-12-161-22/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill the sprom with all available values from the nvram. Most of these new values are needed for the b43 or b43legacy driver. Parts of this patch have been in OpenWRT for a long time and were written by Michael Buesch. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> To: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/1846/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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