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* [PATCH] ppc64: Fix PCI hotplugAnton Blanchard2005-10-111-2/+2
| | | | | | | | | | | | | | pSeries_irq_bus_setup is marked __devinit but references s7a_workaround which is marked __initdata. Depending on who got the memory for s7a_workaround (and if the value was now positive), it was possible for PCI hotplugged devices to have 3 subtracted from their interrupt number. This would happen randomly and caused me much confusion :) Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: Don't discard upper 32bits of HWCR on K8Andi Kleen2005-10-101-1/+1
| | | | | | | | | | | Need to use long long, not long when RMWing a MSR. I think it's harmless right now, but still should be better fixed if AMD adds any bits in the upper 32bit of HWCR. Bug was introduced with the TLB flush filter fix for i386 Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: Allocate cpu local data for all possible CPUsAndi Kleen2005-10-102-5/+5
| | | | | | | | | CPU hotplug fills up the possible map to NR_CPUs, but it did that after setting up per CPU data. This lead to CPU data not getting allocated for all possible CPUs, which lead to various side effects. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-10-101-36/+91
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| * [SPARC64]: Fix Ultra5, Ultra60, et al. boot failures.David S. Miller2005-10-101-36/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the boot processor, we need to do the move onto the Linux trap table a little bit differently else we'll take unhandlable faults in the firmware address space. Previously we would do the following: 1) Disable PSTATE_IE in %pstate. 2) Set %tba by hand to sparc64_ttable_tl0 3) Initialize alternate, mmu, and interrupt global trap registers. 4) Call prom_set_traptable() That doesn't work very well actually with the way we boot the kernel VM these days. It worked by luck on many systems because the firmware accesses for the prom_set_traptable() call happened to be loaded into the TLB already, something we cannot assume. So the new scheme is this: 1) Clear PSTATE_IE in %pstate and set %pil to 15 2) Call prom_set_traptable() 3) Initialize alternate, mmu, and interrupt global trap registers. and this works quite well. This sequence has been moved into a callable function in assembler named setup-trap_table(). The idea is that eventually trampoline.S can use this code as well. That isn't possible currently due to some complications, but eventually we should be able to do it. Thanks to Meelis Roos for the Ultra5 boot failure report. Signed-off-by: David S. Miller <davem@davemloft.net>
* | [PATCH] x86_64: Fix change_page_attr cache flushingAndi Kleen2005-10-101-2/+0
|/ | | | | | | | | | | Noticed by Terence Ripperda Undo wrong change in global_flush_tlb. We need to flush the caches in all cases, not just when pages were reverted. This was a bogus optimization added earlier, but it was wrong. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-104-0/+4827
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| * [ARM] 2968/1: defconfig for the ARM Collie platformVincent Sanders2005-10-101-0/+888
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders Add a defconfig for the ARM Collie platform Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Vincent Sanders <vince@arm.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2967/1: defconfig for the ARM Corgi platformVincent Sanders2005-10-101-0/+1523
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders Add a defconfig for the ARM Corgi Zarus platform Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Vincent Sanders <vince@arm.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2966/1: defconfig for the ARM Poodle platformVincent Sanders2005-10-101-0/+1015
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders Add a defconfig for the ARM Poodle Zarus platform Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Vincent Sanders <vince@arm.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2965/1: defconfig for the ARM Spitz platformVincent Sanders2005-10-101-0/+1401
| | | | | | | | | | | | | | | | | | | | Patch from Vincent Sanders Add a defconfig for the ARM Spitz Zarus platform Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Vincent Sanders <vince@arm.linux.org.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] i386: fix stack alignment for signal handlersMarkus F.X.J. Oberhumer2005-10-102-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the setup of the alignment of the signal frame, so that all signal handlers are run with a properly aligned stack frame. The current code "over-aligns" the stack pointer so that the stack frame is effectively always mis-aligned by 4 bytes. But what we really want is that on function entry ((sp + 4) & 15) == 0, which matches what would happen if the stack were aligned before a "call" instruction. Signed-off-by: Markus F.X.J. Oberhumer <markus@oberhumer.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-105-10/+118
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| * [ARM] 2962/1: scoop: Allow GPIO pin suspend state to be specifiedRichard Purdie2005-10-101-2/+18
| | | | | | | | | | | | | | | | | | | | Patch from Richard Purdie Allow the GPIO pin suspend states to be specified for SCOOP devices. This is needed for correct operation on the spitz platform. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2961/1: corgi: Add missing includeRichard Purdie2005-10-101-0/+1
| | | | | | | | | | | | | | | | | | Patch from Richard Purdie Add a missing include from corgi.c Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2960/1: collie: Add missing scoop call parametersRichard Purdie2005-10-101-3/+3
| | | | | | | | | | | | | | | | | | Patch from Richard Purdie Add some missing parameters from the scoop calls on collie. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 2959/1: Add test for invalid LDRD/STRD Rd cases in ARM alignment handlerGeorge G. Davis2005-10-101-1/+10
| | | | | | | | | | | | | | | | | | | | | | Patch from George G. Davis Add test for invalid LDRD/STRD Rd cases in ARM alignment handler and restore SWP printk KERN_ERR. Signed-off-by: Steve Longerbeam <slongerbeam@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Update mach-typesRussell King2005-10-101-4/+86
| | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [PATCH] uml: fix x86_64 with !CONFIG_FRAME_POINTERJeff Dike2005-10-101-9/+28
| | | | | | | | | | | | | | | | | | | | | | UML/x86_64 doesn't run when built with frame pointers disabled. There was an implicit frame pointer assumption in the stub segfault handler. With frame pointers disabled, UML dies on handling its first page fault. The container-of part of this is from Paolo Giarrusso <blaisorblade@yahoo.it>. Signed-off-by: Jeff Dike <jdike@addtoit.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] x86_64: Set up safe page tables during resumeRafael J. Wysocki2005-10-102-6/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following patch makes swsusp avoid the possible temporary corruption of page translation tables during resume on x86-64. This is achieved by creating a copy of the relevant page tables that will not be modified by swsusp and can be safely used by it on resume. The problem is that during resume on x86-64 swsusp may temporarily corrupt the page tables used for the direct mapping of RAM. If that happens, a page fault occurs and cannot be handled properly, which leads to the solid hang of the affected system. This leads to the loss of the system's state from before suspend and may result in the loss of data or the corruption of filesystems, so it is a serious issue. Also, it appears to happen quite often (for me, as often as 50% of the time). The problem is related to the fact that (at least) one of the PMD entries used in the direct memory mapping (starting at PAGE_OFFSET) points to a page table the physical address of which is much greater than the physical address of the PMD entry itself. Moreover, unfortunately, the physical address of the page table before suspend (i.e. the one stored in the suspend image) happens to be different to the physical address of the corresponding page table used during resume (i.e. the one that is valid right before swsusp_arch_resume() in arch/x86_64/kernel/suspend_asm.S is executed). Thus while the image is restored, the "offending" PMD entry gets overwritten, so it does not point to the right physical address any more (i.e. there's no page table at the address pointed to by it, because it points to the address the page table has been at during suspend). Consequently, if the PMD entry is used later on, and it _is_ used in the process of copying the image pages, a page fault occurs, but it cannot be handled in the normal way and the system hangs. In principle we can call create_resume_mapping() from swsusp_arch_resume() (ie. from suspend_asm.S), but then the memory allocations in create_resume_mapping(), resume_pud_mapping(), and resume_pmd_mapping() must be made carefully so that we use _only_ NosaveFree pages in them (the other pages are overwritten by the loop in swsusp_arch_resume()). Additionally, we are in atomic context at that time, so we cannot use GFP_KERNEL. Moreover, if one of the allocations fails, we should free all of the allocated pages, so we need to trace them somehow. All of this is done in the appended patch, except that the functions populating the page tables are located in arch/x86_64/kernel/suspend.c rather than in init.c. It may be done in a more elegan way in the future, with the help of some swsusp patches that are in the works now. [AK: move some externs into headers, renamed a function] Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] uml: cleanup whitespace for COW driverPaolo 'Blaisorblade' Giarrusso2005-10-101-9/+9
| | | | | | | | | | | | | | Fix whitespace - I split this off the previous patch for easier review. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] uml: cleanup byte order macros for COW driverPaolo 'Blaisorblade' Giarrusso2005-10-102-2/+26
| | | | | | | | | | | | | | | | | | | | After restoring the existing code, make it work also when included in kernelspace code (which isn't currently the case, but at least this will prevent people from "fixing" it as just happened). Whitespace is fixed in next patch - it cluttered the diff too much. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] uml: restore include breakage, breaking binary format of COW driverPaolo 'Blaisorblade' Giarrusso2005-10-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 44456d37b59d8e541936ed26d8b6e08d27e88ac1, between 2.6.13-rc3 and -rc4, was a "nice cleanup" which broke something. Revert the offending part. It broke because: a) because this part doesn't fall under the description b) the author didn't know what he was doing here c) the author didn't try to compile the existing code and see that it worked perfectly. d) the author didn't ask us what was happening e) you didn't either, and somebody there should have learned that UML is a bit different. In fact, UML is special in linking to host libc and using its includes. In particular, since host includes always define both __BIG_ENDIAN and __LITTLE_ENDIAN, ntohll() macros started thinking to be in a big-endian world; and on-disk compatibility was broken. Many thanks go to Nix for reporting the problem and correctly diagnosing an endianness problem. Btw, this patch restores the previous code, which worked; but the definitions would be uncorrect if used in kernelspace files. Next patch addresses that. Cc: Nix <nix@esperi.org.uk>, Olaf Hering <olh@suse.de> Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] uml: allow building .s/.i/.lst files from userspace filesPaolo 'Blaisorblade' Giarrusso2005-10-101-2/+2
| | | | | | | | | | | | | | | | For files which need to include glibc headers (i.e. userspace files), we specified the correct flags only for .o, not for .s/.lst/.i. Fix this. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] uml: add mode=skas0 as a synonym of skas0Paolo 'Blaisorblade' Giarrusso2005-10-101-0/+11
| | | | | | | | | | | | | | | | Too many people were confused by skas0 and tried using "mode=skas0". And after all, they are right - accept this. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] Uml: hide commands when not being verbosePaolo 'Blaisorblade' Giarrusso2005-10-101-1/+1
| | | | | | | | | | | | | | Add a missing $(Q) to a "ln" invocation. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [SPARC64]: Fix compile error in irq.cSven Hartge2005-10-081-0/+1
|/ | | | | | | | irq.c is missing the inclusion of asm/io.h, which causes readb() and writeb() the be undefined. Signed-off-by: Sven Hartge <hartge@ds9.argh.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* [PATCH] gfp flags annotations - part 1Al Viro2005-10-088-8/+8
| | | | | | | | | | | | - added typedef unsigned int __nocast gfp_t; - replaced __nocast uses for gfp flags with gfp_t - it gives exactly the same warnings as far as sparse is concerned, doesn't change generated code (from gcc point of view we replaced unsigned int with typedef) and documents what's going on far better. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [SPARC64]: Fix userland FPU state corruption.David S. Miller2005-10-073-24/+30
| | | | | | | | We need to use stricter memory barriers around the block load and store instructions we use to save and restore the FPU register file. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC32]: Enable generic IOMAP.Tom 'spot' Callaway2005-10-062-0/+5
| | | | | | | This helps some PCI stuff build. Signed-off-by: Tom 'spot' Callaway <tcallawa@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Probe for power device on ISA bus too.David S. Miller2005-10-061-13/+51
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'release' of ↵Linus Torvalds2005-10-061-0/+5
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| * [IA64] Avoid kernel hang during CMC interrupt stormBryan Sutula2005-10-061-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've noticed a kernel hang during a storm of CMC interrupts, which was tracked down to the continual execution of the interrupt handler. There's code in the CMC handler that's supposed to disable CMC interrupts and switch to polling mode when it sees a bunch of CMCs. Because disabling CMCs across all CPUs isn't safe in interrupt context, the disable is done with a schedule_work(). But with continual CMC interrupts, the schedule_work() never gets executed. The following patch immediately disables CMC interrupts for the current CPU. This then allows (at least) one CPU to ignore CMC interrupts, execute the schedule_work() code, and disable CMC interrupts on the rest of the CPUs. Acked-by: Keith Owens <kaos@sgi.com> Signed-off-by: Bryan Sutula <Bryan.Sutula@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-061-4/+4
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| * | [ARM] 2954/1: Allow D and I cache and branch prediction disabling for ARMv6Catalin Marinas2005-10-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Catalin Marinas There is no reason to not allow these config options. They are useful when the hardware has problems. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-10-069-341/+103
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| * | [SPARC64]: Fix initrd when net booting.David S. Miller2005-10-051-100/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By allocating early memory for the firmware page tables, we can write over the beginning of the initrd image. So what we do now is: 1) Read in firmware translations table while still on the firmware's trap table. 2) Switch to Linux trap table. 3) Init bootmem. 4) Build firmware page tables using __alloc_bootmem(). And this keeps the initrd from being clobbered. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC]: Remove some duplicated sparc32 config itemsMartin Habets2005-10-051-56/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove some duplicated items due to the inclusion of the general drivers/Kconfig file. These are now taken from drivers/char/Kconfig, and can be turned off there as well (which is desirable sometimes). Signed-off-by: Martin Habets <errandir_news@mph.eclipse.co.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | [SPARC64]: Replace cheetah+ code patching with variables.David S. Miller2005-10-048-185/+47
| | | | | | | | | | | | | | | | | | | | | | | | Instead of code patching to handle the page size fields in the context registers, just use variables from which we get the proper values. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | [PATCH] ppc: Fix timekeeping with HZ=250 on some Mac modelsBenjamin Herrenschmidt2005-10-051-1/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Older Macs which uses the VIA chip timers to calibrate the timebase used some code that wouldn't work if HZ wasn't divisible by 100... This fixes it at least for 250. Not totally perfect but should be enough for now (so it at least works with the default value which is now 250). There is still a potential issue with the core using CLOCK_TICK_RATE to maintain xtime and CLOCK_TICK_RATE value on ppc32 is pure crap, but that is a different problem, this patch at least brings us back to our previous situation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-044-14/+15
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| * | [ARM] 2952/1: fix a register clobber listNicolas Pitre2005-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre If gcc decides to assign lr to %0 we're screwed. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 2951/1: fix wrong commentNicolas Pitre2005-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre The cmpxchg emulation syscall needs write access. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 2950/1: i.MX gpio setup functionSascha Hauer2005-10-042-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Sascha Hauer Current implementation of imx_gpio_mode does not allow to configure all alternate routing possibilities of the i.MX. With this patch every bit in the gpio setup registers has a corresponding bit in the gpio_mode parameter, so every routing should be possible now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | [PATCH] x86_64: Drop global bit from early low mappingsAndi Kleen2005-10-041-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop global bit from early low mappings Suggested by Linus, originally also proposed by Suresh. This fixes a race condition with early start of udev, originally tracked down by Suresh B. Siddha. The problem was that switching to the user space VM would not clear the global low mappings for the beginning of memory, which lead to memory corruption. Drop the global bits. The kernel mapping stays global because it should stay constant. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] uml: Fix sysrq-r support for skas modeAllan Graves2005-10-046-54/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The old code had the IP and SP coming from the registers in the thread struct, which are completely wrong since those are the userspace registers. This fixes that by pulling the correct values from the jmp_buf in which the kernel state of each thread is stored. Signed-off-by: Allan Graves <allan.graves@oracle.com> Signed-off-by: Jeff Dike <jdike@addtoit.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | | [PATCH] UML - Fix Al's build tidyingJeff Dike2005-10-041-1/+1
| |/ |/| | | | | | | | | | | | | Al's build tidying missed one bit from me - without this UML doesn't boot. Signed-off-by: Jeff Dike <jdike@addtoit.com> Acked-by: Al Viro <viro@ftp.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [SPARC]: "extern inline" doesn't make much sense.Adrian Bunk2005-10-032-2/+2
|/ | | | | Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* [PATCH] x86_64: Fix numa node topology detection for srat based x86_64 boxesRavikiran G Thirumalai2005-10-031-3/+2
| | | | | | | | | | | | | | | 2.6.14-rc2 does not assign cpus to proper nodeids on our em64t numa boxen. Our boxes use acpi srat for parsing the numa information. srat_detect_node() used phys_proc_id[] to get to the cpu's local apic id, but phys_proc_id[] represents the cpu<->initial_apic_id mapping. The following patch fixes this problem. Now apicid_to_node[] is properly indexed with the local apic id. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-10-021-0/+5
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