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path: root/arch/x86/kernel/acpi/processor.c
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* ACPI: pdc init related memory leak with physical CPU hotplugPallipadi, Venkatesh2009-06-201-0/+13
| | | | | | | | | | | arch_acpi_processor_cleanup_pdc() in x86 and ia64 results in memory allocated for _PDC objects that is never freed and will cause memory leak in case of physical CPU remove and add. Patch fixes the memory leak by freeing the objects soon after _PDC is evaluated. Reported-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* ACPI: Disable the C2C3_FFH access mode HW has no MWAIT supportZhao Yakui2008-07-161-0/+6
| | | | | | | | | | | | | | | | 991528d7348667924176f3e29addea0675298944 (ACPI: Processor native C-states using MWAIT) started passing C2C3_FFH to _PDC to tell the BIOS that Linux supports MWAIT for deep C-states. However, we should first double check with the hardware that it actually supports MWAIT before potentially exposing a BIOS bug of an MWAIT _CST on HW that doesn't support MWAIT. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Li Shaohua <shaohua.li@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Andi Kleen <ak@linux.intel.com>
* x86: remove pointless commentsWANG Cong2008-04-191-2/+0
| | | | | | | | | Remove old comments that include the old arch/i386 directory. Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* ACPI: Set _PSD ACPI_PDC_SMP_T_SWCOORDZhao Yakui2008-02-021-0/+6
| | | | | | | | | The ACPI_PDC_SMP_T_SWCOORD bit is set by and OS that is capable of native ACPI throttling software coordination for mutli-processors using the _TSD information. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* ACPI: Enable MSR (FixedHW) support for T-StatesZhao Yakui2007-11-161-0/+3
| | | | | | | | | Add throttling control via MSR when T-states uses the FixHW Control Status registers. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Li Shaohua <shaohua.li@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* x86: fix !SMP compiler warning in arch/x86/kernel/acpi/processor.cJeff Garzik2007-10-271-2/+1
| | | | | | | | | | | Fix !CONFIG_SMP warning: arch/x86/kernel/acpi/processor.c: In function arch_acpi_processor_init_pdc: arch/x86/kernel/acpi/processor.c:65: warning: unused variable cpu Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: convert cpuinfo_x86 array to a per_cpu arrayMike Travis2007-10-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | cpu_data is currently an array defined using NR_CPUS. This means that we overallocate since we will rarely really use maximum configured cpus. When NR_CPU count is raised to 4096 the size of cpu_data becomes 3,145,728 bytes. These changes were adopted from the sparc64 (and ia64) code. An additional field was added to cpuinfo_x86 to be a non-ambiguous cpu index. This corresponds to the index into a cpumask_t as well as the per_cpu index. It's used in various places like show_cpuinfo(). cpu_data is defined to be the boot_cpu_data structure for the NON-SMP case. Signed-off-by: Mike Travis <travis@sgi.com> Acked-by: Christoph Lameter <clameter@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Dmitry Torokhov <dtor@mail.ru> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: Mark M. Hoffman <mhoffman@lightlink.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* i386: move kernel/acpiThomas Gleixner2007-10-111-0/+75
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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