summaryrefslogtreecommitdiffstats
path: root/arch/tile/include/gxio
Commit message (Collapse)AuthorAgeFilesLines
* ptp: tilegx: convert to the 64 bit get/set time methods.Richard Cochran2015-03-311-2/+2
| | | | | | | | | | | | | | This driver is 64 bit only, and so this driver and device are ready for 2038. This patch changes the driver to the new PHC and also carries the timespec64 parameter on out to the gxio_mpipe_get- set_timestamp functions, making explicit the fact that the tv_sec field is 64 bits wide. Not even compile tested. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Acked-by: Chris Metcalf <cmetcalf@ezchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* tile: improve gxio iorpc autogenerated code styleChris Metcalf2013-09-165-54/+54
| | | | | | Fix some whitespace style issues in some auto-generated files. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2013-09-063-0/+150
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull Tile arch updates from Chris Metcalf: "These changes bring in a bunch of new functionality that has been maintained internally at Tilera over the last year, plus other stray bits of work that I've taken into the tile tree from other folks. The changes include some PCI root complex work, interrupt-driven console support, support for performing fast-path unaligned data fixups by kernel-based JIT code generation, CONFIG_PREEMPT support, vDSO support for gettimeofday(), a serial driver for the tilegx on-chip UART, KGDB support, more optimized string routines, support for ftrace and kprobes, improved ASLR, and many bug fixes. We also remove support for the old TILE64 chip, which is no longer buildable" * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (85 commits) tile: refresh tile defconfig files tile: rework <asm/cmpxchg.h> tile PCI RC: make default consistent DMA mask 32-bit tile: add null check for kzalloc in tile/kernel/setup.c tile: make __write_once a synonym for __read_mostly tile: remove support for TILE64 tile: use asm-generic/bitops/builtin-*.h tile: eliminate no-op "noatomichash" boot argument tile: use standard tile_bundle_bits type in traps.c tile: simplify code referencing hypervisor API addresses tile: change <asm/system.h> to <asm/switch_to.h> in comments tile: mark pcibios_init() as __init tile: check for correct compiler earlier in asm-offsets.c tile: use standard 'generic-y' model for <asm/hw_irq.h> tile: use asm-generic version of <asm/local64.h> tile PCI RC: add comment about "PCI hole" problem tile: remove DEBUG_EXTRA_FLAGS kernel config option tile: add virt_to_kpte() API and clean up and document behavior tile: support FRAME_POINTER tile: support reporting Tilera hypervisor statistics ...
| * tilegx: provide kernel support for the tilegx UART shimChris Metcalf2013-09-032-0/+145
| | | | | | | | | | | | | | | | | | | | The TILE-Gx chip includes an on-chip UART. This change adds support for using the UART from within the kernel. The UART shim has more functionality than is exposed here, but to keep the kernel code and binary simpler, this is a subset of the full API designed to enable a standard Linux tty serial driver only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * tile PCI RC: support more MSI-X interrupt vectorsChris Metcalf2013-08-061-0/+5
| | | | | | | | | | | | | | | | | | To support PCIe devices with higher number of MSI-X interrupt vectors, e.g. 16 for the LSI RAID card, enhance the Gx RC stack to provide more MSI-X vectors by using the TRIO Scatter Queues, which provide 8 more vectors in addition to ~10 from the Map Mem regions. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* | tile: support PTP using the tilegx mPIPE (IEEE 1588)Chris Metcalf2013-08-012-3/+21
| | | | | | | | | | | | Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | tile: support multiple mPIPE shims in tilegx network driverChris Metcalf2013-08-012-0/+32
| | | | | | | | | | | | | | | | | | The initial driver support was for a single mPIPE shim on the chip (as is the case for the Gx36 hardware). The Gx72 chip has two mPIPE shims, so we extend the driver to handle that case. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | tile: support jumbo frames in the tilegx network driverChris Metcalf2013-08-012-4/+101
|/ | | | | Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* UAPI: (Scripted) Convert #include "..." to #include <path/...> in kernel ↵David Howells2012-10-024-6/+6
| | | | | | | | | | | | system headers Convert #include "..." to #include <path/...> in kernel system headers. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
* tile: gxio iorpc numbering change for TRIO interfaceChris Metcalf2012-09-241-11/+13
| | | | | | | | | An ABI numbering change was made in the hypervisor for Tilera's 4.1 MDE release (just shipped). It's incompatible with the previous 4.0 release ABI numbering, so we track the new numbering going forward. We plan to avoid modifying ABI numbering for these interfaces again. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: provide kernel support for the tilegx USB shimChris Metcalf2012-07-182-0/+133
| | | | | | | | | | | | | | | This change adds support for accessing the USB shim from within the kernel. Note that this change by itself does not allow the kernel to act as a host or as a device; it merely exposes the built-in on-chip hardware to the kernel. The <arch/usb_host.h> and <arch/usb_host_def.h> headers are empty at the moment because the kernel does not require any types or definitions specific to the tilegx USB shim; the generic USB core code is all we need. The headers are left in as stubs so that we don't need to modify the hypervisor header (drv_usb_host_intf.h) from upstream. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: provide kernel support for the tilegx TRIO shimChris Metcalf2012-07-112-0/+395
| | | | | | | | | | Provide kernel support for the tilegx "Transaction I/O" (TRIO) on-chip hardware. This hardware implements the PCIe interface for tilegx; the driver changes to use TRIO for PCIe are in a subsequent commit. The change is layered on top of the tilegx GXIO IORPC subsystem. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: provide kernel support for the tilegx mPIPE shimChris Metcalf2012-07-113-0/+1918
| | | | | | | | | | | The TILE-Gx chip includes a packet-processing network engine called mPIPE ("Multicore Programmable Intelligent Packet Engine"). This change adds support for using the mPIPE engine from within the kernel. The engine has more functionality than is exposed here, but to keep the kernel code and binary simpler, this is a subset of the full API designed to enable standard Linux networking only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: common DMA code for the GXIO IORPC subsystemChris Metcalf2012-07-111-0/+161
| | | | | | | | The dma_queue support is used by both the mPipe (networking) and Trio (PCI) hardware shims on tilegx. This common code is selected when either of those drivers is built. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: introduce GXIO IORPC framework for tilegxChris Metcalf2012-07-113-0/+107
The GXIO I/O RPC subsystem handles exporting I/O hardware resources to Linux and to applications running under Linux. For instance, memory which is made available for I/O DMA must be mapped by an I/O TLB; that means that such memory must be locked down by Linux, so that it is not swapped or otherwise reused, as long as those I/O TLB entries are active. Similarly, configuring direct hardware access introduces new validation requirements. If a user application registers memory, Linux must ensure that the supplied virtual addresses are valid, and turn them into client physical addresses. Similarly, when Linux then supplies those client physical addresses to the Tilera hypervisor, it must in turn validate those before turning them into the real physical addresses which are required by the hardware. To the extent that these sorts of activities were required on previous TILE architecture processors, they were implemented in a device-specific fashion. This meant that every I/O device had its own Tilera hypervisor driver, its own Linux driver, and in some cases its own user-level library support. There was a large amount of more-or-less functionally identical code in different places, particularly in the different Linux drivers. For TILE-Gx, this support has been generalized into a common framework, known as the I/O RPC framework or just IORPC. The two "gxio" directories (one for headers, one for sources) start with just a few files in each with this infrastructure commit, but after adding support for the on-board I/O shims for networking, PCI, USB, crypto, compression, I2CS, etc., there end up being about 20 files in each directory. More information on the IORPC framework is in the <hv/iorpc.h> header, included in this commit. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
OpenPOWER on IntegriCloud