| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | sparc64: Fix niagara2 perf IRQ bits. | David S. Miller | 2009-10-09 | 1 | -1/+1 |
| * | sparc64: Cache per-cpu %pcr register value in perf code. | David S. Miller | 2009-09-29 | 1 | -17/+42 |
| * | sparc64: Fix comment typo in perf_event.c | David S. Miller | 2009-09-29 | 1 | -1/+1 |
| * | sparc64: Minor coding style fixups in perf code. | David S. Miller | 2009-09-28 | 1 | -7/+5 |
| * | sparc64: Add a basic conflict engine in preparation for multi-counter support. | David S. Miller | 2009-09-28 | 1 | -5/+64 |
| * | sparc64: Add initial perf event conflict resolution and checks. | David S. Miller | 2009-09-27 | 1 | -5/+77 |
| * | sparc: Niagara1 perf event support. | David S. Miller | 2009-09-26 | 1 | -0/+119 |
| * | sparc: Add Niagara2 HW cache event support. | David S. Miller | 2009-09-26 | 1 | -0/+88 |
| * | sparc: Support all ultra3 and ultra4 derivatives. | David S. Miller | 2009-09-26 | 1 | -10/+13 |
| * | sparc: Support HW cache events. | David S. Miller | 2009-09-26 | 1 | -6/+139 |
| * | perf: Do the big rename: Performance Counters -> Performance Events | Ingo Molnar | 2009-09-21 | 1 | -0/+556 |
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