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* sh: Tidy up some of the cpu legacy dma header mess.Paul Mundt2012-05-191-7/+0
| | | | | | | | | | This has turned in to quite a mess, and with CPUs that care using dmaengine now it's about time to start cleaning up after the legacy DMA code. For starters, kill off the stubs for the CPUs that don't do anything, as well as all of the unused definitions. This leaves us with a set of IRQs and base addresses we can deal with later. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: cpu dma evt2irq migration.Paul Mundt2012-05-181-2/+4
| | | | | | | This migrates the cpu-family relative DMA IRQ definitions over to evt2irq() backed hwirq lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* serial: sh-sci: Abstract register maps.Paul Mundt2011-06-141-0/+10
| | | | | | | | | | | | | | | This takes a bit of a sledgehammer to the horribly CPU subtype ifdef-ridden header and abstracts all of the different register layouts in to distinct types which in turn can be overriden on a per-port basis, or permitted to default to the map matching the port type at probe time. In the process this ultimately fixes up inumerable bugs with mismatches on various CPU types (particularly the legacy ones that were obviously broken years ago and no one noticed) and provides a more tightly coupled and consolidated platform for extending and implementing generic features. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up the SH-3 build.Paul Mundt2010-10-071-0/+1
| | | | | | | | | | SH-3 lacks an MMUCR_TI definition for global TLB flushes. As SH-3 parts lack a split TLB, the same global flush behaviour is accomplished through the flush bit, which just happens to be the same as on SH-4. This fixes up the build for all SH-3 MMU parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* dmaengine: shdma: separate DMA headers.Guennadi Liakhovetski2010-03-022-27/+41
| | | | | | | | | | Separate SH DMA headers into ones, commonly used by both drivers, and ones, specific to each of them. This will make the future development of the dmaengine driver easier. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'sh/dmaengine'Paul Mundt2010-02-081-8/+12
|\ | | | | | | | | Conflicts: arch/sh/drivers/dma/dma-sh.c
| * sh: fix Transfer Size calculation in both DMA driversGuennadi Liakhovetski2010-02-081-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers do not take into account bits 3:2 of the Transfer Size field in the CHCR register, besides, bit-field defines set bit 2, but the mask only passes bits 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to be fixed too. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt2010-01-261-6/+6
| | | | | | | | | | | | | | | | | | | | | | The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Kill off dead UBC headers.Paul Mundt2010-01-051-42/+0
|/ | | | | | Nothing is using these now, so kill them all off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Convert SH7705 extended mode to new cacheflush interface.Paul Mundt2009-08-151-35/+0
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off unused flush_icache_user_range().Paul Mundt2009-08-151-1/+0
| | | | | | | | We use flush_cache_page() outright in copy_to_user_page(), and nothing else needs it, so just kill it off. SH-5 still defines its own version, but that too will go away in the same fashion once it converts over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: consolidate flush_dcache_mmap_lock/unlock() definitions.Paul Mundt2009-08-151-3/+0
| | | | | | | | All of the flush_dcache_mmap_lock()/flush_dcache_mmap_unlock() definitions are identical across all CPUs, so just provide them generically in asm/cacheflush.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Centralize the CPU cache initialization routines.Paul Mundt2009-08-151-2/+0
| | | | | | | | This provides a central point for CPU cache initialization routines. This replaces the antiquated p3_cache_init() method, which the vast majority of CPUs never cared about. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework nommu for generic cache.c use.Paul Mundt2009-08-151-2/+0
| | | | | | | This does a bit of reorganizing for allowing nommu to use the new and generic cache.c, no functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Migrate from PG_mapped to PG_dcache_dirty.Paul Mundt2009-07-221-4/+1
| | | | | | | | | | | | | | | | | This inverts the delayed dcache flush a bit to be more in line with other platforms. At the same time this also gives us the ability to do some more optimizations and cleanup. Now that the update_mmu_cache() callsite only tests for the bit, the implementation can gradually be split out and made generic, rather than relying on special implementations for each of the peculiar CPU types. SH7705 in 32kB mode and SH-4 still need slightly different handling, but this is something that can remain isolated in the varying page copy/clear routines. On top of that, SH-X3 is dcache coherent, so there is no need to bother with any of these tests in the PTEAEX version of update_mmu_cache(), so we kill that off too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove old TMU driverMagnus Damm2009-05-121-67/+0
| | | | | | | | | | | | | | | | | This patch removes the old TMU driver (CONFIG_SH_TMU/timer-tmu.c) As replacement, select the sh_tmu driver with CONFIG_SH_TIMER_TMU and configure timer channel using platform data. If multiple TMU channels are enabled using platform data, use the earlytimer parameter on the kernel command line to select channel. For instance, use "earlytimer=sh_tmu.0" to select the first channel. To verify which timer is being used, look at printouts or the timer irq count in /proc/interrupts. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: dma-sh updates for multi IRQ and new SH-4A CPUs.Nobuhiro Iwamatsu2009-03-101-11/+6
| | | | | | | | | | | This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85. This also enables multi IRQ support for platforms that have multiple vectors bound to the same IRQ source. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add platform-specific constants for SH7709Steve Glendinning2008-12-221-0/+14
| | | | | | | | I'm using these constants in support of an in-house development board, and thought they may be useful to other users of SH7709. Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move the CPU definition headers from asm/ to cpu/.Paul Mundt2008-10-201-0/+174
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* fix SH7705_CACHE_32KB compilationAdrian Bunk2008-08-111-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patches compile errors like the following caused by commit 51f3547d619956e9b428bfff17004d8f4d259a02 (sh: Allow SH-3 and SH-5 to use common headers): <-- snip --> ... CC arch/sh/mm/init.o /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c: In function 'mem_init': /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/sh/mm/init.c:232: error: implicit declaration of function 'p3_cache_init' make[2]: *** [arch/sh/mm/init.o] Error 1 make[1]: *** [arch/sh/mm] Error 2 ... CC kernel/fork.o /home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c: In function 'dup_mmap': /home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:323: error: implicit declaration of function 'flush_dcache_mmap_lock' /home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/fork.c:325: error: implicit declaration of function 'flush_dcache_mmap_unlock' make[2]: *** [kernel/fork.o] Error 1 <-- snip --> Reported-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Allow SH-3 and SH-5 to use common headers.Paul Mundt2008-07-294-79/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-2914-0/+549
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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