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* powerpc/85xx: typo in dts: "interupt" (four devices)Adam Borowski2013-11-224-8/+8
| | | | | | | | | These lines were inoperative for four years, which puts some doubt into their importance, and it's possible the fixed version will regress, but at the very least they should be removed instead. Signed-off-by: Adam Borowski <kilobyte@angband.pl> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2013-11-204-4/+168
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine changes from Vinod Koul: "This brings for slave dmaengine: - Change dma notification flag to DMA_COMPLETE from DMA_SUCCESS as dmaengine can only transfer and not verify validaty of dma transfers - Bunch of fixes across drivers: - cppi41 driver fixes from Daniel - 8 channel freescale dma engine support and updated bindings from Hongbo - msx-dma fixes and cleanup by Markus - DMAengine updates from Dan: - Bartlomiej and Dan finalized a rework of the dma address unmap implementation. - In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus [Walleij] for their review. - Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. - Some minor fixes / cleanups to mv_xor and ioatdma" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (99 commits) dma: mv_xor: Fix mis-usage of mmio 'base' and 'high_base' registers dma: mv_xor: Remove unneeded NULL address check ioat: fix ioat3_irq_reinit ioat: kill msix_single_vector support raid6test: add new corner case for ioatdma driver ioatdma: clean up sed pool kmem_cache ioatdma: fix selection of 16 vs 8 source path ioatdma: fix sed pool selection ioatdma: Fix bug in selftest after removal of DMA_MEMSET. dmatest: verbose mode dmatest: convert to dmaengine_unmap_data dmatest: add a 'wait' parameter dmatest: add basic performance metrics dmatest: add support for skipping verification and random data setup dmatest: use pseudo random numbers dmatest: support xor-only, or pq-only channels in tests dmatest: restore ability to start test at module load and init dmatest: cleanup redundant "dmatest: " prefixes dmatest: replace stored results mechanism, with uniform messages Revert "dmatest: append verify result to results" ...
| * DMA: Freescale: Add new 8-channel DMA engine device tree nodesHongbo Zhang2013-11-134-4/+168
| | | | | | | | | | | | | | | | | | Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds the device tree nodes for them. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | powerpc/dts/c293pcie: Add range field for IFC NANDPrabhakar Kushwaha2013-10-281-0/+1
| | | | | | | | | | | | | | | | | | C290PCIe has NAND flash present on IFC Chip Select(CS) 1. So Add "ranges" field for NAND flash on CS1. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/b4860emu: Add device tree file for b4860emuYork Sun2013-10-281-0/+218
| | | | | | | | | | | | | | | | | | | | | | B4860EMU is a emualtor target with minimum peripherals. It is based on B4860QDS and trimmed down most peripherals due to either not modeled or lack of board level connections. The main purpose of this minimum dts is to speed up booting on emulator. Signed-off-by: York Sun <yorksun@freescale.com> [scottwood@freescale.com: whitespace fix] Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/t4240emu: Add device tree file for t4240emuYork Sun2013-10-281-0/+268
| | | | | | | | | | | | | | | | | | | | | | T4240EMU is an emulator target with minimum peripherals. It is based on T4240QDS and trimmed down most peripherals due to either not modeled or lack of board level connections. The main purpose of this minimum dts is to speed up booting on emulator. Signed-off-by: York Sun <yorksun@freescale.com> [scottwood@freescale.com: whitespace fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc: Add I2C bus multiplexer node for B4 and T4240QDSHongtao Jia2013-10-282-47/+73
| | | | | | | | | | | | | | | | In both B4 and T4240QDS platform PCA9547 I2C bus multiplexer is used. The sub-nodes are also reorganized according to right I2C topology. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/dts: Correct sdhci quirk for bsc9131Haijun.Zhang2013-10-281-1/+1
| | | | | | | | | | | | | | | | We use property "sdhci,auto-cmd12" instead of "fsl,sdhci-auto-cmd12" to distinguish if the sdhc host has quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/eSDCH: Specify voltage for T4240QDSHaijun.Zhang2013-10-281-0/+4
| | | | | | | | | | | | | | | | | | Freescale T4240QDS reference board has extra voltage shifters added to allow 3.3V operation, so add 3.3v voltage support for T4240QDS. 1.8v and 3.3v is recommand for eMMC and SDHC card. Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/e500v2: Include Power ISA propertiesLijun Pan2013-10-281-0/+3
| | | | | | | | | | | | | | bsc9131 device tree does not have these properties. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/e6500: Include Power ISA propertiesLijun Pan2013-10-282-0/+4
| | | | | | | | | | | | | | b4420 and b4860 device trees do not have these properties. Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/dts: fix sRIO error interrupt for b4860Minghuan Lian2013-10-281-1/+1
|/ | | | | | | | | | | For B4 platform, MPIC EISR register is in reversed bitmap order, instead of "Error interrupt source 0-31. Bit 0 represents SRC0." the correct ordering is "Error interrupt source 0-31. Bit 0 represents SRC31." This patch is to fix sRIO EISR bit value of error interrupt in dts node. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge remote-tracking branch 'agust/next' into nextBenjamin Herrenschmidt2013-09-054-3/+4
|\ | | | | | | | | | | | | | | | | | | From Anatolij: << There are cleanups for some mpc5121 specific drivers and DTS files in preparation to switch mpc5121 clock support to a clock driver based on common clock framework. Additionally Sebastian fixed the mpc52xx PIC driver so that it builds when using older gcc versions. >>
| * dts: mpc512x: prepare for preprocessor supportGerhard Sittig2013-08-244-3/+4
| | | | | | | | | | | | | | | | | | prepare C preprocessor support when processing MPC512x DTS files - switch from DTS syntax to CPP syntax for include specs - create a symlink such that DTS processing can reference includes Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | powerpc/85xx: Add C293PCIE board supportMingkai Hu2013-08-231-0/+223
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | C293PCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. - 512KB platform SRAM in addition to 512K L2 Cache/SRAM - 512MB soldered DDR3 32bit memory - CPLD System Logic - 64MB x16 NOR flash and 4GB x8 NAND flash - 16MB SPI flash Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Po Liu <Po.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/85xx: Add silicon device tree for C293Mingkai Hu2013-08-232-0/+256
| | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Po Liu <Po.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/85xx: Add SEC6.0 device treeMingkai Hu2013-08-231-0/+56
| | | | | | | | | | | | | | | | Add device tree for SEC 6.0 used on C29x silicon. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Po Liu <Po.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/85xx: Add P1023RDB board supportChunhe Lan2013-08-231-0/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/85xx: add the P1020RDB-PD DTS supportHaijun.Zhang2013-08-071-0/+280
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Overview of P1020RDB-PD device: - DDR3 2GB - NOR flash 64MB - NAND flash 128MB - SPI flash 16MB - I2C EEPROM 256Kb - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch - eTSEC2 (SGMII PHY) - eTSEC3 (RGMII PHY) - SDHC - 1 USB ports - TDM ports - PCIe Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Xie Xiaobo-R63061 <X.Xie@freescale.com> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/dts: add MPIC v4.3 dts nodeMinghuan Lian2013-08-073-2/+151
| | | | | | | | | | | | | | | | | | | | | | For the latest platform T4 and B4, MPIC controller has been updated to v4.3. This patch adds a new file to describe the latest MPIC. The MSI blocks number is increased to four, the registers number of each block is increased to sixteen. MSIIR1 has been added to access these sixteen MSI registers. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | powerpc/fsl-booke: Rename b4qds.dts -> b4qds.dtsi.Ian Campbell2013-08-073-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | This file is a common include for B4860 and B4420 but is not a valid DTS itself: DTC arch/powerpc/boot/b4qds.dtb Error: arch/powerpc/boot/dts/b4qds.dts:35.1-2 syntax error FATAL ERROR: Unable to parse input tree make[1]: *** [arch/powerpc/boot/b4qds.dtb] Error 1 make: *** [b4qds.dtb] Error 2 I spotted in build tests of device-tree.git, announcement https://lkml.org/lkml/2013/4/24/209, which builds *.dts. Probably no one would do this this in real life on linux.git but it still seems worth fixing. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Cc: Shaveta Leekha <shaveta@freescale.com> Cc: Minghuan Lian <Minghuan.Lian@freescale.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Ramneek Mehresh <ramneek.mehresh@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: Add T4 LAC device tree binding & defsJoe Liccese2013-06-242-0/+201
| | | | | | | | | | | | | | | | | | The Interlaken is a narrow, high speed channelized chip-to-chip interface. To facilitate interoperability between a data path device and a look-aside co-processor, the Interlaken Look-Aside protocol is defined for short transaction-related transfers. Although based on the Interlaken protocol, Interlaken Look-Aside is not directly compatible with Interlaken and can be considered a different operation mode. The Interlaken LA controller connects internal platform to Interlaken serial interface. It accepts LA command through software portals, which are system memory mapped 4KB spaces. The LA commands are then translated into the Interlaken control words and data words, which are sent on TX side to TCAM through SerDes lanes. Signed-off-by: Joe Liccese <joe.liccese@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* powerpc: Update currituck pci/usb fixup for new board revisionAlistair Popple2013-06-201-0/+5
| | | | | | | | | | | The currituck board uses a different IRQ for the pci usb host controller depending on the board revision. This patch adds support for newer board revisions by retrieving the board revision from the FPGA and mapping the appropriate IRQ. Signed-off-by: Alistair Popple <alistair@popple.id.au> Acked-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge tag 'mmc-updates-for-3.10-rc1' of ↵Linus Torvalds2013-05-041-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC update from Chris Ball: "MMC highlights for 3.10: Core: - Introduce MMC_CAP2_NO_PRESCAN_POWERUP to allow skipping mmc_power_up() at boot/initialization time if it's already happened, for performance (faster boot time) reasons. - Fix a bit width test failure that resulted in old eMMC cards being put into 1-bit mode when 4-bit mode was available. - Expose fwrev/hwrev for MMCv4 parts. - Improve card removal logic in the case where the card's removed slowly; we were missing card removal events if the card retained contact with the slot pads for long enough to reply to a CMD13 while being removed. Drivers: - davinci_mmc: Support using PIO instead of DMA. - dw_mmc: Add support for Exynos4412. - mxcmmc: DT support, use slot-gpio API. - mxs-mmc: Add broken-cd/cd-inverted/non-removable DT property support. - sdhci-sirf: New sdhci-pltfm driver for CSR SiRF SoCs: SiRFprimaII: unicore ARM Cortex-A9 SiRFatlas6: unicore ARM Cortex-A9 SiRFmarco: dual core ARM Cortex-A9 SMP - sdhci-tegra: Add support for Tegra114 platforms, use mmc_of_parse()" * tag 'mmc-updates-for-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (66 commits) mmc: sdhci-tegra: fix MODULE_DEVICE_TABLE mmc: core: fix init controller performance regression, updated patch mmc: mxcmmc: enable DMA support on mpc512x mmc: mxcmmc: constify mxcmci_devtype mmc: mxcmmc: use slot-gpio API for write-protect detection mmc: mxcmmc: add mpc512x SDHC support mmc: mxcmmc: fix race conditions for host->req and host->data access mmc: mxcmmc: DT support mmc: dw_mmc: let device core setup the default pin configuration mmc: mxs-mmc: add broken-cd property mmc: mxs-mmc: add non-removable property mmc: mxs-mmc: add cd-inverted property mmc: core: call pm_runtime_put_noidle in pm_runtime_get_sync failed case mmc: mxcmmc: Fix bug when card is present during boot mmc: core: fix performance regression initializing MMC host controllers Revert "mmc: core: wait while adding MMC host to ensure root mounts successfully" mmc: atmel-mci: pio hang on block errors mmc: core: Fix bit width test failing on old eMMC cards mmc: dw_mmc: Use pr_info instead of printk mmc: dw_mmc: Check return value of regulator_enable ...
| * mmc: mxcmmc: enable DMA support on mpc512xAnatolij Gustschin2013-04-121-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SDHC DMA channel description to the mpc512x device tree to enable slave channel requesting in the mxcmmc driver. mpc512x DMA engine doesn't support endianness conversion when reading/writing data from peripheral's FIFO, so we have to swap data buffers before each DMA write and after each DMA read transfer manually. Since chained SDHC DMA transfers are not supported on mpc512x, limit 'max_segs' tunable parameter to one and initialise it to 64 only when running on i.MX platforms. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Chris Ball <cjb@laptop.org>
* | Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt2013-04-3033-23/+2130
|\ \ | | | | | | | | | | | | | | | | | | | | | From Kumar Gala: << Add support for T4 and B4 SoC families from Freescale, e6500 altivec support, some various board fixes and other minor cleanups. >>
| * | powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4Kevin Hao2013-04-292-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reg property in the pci bridge device node is used to bind this device node to the pci bridge device. Then all the pci devices under this bridge could use the interrupt maps defined in this device node to do the irq translation. So if this property is missed, the pci traditional irq mechanism will not work. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/dts: Fix the dts for p1025rdb 36bitZhicheng Fan2013-04-291-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following errors: Error: p1025rdb.dtsi:326.2-3 label or path, 'qe', not found Error: p1021si-post.dtsi:242.2-3 label or path, 'qe', not found FATAL ERROR: Syntax error parsing input tree Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Fix MPC8536DS 36-bit device treeKumar Gala2013-04-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The localbus node should be in at 0xfffe05000 not 0xffe05000. Also fixed the names of the localbus and pci nodes to reflect the addresses they are actually at. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl: Add property for 'era' in SEC dts crypto nodeVakul Garg2013-04-117-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | The crypto node now contains a new property 'fsl,sec-era'. This is required so that applications can retrieve era info without having to be able to read SEC's register space. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl: removed qoriq-sec4.1-0.dtsi.Vakul Garg2013-04-111-109/+0
| | | | | | | | | | | | | | | | | | | | | Removing qoriq-sec4.1-0.dtsi as it is not used by any soc anymore. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Add initial B4860QDS and B4420QDS board device treeShaveta Leekha2013-04-103-0/+280
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4860QDS and B4420QDS share same QDS board * common board features have been added in b4qds.dts * various board differences are in respective files of B4860 and B4420 Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420Shaveta Leekha2013-04-105-0/+663
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | B4860 and B4420 are similar that share some commonalities * common features have been added in b4si-pre.dtsi and b4si-post.dtsi * differences are added in respective silicon files of B4860 and B4420 There are several things missing from the device trees of B4860 and B4420: * DPAA related nodes (Qman, Bman, Fman, Rman) * DSP related nodes/information * serdes, sfp(security fuse processor), thermal, gpio, maple, cpri, quad timers nodes Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Minor fixes to T4240 Si device treeKumar Gala2013-04-092-13/+13
| | | | | | | | | | | | | | | | | | | | | * Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: add SEC-5.3 device treeShaveta Leekha2013-04-031-0/+118
| | | | | | | | | | | | | | | | | | Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Update T4240 device config node in device treeKumar Gala2013-03-181-1/+1
| | | | | | | | | | | | | | | | | | | | | As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to reflect this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCsStephen George2013-03-185-5/+5
| | | | | | | | | | | | | | | | | | | | | Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IPStephen George2013-03-183-12/+148
| | | | | | | | | | | | | | | Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Reserve a partition of NOR flash for QE ucode firmwareJiucheng Xu2013-03-121-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the partition of JFFS2 overlaps with QE ucode firmware, So JFFS2 will break QE ucode. Shrink JFFS2's partition to reserve the space of QE ucode firmware. Signed-off-by: Jiucheng Xu <Jiucheng.Xu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Add first usb controller node for Qonverge platformsRamneek Mehresh2013-03-121-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | Add first usb controller node for qonverge qoriq platforms like B4860, etc Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Add initial T4240QDS board device treeKumar Gala2013-03-121-0/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/fsl-booke: Add initial silicon device tree for T4240Kumar Gala2013-03-125-0/+557
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Added SEC-5.0 device tree.Vakul Garg2013-03-051-0/+109
| | | | | | | | | | | | | | | | | | | | | | | | Add device tree for SEC (crypto engine) version 5.0 used on T4240. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc: add missing deo arch category to e500mc/e5500 dtsStuart Yoder2013-03-052-0/+2
| | | | | | | | | | | | | | | Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/e6500: Add architecture categories for e6500 coresStuart Yoder2013-03-051-0/+65
| |/ | | | | | | | | | | | | -also define a binding for fsl,eref-* properties Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/512x: add ifm ac14xx boardAnatolij Gustschin2013-04-102-1/+393
| | | | | | | | | | | | | | | | | | | | Add dts file for ac14xx board and its board compatible string to the generic mpc512x board match list. Also add phandle to the dma DT node since there is a change (for MPC5121 SDHC DMA support) merged via linux-mmc tree with reference to the dma controller node in the sdhc node. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | powerpc/mpc512x: add platform code for MPC5125.Matteo Facchinetti2013-04-103-2/+235
|/ | | | | | | | | | | | | | | Tested on MPC5125 Tower evaluation board with mpc512x_defconfig compile configuration. In detail, supports for: - PSC / UART - RTC - ETH - DIU - I2C Signed-off-by: Matteo Facchinetti <matteo.facchinetti@sirius-es.it> Signed-off-by: Anatolij Gustschin <agust@denx.de>
* Merge remote-tracking branch 'agust/next' into nextBenjamin Herrenschmidt2013-02-2016-769/+586
|\ | | | | | | | | | | | | | | | | | | | | | | << Please pull mpc5xxx patches for v3.9. The bestcomm driver is moved to drivers/dma (so it will be usable for ColdFire). mpc5121 now provides common dtsi file and existing mpc5121 device trees use it. There are some minor clock init and sparse fixes and updates for various 5200 device tree files from Grant. Some fixes for bugs in the mpc5121 DIU driver are also included here (Andrew Morton suggested to push them via my mpc5xxx tree). >>
| * powerpc/5200: Use the gpt* labels to simplify mpc5200 dts filesGrant Likely2013-02-1111-235/+70
| | | | | | | | | | | | | | | | | | | | | | | | The DTC labels feature allows a dts file to reference a node without having to reproduce the entire node hierarchy above it. We can use this to simplify the MPC5200 board dts files by referencing the gpt nodes by label. Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> [agust: fixed gpt7 phandle in the csi node of o2d.dtsi] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * powerpc/5200: Add Lite5200 on-board LEDs as devicesGrant Likely2013-02-112-12/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Lite5200 evaluation board has a number of debug LEDs that Linux doesn't know about yet. This change adds a gpio-leds stanza to the lite5200 device tree so that the correct driver can get hooked up. Also, make use of the dtc labels feature to reduce the number of source lines required to add the gpio-controller property to the general purpose timer nodes. In addition, the required #gpio-cells properties are added to the common mpc5200b dtsi include file so that each board doesn't need to add them explicitly. This still doesn't enable gpio mode, 'gpio-controller' is required for that, but it means less work needs to be done by board ports. Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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