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* powerpc/4xx: Add 16K FIFO size DTS entries on supported platformsDave Mitchell2009-11-041-0/+2
| | | | | | | | | | | Adding tx/rx-fifo-size-gige to EMAC fields for evaluation kit DTS files where appropriate. Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com> Acked-by: Prodyut Hazarika <phazarika@appliedmicro.com> Acked-by: Victor Gallardo <vgallardo@appliedmicro.com> Acked-by: Loc Ho <lho@appliedmicro.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc/44x: Add NAND support to Canyonlands dtsStefan Roese2009-08-201-13/+36
| | | | | | | | Also some whitespace cleanup in the USB device nodes. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge commit 'origin/master' into nextBenjamin Herrenschmidt2009-03-301-0/+7
|\ | | | | | | | | | | Manual merge of: arch/powerpc/include/asm/elf.h drivers/i2c/busses/i2c-mpc.c
| * crypto: amcc - Add crypt4xx driverJames Hsiao2009-02-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | This patch adds support for AMCC ppc4xx security device driver. This is the initial release that includes the driver framework with AES and SHA1 algorithms support. The remaining algorithms will be released in the near future. Signed-off-by: James Hsiao <jhsiao@amcc.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* | powerpc/4xx: Add missing USB and i2c devices to CanyonlandsBenjamin Herrenschmidt2009-02-141-0/+28
|/ | | | | | | | | | | | This adds the device-tree entries for a handful of devices on the Canyonlands board, such as the EHCI and OHCI controllers, the real time clock and the AD7414 thermal monitor. I also updated the defconfig to enable various options related to these devices. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc/4xx: Add L2 cache node to AMCC Canyonlands dts fileStefan Roese2008-12-111-0/+11
| | | | | | | | | | | | With this patch the L2 cache is enabled on Canyonlands to increase the overall performance. There is a known cache coherency issue with the L2 cache, but this is related to the high bandwidth (HB) PLB segment where the memory address is 0x8.xxxx.xxxx (low bandwidth PLB segment is mapped to 0x0.xxxx.xxxx). Since this HB address is currently unused it is safe to enable the L2 cache. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* powerpc/4xx: Add support for ISA holes on 4xx PCI/X/EBenjamin Herrenschmidt2008-12-041-0/+3
| | | | | | | | | | | | | | | | | This adds support for ISA memory holes on the PCI, PCI-X and PCI-E busses of the 4xx platforms. The patch includes changes to the Bamboo and Canyonlands device-trees to add such a hole, others can be updated separately. The ISA memory hole is an additional outbound window configured in the bridge to generate PCI cycles in the low memory addresses, thus allowing to access things such as the hard-decoded VGA aperture at 0xa0000..0xbffff or other similar things. It's made accessible to userspace via the new legacy_mem file in sysfs for which support was added by a previous patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* ibm_newemac: Parameterize EMAC Multicast Match HandlingGrant Erickson2008-07-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Various instances of the EMAC core have varying: 1) number of address match slots, 2) width of the registers for handling address match slots, 3) number of registers for handling address match slots and 4) base offset for those registers. As the driver stands today, it assumes that all EMACs have 4 IAHT and GAHT 32-bit registers, starting at offset 0x30 from the register base, with only 16-bits of each used for a total of 64 match slots. The 405EX(r) and 460EX now use the EMAC4SYNC core rather than the EMAC4 core. This core has 8 IAHT and GAHT registers, starting at offset 0x80 from the register base, with ALL 32-bits of each used for a total of 256 match slots. This adds a new compatible device tree entry "emac4sync" and a new, related feature flag "EMAC_FTR_EMAC4SYNC" along with a series of macros and inlines which supply the appropriate parameterized value based on the presence or absence of the EMAC4SYNC feature. The code has further been reworked where appropriate to use those macros and inlines. In addition, the register size passed to ioremap is now taken from the device tree: c4 for EMAC4SYNC cores 74 for EMAC4 cores 70 for EMAC cores rather than sizeof (emac_regs). Finally, the device trees have been updated with the appropriate compatible entries and resource sizes. This has been tested on an AMCC Haleakala board such that: 1) inbound ICMP requests to 'haleakala.local' via MDNS from both Mac OS X 10.4.11 and Ubuntu 8.04 systems as well as 2) outbound ICMP requests from 'haleakala.local' to those same systems in the '.local' domain via MDNS now work. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* [POWERPC] Convert remaining dts-v0 files to v1David Gibson2008-05-291-110/+112
| | | | | | | | | | | | | | | | | | | | At the moment we have a mixture of left-over version 0 and new-format version 1 files in arch/powerpc/boot/dts. This is potentially confusing to people new to the dts format attempting to figure it out. So, this patch converts all the as-yet unconverted dts v0 files and converts them to v1. They're mechanically-converted, and not hand tweaked so in some cases they're not 100% in keeping with usual v1 style, but the convertor program does have some heuristics so the discrepancies aren't too bad. I have checked that this patch produces no changes to the resulting dtb binaries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dtsStefan Roese2008-04-241-0/+37
| | | | | | | | This patch adds default NOR entries to the AMCC Canyonlands (460EX) and Glacier (460GT) dts files. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Some EMAC related changes in Canyonlands & Glacier dts filesStefan Roese2008-04-051-4/+15
| | | | | | | | | | | | This patch fixes some problems in the Canyonlands 460EX and Glacier 460GT dts files: - Add "mdio-device = <&EMAC0>" to all all EMAC's except for EMAC0 itself (the 460EX/GT only can access the PHY via the EMAC0 instance) - Add TAH support to Canyonlands dts Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] 4xx: Add Canyonlands DTSStefan Roese2008-03-261-0/+391
This dts source file for the AMCC 460EX Canyonlands evalutaion board Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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