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* Merge branch 'for-2.6.39' of ↵Linus Torvalds2011-03-161-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu * 'for-2.6.39' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu: percpu, x86: Add arch-specific this_cpu_cmpxchg_double() support percpu: Generic support for this_cpu_cmpxchg_double() alpha: use L1_CACHE_BYTES for cacheline size in the linker script percpu: align percpu readmostly subsection to cacheline Fix up trivial conflict in arch/x86/kernel/vmlinux.lds.S due to the percpu alignment having changed ("x86: Reduce back the alignment of the per-CPU data section")
| * percpu: align percpu readmostly subsection to cachelineTejun Heo2011-01-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
* | Merge branch 'timers-core-for-linus' of ↵Linus Torvalds2011-03-151-5/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (62 commits) posix-clocks: Check write permissions in posix syscalls hrtimer: Remove empty hrtimer_init_hres_timer() hrtimer: Update hrtimer->state documentation hrtimer: Update base[CLOCK_BOOTTIME].offset correctly timers: Export CLOCK_BOOTTIME via the posix timers interface timers: Add CLOCK_BOOTTIME hrtimer base time: Extend get_xtime_and_monotonic_offset() to also return sleep time: Introduce get_monotonic_boottime and ktime_get_boottime hrtimers: extend hrtimer base code to handle more then 2 clockids ntp: Remove redundant and incorrect parameter check mn10300: Switch do_timer() to xtimer_update() posix clocks: Introduce dynamic clocks posix-timers: Cleanup namespace posix-timers: Add support for fd based clocks x86: Add clock_adjtime for x86 posix-timers: Introduce a syscall for clock tuning. time: Splitout compat timex accessors ntp: Add ADJ_SETOFFSET mode bit time: Introduce timekeeping_inject_offset posix-timer: Update comment ... Fix up new system-call-related conflicts in arch/x86/ia32/ia32entry.S arch/x86/include/asm/unistd_32.h arch/x86/include/asm/unistd_64.h arch/x86/kernel/syscall_table_32.S (name_to_handle_at()/open_by_handle_at() vs clock_adjtime()), and some due to movement of get_jiffies_64() in: kernel/time.c
| * | mn10300: Switch do_timer() to xtimer_update()Torben Hohn2011-02-091-5/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | Only one CPU gets the timer interrupt so mn10300_last_tsc does not need to be protected by xtime lock. Remove xtime lovking and use xtime_update() which does the locking itself. Signed-off-by: Torben Hohn <torbenh@gmx.de> Cc: David Howells <dhowells@redhat.com> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> LKML-Reference: <20110127150011.23248.62040.stgit@localhost> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* | MN10300: atomic_read() should ensure it emits a loadDavid Howells2011-03-141-1/+1
| | | | | | | | | | | | | | | | atomic_read() needs to ensure that it emits a load (which it can do by using ACCESS_ONCE()). Reported-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: David Howells <dhowells@redhat.com>
* | MN10300: The SMP_ICACHE_INV_FLUSH_RANGE IPI command does not existDavid Howells2011-03-141-2/+2
| | | | | | | | | | | | | | | | The invalidate-only versions of flush_icache_*range() are trying sending the SMP_ICACHE_INV_FLUSH_RANGE IPI command in SMP kernels when they should be sending SMP_ICACHE_INV_RANGE as the former does not exist. Signed-off-by: David Howells <dhowells@redhat.com>
* | MN10300: Proper use of macros get_user() in the case of incremented pointersTkhai Kirill2011-03-141-2/+3
|/ | | | | | | | | | Using __get_user_check(x, ptr++, size) leads to double increment of pointer. This macro uses the macro get_user directly, which itself is used in this way (get_user(x, ptr++)) in some functions of the kernel. The patch fixes the error. Reported-by: Tkhai Kirill <tkhai@yandex.ru> Signed-off-by: David Howells <dhowells@redhat.com>
* mn10300: Use generic irq KconfigThomas Gleixner2011-01-211-4/+1
| | | | | | | No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Howells <dhowells@redhat.com>
* genirq: Remove __do_IRQThomas Gleixner2011-01-211-3/+0
| | | | | | | | | | | | | | | | | | | All architectures are finally converted. Remove the cruft. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Mike Frysinger <vapier@gentoo.org> Cc: David Howells <dhowells@redhat.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Michal Simek <monstr@monstr.eu> Acked-by: David Howells <dhowells@redhat.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Jeff Dike <jdike@addtoit.com>
* kconfig: rename CONFIG_EMBEDDED to CONFIG_EXPERTDavid Rientjes2011-01-202-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of CONFIG_EMBEDDED has long since been obsoleted; the option is used to configure any non-standard kernel with a much larger scope than only small devices. This patch renames the option to CONFIG_EXPERT in init/Kconfig and fixes references to the option throughout the kernel. A new CONFIG_EMBEDDED option is added that automatically selects CONFIG_EXPERT when enabled and can be used in the future to isolate options that should only be considered for embedded systems (RISC architectures, SLOB, etc). Calling the option "EXPERT" more accurately represents its intention: only expert users who understand the impact of the configuration changes they are making should enable it. Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: David Rientjes <rientjes@google.com> Cc: Greg KH <gregkh@suse.de> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jens Axboe <axboe@kernel.dk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Robin Holt <holt@sgi.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* kernel: clean up USE_GENERIC_SMP_HELPERSAmerigo Wang2011-01-131-5/+1
| | | | | | | | | | | | | | | | | | | | | | | For arch which needs USE_GENERIC_SMP_HELPERS, it has to select USE_GENERIC_SMP_HELPERS, rather than leaving a choice to user, since they don't provide their own implementions. Also, move on_each_cpu() to kernel/smp.c, it is strange to put it in kernel/softirq.c. For arch which doesn't use USE_GENERIC_SMP_HELPERS, e.g. blackfin, only on_each_cpu() is compiled. Signed-off-by: Amerigo Wang <amwang@redhat.com> Cc: David Howells <dhowells@redhat.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* set_rtc_mmss: show warning message only onceStephen Hemminger2011-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Occasionally the system gets into a state where the CMOS clock has gotten slightly ahead of current time and the periodic update of RTC fails. The message is a nuisance and repeats spamming the log. See: http://www.ntp.org/ntpfaq/NTP-s-trbl-spec.htm#Q-LINUX-SET-RTC-MMSS Rather than just removing the message, make it show only once and reduce severity since it indicates a normal and non urgent condition. Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: David Howells <dhowells@redhat.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* arch/mn10300/kernel/irq.c: fix buildAndrew Morton2011-01-031-1/+1
| | | | | | | | | Addresses https://bugzilla.kernel.org/show_bug.cgi?id=25702 Reported-by: Martin Ettl <ettl.martin@gmx.de> Cc: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* clarify a usage constraint for cnt32_to_63()Nicolas Pitre2010-12-201-7/+3
| | | | | | | | | | | | | The cnt32_to_63 algorithm relies on proper counter data evaluation ordering to work properly. This was missing from the provided documentation. Let's augment the documentation with the missing usage constraint and fix the only instance that got it wrong. Signed-off-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MN10300: Fix interrupt mask alteration function call name in gdbstubDavid Howells2010-12-073-3/+6
| | | | | | | | | Fix the name of interrupt mask alteration function (ie the local_change_intr_mask_level() fn) called in gdbstub to have an arch_ prefix to match the definition in asm/irqflags.h. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MN10300: Implement asm/syscall.hDavid Howells2010-12-031-0/+117
| | | | | | | Implement asm/syscall.h for the MN10300 arch. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* BKL: remove extraneous #include <smp_lock.h>Arnd Bergmann2010-11-171-1/+0
| | | | | | | | | | The big kernel lock has been removed from all these files at some point, leaving only the #include. Remove this too as a cleanup. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'kconfig' of ↵Linus Torvalds2010-10-281-9/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6 * 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (38 commits) kbuild: convert `arch/tile' to the kconfig mainmenu upgrade README: cite nconfig Revert "kconfig: Temporarily disable dependency warnings" kconfig: Use PATH_MAX instead of 128 for path buffer sizes. kconfig: Fix realloc usage() kconfig: Propagate const kconfig: Don't go out from read config loop when you read new symbol kconfig: fix menuconfig on debian lenny kbuild: migrate all arch to the kconfig mainmenu upgrade kconfig: expand file names kconfig: use the file's name of sourced file kconfig: constify file name kconfig: don't emit warning upon rootmenu's prompt redefinition kconfig: replace KERNELVERSION usage by the mainmenu's prompt kconfig: delay gconf window initialization kconfig: expand by default the rootmenu's prompt kconfig: add a symbol string expansion helper kconfig: regen parser kconfig: implement the `mainmenu' directive kconfig: allow PACKAGE to be defined on the compiler's command-line ... Fix up trivial conflict in arch/mn10300/Kconfig
| * Merge branch 'kbuild/rc-fixes' into kbuild/kconfigMichal Marek2010-10-1215-595/+19
| |\ | | | | | | | | | We need to revert the temporary hack in 71ebc01, hence the merge.
| * | kbuild: migrate all arch to the kconfig mainmenu upgradeArnaud Lacombe2010-09-191-9/+0
| | | | | | | | | | | | | | | | | | Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Michal Marek <mmarek@suse.cz>
* | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300Linus Torvalds2010-10-27137-1944/+9384
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300: (44 commits) MN10300: Save frame pointer in thread_info struct rather than global var MN10300: Change "Matsushita" to "Panasonic". MN10300: Create a defconfig for the ASB2364 board MN10300: Update the ASB2303 defconfig MN10300: ASB2364: Add support for SMSC911X and SMC911X MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA MN10300: Generic time support MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit support MN10300: Map userspace atomic op regs as a vmalloc page MN10300: And Panasonic AM34 subarch and implement SMP MN10300: Delete idle_timestamp from irq_cpustat_t MN10300: Make various interrupt priority settings configurable MN10300: Optimise do_csum() MN10300: Implement atomic ops using atomic ops unit MN10300: Make the FPU operate in non-lazy mode under SMP MN10300: SMP TLB flushing MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control MN10300: Make the use of PIDR to mark TLB entries controllable MN10300: Rename __flush_tlb*() to local_flush_tlb*() MN10300: AM34 erratum requires MMUCTR read and write on exception entry ...
| * | | MN10300: Save frame pointer in thread_info struct rather than global varDavid Howells2010-10-2714-145/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Save the current exception frame pointer in the thread_info struct rather than in a global variable as the latter makes SMP tricky, especially when preemption is also enabled. This also replaces __frame with current_frame() and rearranges header file inclusions to make it all compile. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
| * | | MN10300: Change "Matsushita" to "Panasonic".Akira Takeuchi2010-10-273-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change externally visible "Matsushita" instances to "Panasonic" throughout the MN10300 arch code. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Create a defconfig for the ASB2364 boardAkira Takeuchi2010-10-271-0/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a defconfig for the ASB2364 board. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Update the ASB2303 defconfigAkira Takeuchi2010-10-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: ASB2364: Add support for SMSC911X and SMC911XAkira Takeuchi2010-10-275-0/+233
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for SMSC911X and SMC911X for the ASB2364 unit. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com> cc: steve.glendinning@smsc.com cc: netdev@vger.kernel.org
| * | | MN10300: ASB2364: Handle the IRQ multiplexer in the FPGADavid Howells2010-10-277-19/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Handle the IRQ multiplexer in the FPGA by implementing a cascade interrupt driver for it. Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Generic time supportMark Salter2010-10-2712-115/+401
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement generic time support for MN10300. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit supportMark Salter2010-10-271-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use an ELF HWCAP flag to indicate to the process that the CPU provides LL/SC equivalent atomic operations unit support in addition to BSET/BCLR. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Map userspace atomic op regs as a vmalloc pageMark Salter2010-10-272-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM34 processor has an atomic operation that's the equivalent of LL/SC on other architectures. However, rather than being done through a pair of instructions, it's driven by writing to a pair of memory-mapped CPU control registers. One set of these registers (AARU/ADRU/ASRU) is available for use by userspace, but for userspace to access them a PTE must be set up to cover the region. This is done by dedicating the first vmalloc region page to this purpose, setting the permissions on its PTE such that userspace can access the page. glibc is hardcoded to expect the registers to be there. The way atomic ops are done through these registers is straightforward: (1) Write the address of the word you wish to access into AARU. This causes the CPU to go and fetch that word and load it into ADRU. The status bits are also cleared in ASRU. (2) The current data value is read from the ADRU register and modified. (3) To alter the data in RAM, the revised data is written back to the ADRU register, which causes the CPU to attempt to write it back. (4) The ASRU.RW flag (ASRU read watch), ASRU.LW flag (bus lock watch), ASRU.IW (interrupt watch) and the ASRU.BW (bus error watch) flags then must be checked to confirm that the operation wasn't aborted. If any of the watches have been set to true, the operation was aborted. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: And Panasonic AM34 subarch and implement SMPAkira Takeuchi2010-10-2779-481/+4494
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for MN10300. Also implement support for the MN2WS0060 processor and the ASB2364 evaluation board which are AM34 based. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Delete idle_timestamp from irq_cpustat_tAkira Takeuchi2010-10-272-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete idle_timestamp from irq_cpustat_t as it's an unread relic. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Make various interrupt priority settings configurableAkira Takeuchi2010-10-272-6/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the settings of interrupt priorities used by various services configurable at run time. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Optimise do_csum()Akira Takeuchi2010-10-271-27/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimise do_csum() to gang up the loads so they're less likely to get interruptions between. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Implement atomic ops using atomic ops unitMark Salter2010-10-272-47/+351
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement atomic ops using the atomic ops unit available in the AM34 CPU. This allows the equivalent of the LL/SC instructions to be found on other CPUs. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Make the FPU operate in non-lazy mode under SMPAkira Takeuchi2010-10-2714-248/+440
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the FPU operate in non-lazy mode under SMP so that when the process that is currently using the FPU migrates to a different CPU, we don't have to ping its previous CPU to flush the FPU context. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: SMP TLB flushingAkira Takeuchi2010-10-274-29/+290
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB controlAkira Takeuchi2010-10-273-47/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control as the bits are a more suitable layout. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Make the use of PIDR to mark TLB entries controllableAkira Takeuchi2010-10-274-62/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make controllable the use of the PIDR register to mark TLB entries as belonging to particular processes. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Rename __flush_tlb*() to local_flush_tlb*()David Howells2010-10-276-28/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename __flush_tlb*() to local_flush_tlb*() as it's more appropriate, and ready to differentiate local from global TLB flushes when SMP is introduced. Whilst we're at it, get rid of __flush_tlb_global() and make local_flush_tlb_page() take an mm_struct pointer rather than VMA pointer. Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: AM34 erratum requires MMUCTR read and write on exception entryAkira Takeuchi2010-10-273-6/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An AM34 erratum requires MMUCTR read and write on entry to certain exceptions, prior to EPSW.NMID being cleared to allow NMIs to happen. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Make the boot wrapper able to use writeback cachingAkira Takeuchi2010-10-271-1/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the boot wrapper able to use writeback caching, including flushing the cache before jumping to the main kernel. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Cache: Implement SMP global cache flushingAkira Takeuchi2010-10-279-15/+535
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement SMP global cache flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Allow some cacheflushes to be avoided if cache snooping is availableDavid Howells2010-10-279-96/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM34 core is able to do cache snooping, and so can skip some of the cache flushing. Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: AM34: Add cacheflushing by using the AM34 purge registersAkira Takeuchi2010-10-274-1/+678
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM34 CPU core provides an automated way of purging the cache rather than manually iterating over all the tags in the cache. Make it possible to use these. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: SMP: Differentiate local cache flushingAkira Takeuchi2010-10-274-112/+289
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Differentiate local cache flushing from global cache flushing so that they can be done differently on SMP systems. Rename the cache functions from: mn10300_[id]cache_*() to: mn10300_[id]_localcache_*() and on a UP system, assign the global labels to the local labels. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Cacheflush functions should take unsigned long addressesAkira Takeuchi2010-10-272-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions that perform cache flushing should take addresses of unsigned long type, not unsigned int. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: AM34: The current cacheflush routines operate by controlling tag regsDavid Howells2010-10-274-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current cache flush and invalidate routines operate by controlling the cache tag registers. Rename the files and add config items to select them. This makes it easier to support the use of other cache flush methods instead, such as the use of AM34's area purge registers, if available. Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Reorder asm/cacheflush.h to put primitives firstDavid Howells2010-10-271-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorder asm/cacheflush.h to put arch primitives first, before the main functions so that the main functions can be inline asm rather than #defines when non-trivial. Signed-off-by: David Howells <dhowells@redhat.com>
| * | | MN10300: Provide a MN10300_CACHE_ENABLED config optionDavid Howells2010-10-276-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a MN10300_CACHE_ENABLED config option as inverted logic of MN10300_CACHE_DISABLED to make things simpler. Signed-off-by: David Howells <dhowells@redhat.com>
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